Add basic support for pulse count in the PWM interface
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4285 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
d93908e421
commit
386925552d
@ -473,9 +473,8 @@ static void can_putcommon(uint32_t addr, uint32_t value)
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static void can_reset(FAR struct can_dev_s *dev)
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{
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FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->cd_priv;
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uint32_t baud;
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int ret;
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irqstate_t flags;
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int ret;
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canvdbg("CAN%d\n", priv->port);
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@ -45,6 +45,7 @@
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/pwm.h>
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#include <arch/board/board.h>
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@ -69,6 +70,41 @@
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* PWM/Timer Definitions ****************************************************/
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/* The following definitions are used to identify the various time types */
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#define TIMTYPE_BASIC 0 /* Basic timers: TIM6-7 */
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#define TIMTYPE_GENERAL16 1 /* General 16-bit timers: TIM2-5 on F1 */
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#define TIMTYPE_COUNTUP16 2 /* General 16-bit count-up timers: TIM9-14 on F4 */
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#define TIMTYPE_GENERAL32 3 /* General 32-bit timers: TIM2-5 on F4 */
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#define TIMTYPE_ADVANCED 4 /* Advanced timers: TIM1-8 */
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#define TIMTYPE_TIM1 TIMTYPE_ADVANCED
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#ifdef CONFIG_STM32_STM32F10XX
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# define TIMTYPE_TIM2 TIMTYPE_GENERAL16
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# define TIMTYPE_TIM3 TIMTYPE_GENERAL16
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# define TIMTYPE_TIM4 TIMTYPE_GENERAL16
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# define TIMTYPE_TIM5 TIMTYPE_GENERAL16
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#else
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# define TIMTYPE_TIM2 TIMTYPE_GENERAL32
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# define TIMTYPE_TIM3 TIMTYPE_GENERAL32
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# define TIMTYPE_TIM4 TIMTYPE_GENERAL32
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# define TIMTYPE_TIM5 TIMTYPE_GENERAL32
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#endif
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#define TIMTYPE_TIM6 TIMTYPE_BASIC
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#define TIMTYPE_TIM7 TIMTYPE_BASIC
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#define TIMTYPE_TIM8 TIMTYPE_ADVANCED
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#define TIMTYPE_TIM9 TIMTYPE_COUNTUP16
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#define TIMTYPE_TIM10 TIMTYPE_COUNTUP16
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#define TIMTYPE_TIM11 TIMTYPE_COUNTUP16
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#define TIMTYPE_TIM12 TIMTYPE_COUNTUP16
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#define TIMTYPE_TIM13 TIMTYPE_COUNTUP16
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#define TIMTYPE_TIM14 TIMTYPE_COUNTUP16
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/* The maximum repetition count is 128 */
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#define PWM_MAX_COUNT 128
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/* Debug ********************************************************************/
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/* Non-standard debug that may be enabled just for testing PWM */
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@ -94,12 +130,19 @@ struct stm32_pwmtimer_s
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FAR const struct pwm_ops_s *ops; /* PWM operations */
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uint8_t timid; /* Timer ID {1,...,14} */
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uint8_t channel; /* Timer output channel: {1,..4} */
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uint8_t unused2;
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uint8_t unused3;
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uint8_t timtype; /* See the TIMTYPE_* definitions */
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#ifdef CONFIG_PWM_PULSECOUNT
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uint8_t irq; /* Timer update IRQ */
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#else
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uint8_t unused;
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#endif
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uint32_t base; /* The base address of the timer */
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uint32_t pincfg; /* Output pin configuration */
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uint32_t pclk; /* The frequency of the peripheral clock
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* that drives the timer module. */
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#ifdef CONFIG_PWM_PULSECOUNT
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FAR void * handle; /* Handle used for upper-half callback */
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#endif
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};
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/****************************************************************************
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@ -116,13 +159,38 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg);
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# define pwm_dumpregs(priv,msg)
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#endif
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/* Timer management */
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static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
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FAR const struct pwm_info_s *info);
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#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM))
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static int pwm_interrupt(struct stm32_pwmtimer_s *priv);
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#if defined(CONFIG_STM32_TIM1_PWM)
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static int pwm_tim1interrupt(int irq, void *context);
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#endif
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#if defined(CONFIG_STM32_TIM1_PWM)
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static int pwm_tim8interrupt(int irq, void *context);
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#endif
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#endif
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/* PWM driver methods */
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static int pwm_setup(FAR struct pwm_lowerhalf_s *dev);
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static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
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static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_s *info);
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#ifdef CONFIG_PWM_PULSECOUNT
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static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info,
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FAR void *handle);
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#else
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static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info);
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#endif
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static int pwm_stop(FAR struct pwm_lowerhalf_s *dev);
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static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg);
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static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
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int cmd, unsigned long arg);
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/****************************************************************************
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* Private Data
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@ -144,6 +212,10 @@ static struct stm32_pwmtimer_s g_pwm1dev =
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.ops = &g_pwmops,
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.timid = 1,
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.channel = CONFIG_STM32_TIM1_CHANNEL,
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.timtype = TIMTYPE_TIM1,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM1UP,
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#endif
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.base = STM32_TIM1_BASE,
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.pincfg = PWM_TIM1_PINCFG,
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.pclk = STM32_APB2_TIM1_CLKIN,
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@ -156,6 +228,10 @@ static struct stm32_pwmtimer_s g_pwm2dev =
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.ops = &g_pwmops,
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.timid = 2,
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.channel = CONFIG_STM32_TIM2_CHANNEL,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM2,
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#endif
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.timtype = TIMTYPE_TIM2,
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.base = STM32_TIM2_BASE,
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.pincfg = PWM_TIM2_PINCFG,
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.pclk = STM32_APB1_TIM2_CLKIN,
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@ -168,6 +244,10 @@ static struct stm32_pwmtimer_s g_pwm3dev =
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.ops = &g_pwmops,
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.timid = 3,
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.channel = CONFIG_STM32_TIM3_CHANNEL,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM3,
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#endif
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.timtype = TIMTYPE_TIM3,
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.base = STM32_TIM3_BASE,
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.pincfg = PWM_TIM3_PINCFG,
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.pclk = STM32_APB1_TIM3_CLKIN,
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@ -180,6 +260,10 @@ static struct stm32_pwmtimer_s g_pwm4dev =
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.ops = &g_pwmops,
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.timid = 4,
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.channel = CONFIG_STM32_TIM4_CHANNEL,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM4,
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#endif
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.timtype = TIMTYPE_TIM4,
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.base = STM32_TIM4_BASE,
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.pincfg = PWM_TIM4_PINCFG,
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.pclk = STM32_APB1_TIM4_CLKIN,
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@ -192,6 +276,10 @@ static struct stm32_pwmtimer_s g_pwm5dev =
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.ops = &g_pwmops,
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.timid = 5,
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.channel = CONFIG_STM32_TIM5_CHANNEL,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM5,
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#endif
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.timtype = TIMTYPE_TIM5,
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.base = STM32_TIM5_BASE,
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.pincfg = PWM_TIM5_PINCFG,
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.pclk = STM32_APB1_TIM5_CLKIN,
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@ -204,6 +292,10 @@ static struct stm32_pwmtimer_s g_pwm8dev =
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.ops = &g_pwmops,
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.timid = 8,
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.channel = CONFIG_STM32_TIM8_CHANNEL,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM8UP,
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#endif
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.timtype = TIMTYPE_TIM8,
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.base = STM32_TIM8_BASE,
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.pincfg = PWM_TIM8_PINCFG,
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.pclk = STM32_APB2_TIM8_CLKIN,
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@ -216,6 +308,10 @@ static struct stm32_pwmtimer_s g_pwm9dev =
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.ops = &g_pwmops,
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.timid = 9,
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.channel = CONFIG_STM32_TIM9_CHANNEL,
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.timtype = TIMTYPE_TIM9,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM9,
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#endif
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.base = STM32_TIM9_BASE,
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.pincfg = PWM_TIM9_PINCFG,
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.pclk = STM32_APB2_TIM9_CLKIN,
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@ -228,6 +324,10 @@ static struct stm32_pwmtimer_s g_pwm10dev =
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.ops = &g_pwmops,
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.timid = 10,
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.channel = CONFIG_STM32_TIM10_CHANNEL,
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.timtype = TIMTYPE_TIM10,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM10,
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#endif
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.base = STM32_TIM10_BASE,
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.pincfg = PWM_TIM10_PINCFG,
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.pclk = STM32_APB2_TIM10_CLKIN,
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@ -240,6 +340,10 @@ static struct stm32_pwmtimer_s g_pwm11dev =
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.ops = &g_pwmops,
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.timid = 11,
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.channel = CONFIG_STM32_TIM11_CHANNEL,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM11,
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#endif
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.timtype = TIMTYPE_TIM11,
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.base = STM32_TIM11_BASE,
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.pincfg = PWM_TIM11_PINCFG,
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.pclk = STM32_APB2_TIM11_CLKIN,
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@ -252,6 +356,10 @@ static struct stm32_pwmtimer_s g_pwm12dev =
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.ops = &g_pwmops,
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.timid = 12,
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.channel = CONFIG_STM32_TIM12_CHANNEL,
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.timtype = TIMTYPE_TIM12,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM12,
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#endif
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.base = STM32_TIM12_BASE,
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.pincfg = PWM_TIM12_PINCFG,
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.pclk = STM32_APB1_TIM12_CLKIN,
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@ -264,6 +372,10 @@ static struct stm32_pwmtimer_s g_pwm13dev =
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.ops = &g_pwmops,
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.timid = 13,
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.channel = CONFIG_STM32_TIM13_CHANNEL,
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.timtype = TIMTYPE_TIM13,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM13,
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#endif
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.base = STM32_TIM13_BASE,
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.pincfg = PWM_TIM13_PINCFG,
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.pclk = STM32_APB1_TIM13_CLKIN,
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@ -276,6 +388,10 @@ static struct stm32_pwmtimer_s g_pwm14dev =
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.ops = &g_pwmops,
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.timid = 14,
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.channel = CONFIG_STM32_TIM14_CHANNEL,
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.timtype = TIMTYPE_TIM14,
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#ifdef CONFIG_PWM_PULSECOUNT
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.irq = STM32_IRQ_TIM14,
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#endif
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.base = STM32_TIM14_BASE,
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.pincfg = PWM_TIM14_PINCFG,
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.pclk = STM32_APB1_TIM14_CLKIN,
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@ -365,7 +481,7 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
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pwm_getreg(priv, STM32_GTIM_CCR3_OFFSET),
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pwm_getreg(priv, STM32_GTIM_CCR4_OFFSET));
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#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
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if (priv->timid == 1 || priv->timid == 8)
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if (priv->timtype == TIMTYPE_ADVANCED)
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{
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pwmvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
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pwm_getreg(priv, STM32_ATIM_RCR_OFFSET),
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@ -384,89 +500,13 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
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#endif
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/****************************************************************************
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* Name: pwm_setup
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*
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* Description:
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* This method is called when the driver is opened. The lower half driver
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* should configure and initialize the device so that it is ready for use.
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* It should not, however, output pulses until the start method is called.
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*
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* Input parameters:
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* dev - A reference to the lower half PWM driver state structure
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure
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*
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* Assumptions:
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* AHB1 or 2 clocking for the GPIOs and timer has already been configured
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* by the RCC logic at power up.
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*
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****************************************************************************/
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static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
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{
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FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
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pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
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pwm_dumpregs(priv, "Initially");
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/* Configure the PWM output pin, but do not start the timer yet */
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stm32_configgpio(priv->pincfg);
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return OK;
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}
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/****************************************************************************
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* Name: pwm_shutdown
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*
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* Description:
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* This method is called when the driver is closed. The lower half driver
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* stop pulsed output, free any resources, disable the timer hardware, and
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* put the system into the lowest possible power usage state
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*
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* Input parameters:
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* dev - A reference to the lower half PWM driver state structure
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure
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*
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****************************************************************************/
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static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
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{
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FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
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uint32_t pincfg;
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pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
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/* Make sure that the output has been stopped */
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pwm_stop(dev);
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/* Then put the GPIO pin back to the default state */
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pincfg = priv->pincfg & (GPIO_PORT_MASK|GPIO_PIN_MASK);
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#if defined(CONFIG_STM32_STM32F10XX)
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pincfg |= (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT);
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#elif defined(CONFIG_STM32_STM32F40XX)
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pincfg |= (GPIO_INPUT|GPIO_FLOAT);
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#else
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# error "Unrecognized STM32 chip"
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#endif
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stm32_configgpio(pincfg);
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return OK;
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}
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/****************************************************************************
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* Name: pwm_start
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* Name: pwm_timer
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*
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* Description:
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* (Re-)initialize the timer resources and start the pulsed output
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*
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* Input parameters:
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* dev - A reference to the lower half PWM driver state structure
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* priv - A reference to the lower half PWM driver state structure
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* info - A reference to the characteristics of the pulsed output
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*
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* Returned Value:
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@ -474,10 +514,9 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
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*
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****************************************************************************/
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static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_s *info)
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static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
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FAR const struct pwm_info_s *info)
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{
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FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
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/* Calculated values */
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uint32_t prescaler;
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@ -505,6 +544,13 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
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priv->timid, priv->channel, info->frequency, info->duty);
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DEBUGASSERT(info->frequency > 0 && info->duty > 0 && info->duty < uitoub16(100));
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/* Disable all interrupts and DMA requests, clear all pending status */
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#ifdef CONFIG_PWM_PULSECOUNT
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pwm_putreg(priv, STM32_GTIM_DIER_OFFSET, 0);
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pwm_putreg(priv, STM32_GTIM_SR_OFFSET, 0);
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#endif
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/* Calculate optimal values for the timer prescaler and for the timer reload
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* register. If' frequency' is the desired frequency, then
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*
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@ -585,24 +631,25 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
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cr1 &= ~GTIM_CR1_CEN;
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/* Set the counter mode for the advanced timers (1,8) and most general
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* purpose timers (2-5, but not 9-14):
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* purpose timers (all 2-5, but not 9-14), i.e., all but TIMTYPE_COUNTUP16
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* and TIMTYPE_BASIC
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*/
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#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM2_PWM) || \
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defined(CONFIG_STM32_TIM3_PWM) || defined(CONFIG_STM32_TIM4_PWM) || \
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defined(CONFIG_STM32_TIM5_PWM) || defined(CONFIG_STM32_TIM8_PWM)
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if ((priv->timid >= 1 && priv->timid <= 5) || priv->timid == 8)
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if (priv->timtype != TIMTYPE_BASIC && priv->timtype != TIMTYPE_COUNTUP16)
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{
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/* Select the Counter Mode == count up:
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*
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* ATIM_CR1_EDGE: The counter counts up or down depending on the
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* GTIM_CR1_EDGE: The counter counts up or down depending on the
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* direction bit(DIR).
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* ATIM_CR1_DIR: 0: count up, 1: count down
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* GTIM_CR1_DIR: 0: count up, 1: count down
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*/
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|
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cr1 &= ~(ATIM_CR1_DIR | ATIM_CR1_CMS_MASK);
|
||||
cr1 |= ATIM_CR1_EDGE;
|
||||
cr1 &= ~(GTIM_CR1_DIR | GTIM_CR1_CMS_MASK);
|
||||
cr1 |= GTIM_CR1_EDGE;
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -618,13 +665,30 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
|
||||
pwm_putreg(priv, STM32_GTIM_ARR_OFFSET, (uint16_t)reload);
|
||||
pwm_putreg(priv, STM32_GTIM_PSC_OFFSET, (uint16_t)(prescaler - 1));
|
||||
|
||||
/* Clear the advanced timers repitition counter in all but the advanced timers */
|
||||
/* Set the advanced timer's repitition counter */
|
||||
|
||||
#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
|
||||
if (priv->timid == 1 || priv->timid == 8)
|
||||
if (priv->timtype == TIMTYPE_ADVANCED)
|
||||
{
|
||||
/* If a non-zero repetition count has been selected, then set the
|
||||
* repitition counter to the count-1 (pwm_start() has already
|
||||
* assured us that the count value is within range).
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
if (info->count > 0)
|
||||
{
|
||||
pwm_putreg(priv, STM32_ATIM_RCR_OFFSET, info->count - 1);
|
||||
}
|
||||
|
||||
/* Otherwise, just clear the repitition counter */
|
||||
|
||||
else
|
||||
#endif
|
||||
{
|
||||
pwm_putreg(priv, STM32_ATIM_RCR_OFFSET, 0);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Generate an update event to reload the prescaler (all timers) */
|
||||
@ -747,7 +811,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
|
||||
/* Some special setup for advanced timers */
|
||||
|
||||
#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
|
||||
if (priv->timid == 1 || priv->timid == 8)
|
||||
if (priv->timtype == TIMTYPE_ADVANCED)
|
||||
{
|
||||
/* Reset output N polarity level, output N state, output compre state,
|
||||
* output compare N idle state.
|
||||
@ -789,15 +853,238 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
|
||||
cr1 |= GTIM_CR1_ARPE;
|
||||
pwm_putreg(priv, STM32_GTIM_CR1_OFFSET, cr1);
|
||||
|
||||
/* And, finally, enable the timer */
|
||||
/* Setup update interrupt. If info->count is > 0, then we can be
|
||||
* assured that pwm_start() has already verified: (1) that this is an
|
||||
* advanced timer, and that (2) the repetitioncount is within range.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
if (info->count > 0)
|
||||
{
|
||||
/* Enable the update interrupt. */
|
||||
|
||||
pwm_putreg(priv, STM32_GTIM_DIER_OFFSET, ATIM_DIER_UIE);
|
||||
|
||||
/* Enable the timer */
|
||||
|
||||
cr1 |= GTIM_CR1_CEN;
|
||||
pwm_putreg(priv, STM32_GTIM_CR1_OFFSET, cr1);
|
||||
|
||||
/* And enable timer interrupts at the NVIC */
|
||||
|
||||
up_enable_irq(priv->irq);
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
/* Just enable the timer, leaving all interrupts disabled */
|
||||
|
||||
cr1 |= GTIM_CR1_CEN;
|
||||
pwm_putreg(priv, STM32_GTIM_CR1_OFFSET, cr1);
|
||||
}
|
||||
|
||||
pwm_dumpregs(priv, "After starting");
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pwm_interrupt
|
||||
*
|
||||
* Description:
|
||||
* Handle timer interrupts.
|
||||
*
|
||||
* Input parameters:
|
||||
* priv - A reference to the lower half PWM driver state structure
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM))
|
||||
static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
|
||||
{
|
||||
/* Verify that this is an update interrupt. Nothing else is expected. */
|
||||
|
||||
pwmllvdbg("Update interrupt: %04x\n", pwm_getreg(STM32_GTIM_SR_OFFSET));
|
||||
DEBUGASSERT((pwm_getreg(STM32_GTIM_SR_OFFSET) & ATIM_SR_UIF) != 0);
|
||||
|
||||
/* Disable further interrupts and stop the timer */
|
||||
|
||||
(void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv)
|
||||
|
||||
/* Then perform the callback into the upper half driver */
|
||||
|
||||
pwm_expired(priv->handle);
|
||||
priv->handle = NULL;
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pwm_tim1/8interrupt
|
||||
*
|
||||
* Description:
|
||||
* Handle timer 1 and 8 interrupts.
|
||||
*
|
||||
* Input parameters:
|
||||
* Standard NuttX interrupt inputs
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32_TIM1_PWM)
|
||||
static int pwm_tim1interrupt(int irq, void *context)
|
||||
{
|
||||
return pwm_interrupt(&g_pwm1dev);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32_TIM8_PWM)
|
||||
static int pwm_tim8interrupt(int irq, void *context)
|
||||
{
|
||||
return pwm_interrupt(&g_pwm8dev);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pwm_setup
|
||||
*
|
||||
* Description:
|
||||
* This method is called when the driver is opened. The lower half driver
|
||||
* should configure and initialize the device so that it is ready for use.
|
||||
* It should not, however, output pulses until the start method is called.
|
||||
*
|
||||
* Input parameters:
|
||||
* dev - A reference to the lower half PWM driver state structure
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
* Assumptions:
|
||||
* AHB1 or 2 clocking for the GPIOs and timer has already been configured
|
||||
* by the RCC logic at power up.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
|
||||
{
|
||||
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
|
||||
|
||||
pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
|
||||
pwm_dumpregs(priv, "Initially");
|
||||
|
||||
/* Configure the PWM output pin, but do not start the timer yet */
|
||||
|
||||
stm32_configgpio(priv->pincfg);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pwm_shutdown
|
||||
*
|
||||
* Description:
|
||||
* This method is called when the driver is closed. The lower half driver
|
||||
* stop pulsed output, free any resources, disable the timer hardware, and
|
||||
* put the system into the lowest possible power usage state
|
||||
*
|
||||
* Input parameters:
|
||||
* dev - A reference to the lower half PWM driver state structure
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
|
||||
{
|
||||
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
|
||||
uint32_t pincfg;
|
||||
|
||||
pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
|
||||
|
||||
/* Make sure that the output has been stopped */
|
||||
|
||||
pwm_stop(dev);
|
||||
|
||||
/* Then put the GPIO pin back to the default state */
|
||||
|
||||
pincfg = priv->pincfg & (GPIO_PORT_MASK|GPIO_PIN_MASK);
|
||||
|
||||
#if defined(CONFIG_STM32_STM32F10XX)
|
||||
pincfg |= (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT);
|
||||
#elif defined(CONFIG_STM32_STM32F40XX)
|
||||
pincfg |= (GPIO_INPUT|GPIO_FLOAT);
|
||||
#else
|
||||
# error "Unrecognized STM32 chip"
|
||||
#endif
|
||||
|
||||
stm32_configgpio(pincfg);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pwm_start
|
||||
*
|
||||
* Description:
|
||||
* (Re-)initialize the timer resources and start the pulsed output
|
||||
*
|
||||
* Input parameters:
|
||||
* dev - A reference to the lower half PWM driver state structure
|
||||
* info - A reference to the characteristics of the pulsed output
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
|
||||
FAR const struct pwm_info_s *info,
|
||||
FAR void *handle)
|
||||
{
|
||||
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
|
||||
|
||||
/* Check if a pulsecount has been selected */
|
||||
|
||||
if (info->count > 0)
|
||||
{
|
||||
/* Only the advanced timers (TIM1,8 can support the pulse counting) */
|
||||
|
||||
if (priv->timtype != TIMTYPE_ADVANCED)
|
||||
{
|
||||
pwmdbg("ERROR: TIM%d cannot support pulse count: %d\n",
|
||||
priv->timid, info->count);
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
/* The maximum repetition count supported by the advanced timers
|
||||
* is PWM_MAX_COUNT.
|
||||
*/
|
||||
|
||||
if (info->count > PWM_MAX_COUNT)
|
||||
{
|
||||
pwmdbg("ERROR: TIM%d count=%d exceeds maximum repeition count: %d\n",
|
||||
priv->timid, info->count, PWM_MAX_COUNT);
|
||||
return -EDOM;
|
||||
}
|
||||
}
|
||||
|
||||
/* Start the time */
|
||||
|
||||
return pwm_timer(priv, info);
|
||||
}
|
||||
#else
|
||||
static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
|
||||
FAR const struct pwm_info_s *info)
|
||||
{
|
||||
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
|
||||
return pwm_timer(priv, info);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pwm_stop
|
||||
*
|
||||
@ -810,6 +1097,11 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_
|
||||
* Returned Value:
|
||||
* Zero on success; a negated errno value on failure
|
||||
*
|
||||
* Assumptions:
|
||||
* This function is called to stop the pulsed output at anytime. This
|
||||
* method is also called from the timer interrupt handler when a repetition
|
||||
* count expires... automatically stopping the timer.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
|
||||
@ -822,6 +1114,19 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
|
||||
|
||||
pwmvdbg("TIM%d\n", priv->timid);
|
||||
|
||||
/* Disable interrupts momentary to stop any ongoing timer processing and
|
||||
* to prevent any concurrent access to the reset register.
|
||||
*/
|
||||
|
||||
flags = irqsave();
|
||||
|
||||
/* Disable further interrupts and stop the timer */
|
||||
|
||||
pwm_putreg(priv, STM32_GTIM_DIER_OFFSET, 0);
|
||||
pwm_putreg(priv, STM32_GTIM_SR_OFFSET, 0);
|
||||
|
||||
/* Determine which timer to reset */
|
||||
|
||||
switch (priv->timid)
|
||||
{
|
||||
#ifdef CONFIG_STM32_TIM1_PWM
|
||||
@ -898,12 +1203,6 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Disable interrupts momentary to stop any ongoing timer processing and
|
||||
* to prevent any concurrent access to the reset register.
|
||||
*/
|
||||
|
||||
flags = irqsave();
|
||||
|
||||
/* Reset the timer - stopping the output and putting the timer back
|
||||
* into a state where pwm_start() can be called.
|
||||
*/
|
||||
@ -981,63 +1280,89 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer)
|
||||
#ifdef CONFIG_STM32_TIM1_PWM
|
||||
case 1:
|
||||
lower = &g_pwm1dev;
|
||||
|
||||
/* Attach but disable the TIM1 update interrupt */
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
irq_attach(lower->irq, pwm_tim1interrupt);
|
||||
up_disable_irq(lower->irq);
|
||||
#endif
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM2_PWM
|
||||
case 2:
|
||||
lower = &g_pwm2dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM3_PWM
|
||||
case 3:
|
||||
lower = &g_pwm3dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM4_PWM
|
||||
case 4:
|
||||
lower = &g_pwm4dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM5_PWM
|
||||
case 5:
|
||||
lower = &g_pwm5dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM8_PWM
|
||||
case 8:
|
||||
lower = &g_pwm8dev;
|
||||
|
||||
/* Attach but disable the TIM8 update interrupt */
|
||||
|
||||
#ifdef CONFIG_PWM_PULSECOUNT
|
||||
irq_attach(lower->irq, pwm_tim8interrupt);
|
||||
up_disable_irq(lower->irq);
|
||||
#endif
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM9_PWM
|
||||
case 9:
|
||||
lower = &g_pwm9dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM10_PWM
|
||||
case 10:
|
||||
lower = &g_pwm10dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM11_PWM
|
||||
case 11:
|
||||
lower = &g_pwm11dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM12_PWM
|
||||
case 12:
|
||||
lower = &g_pwm12dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM13_PWM
|
||||
case 13:
|
||||
lower = &g_pwm13dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_TIM14_PWM
|
||||
case 14:
|
||||
lower = &g_pwm14dev;
|
||||
break;
|
||||
#endif
|
||||
|
||||
default:
|
||||
pwmdbg("No such timer configured\n");
|
||||
return NULL;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user