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Add eZ80F91 EMAC driver

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1450 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2008-12-12 16:57:52 +00:00
parent 08b005f616
commit 38a851bdcf
4 changed files with 1824 additions and 7 deletions
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10
arch/z80/src/common/up_internal.h
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@ -165,9 +165,17 @@ EXTERN void up_timerhook(void);
/* Defined in board/up_network.c */ /* Defined in board/up_network.c */
#ifdef CONFIG_NET #ifdef CONFIG_NET
EXTERN void up_netinitialize(void); EXTERN int up_netinitialize(void);
EXTERN void up_netuninitialize(void);
# ifdef CONFIG_ARCH_MCFILTER
EXTERN int up_multicastfilter(FAR struct uip_driver_s *dev, FAR ubyte *mac, boolean enable);
# else
# define up_multicastfilter(dev, mac, enable)
# endif
#else #else
# define up_netinitialize() # define up_netinitialize()
# define up_netuninitialize()
# define up_multicastfilter(dev, mac, enable)
#endif #endif
/* Return the current value of the stack pointer (used in stack dump logic) */ /* Return the current value of the stack pointer (used in stack dump logic) */

6
arch/z80/src/ez80/Make.defs
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@ -48,7 +48,13 @@ CHIP_ASRCS = ez80_startup.asm ez80_io.asm ez80_irqsave.asm \
ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y) ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
CHIP_ASRCS += ez80f91_init.asm CHIP_ASRCS += ez80f91_init.asm
endif endif
CHIP_SSRCS = CHIP_SSRCS =
CHIP_CSRCS = ez80_initialstate.c ez80_irq.c ez80_copystate.c \ CHIP_CSRCS = ez80_initialstate.c ez80_irq.c ez80_copystate.c \
ez80_schedulesigaction.c ez80_sigdeliver.c ez80_timerisr.c \ ez80_schedulesigaction.c ez80_sigdeliver.c ez80_timerisr.c \
ez80_lowuart.c ez80_serial.c ez80_registerdump.c ez80_lowuart.c ez80_serial.c ez80_registerdump.c
ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
ifeq ($(CONFIG_EZ80_EMAC),y)
CHIP_CSRCS += ez80_emac.c
endif
endif

1803
arch/z80/src/ez80/ez80_emac.c Normal file
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File diff suppressed because it is too large Load Diff

12
arch/z80/src/ez80/ez80f91_emac.h
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@ -123,12 +123,12 @@
/* EMAC bufsize register bit settings ***********************************************/ /* EMAC bufsize register bit settings ***********************************************/
#define EMAC_BUFSIZ_BUFSZMASK 0xc0 /* Bits 6-6: Rx/Tx buffer size */ #define EMAC_BUFSZ_BUFSZMASK 0xc0 /* Bits 6-6: Rx/Tx buffer size */
# define EMAC_BUFSIZ_256b 0x00 /* EMAC Rx/Tx buffer size = 256 bytes */ # define EMAC_BUFSZ_256b 0x00 /* EMAC Rx/Tx buffer size = 256 bytes */
# define EMAC_BUFSIZ_128b 0x40 /* EMAC Rx/Tx buffer size = 128 bytes */ # define EMAC_BUFSZ_128b 0x40 /* EMAC Rx/Tx buffer size = 128 bytes */
# define EMAC_BUFSIZ_64b 0x80 /* EMAC Rx/Tx buffer size = 64 bytes */ # define EMAC_BUFSZ_64b 0x80 /* EMAC Rx/Tx buffer size = 64 bytes */
# define EMAC_BUFSIZ_32b 0xc0 /* EMAC Rx/Tx buffer size = 32 bytes */ # define EMAC_BUFSZ_32b 0xc0 /* EMAC Rx/Tx buffer size = 32 bytes */
#define EMAC_BUFSIZ_TPCFLMASK 0x3f /* Bits 0-5: Tranmsit pause frame level */ #define EMAC_BUFSZ_TPCFLMASK 0x3f /* Bits 0-5: Tranmsit pause frame level */
/* EMAC interrupt enable register bit settings **************************************/ /* EMAC interrupt enable register bit settings **************************************/