Fix confusion about what is a page of data and what is a page of L2 page table; restructure functions to reduce duplicated logic
This commit is contained in:
Gregory Nutt
parent
d52599fe8e
commit
3a44227caa
@ -79,6 +79,7 @@
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#include <arch/arch.h>
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#include <arch/irq.h>
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#include "cache.h"
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#include "mmu.h"
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#ifdef CONFIG_ARCH_ADDRENV
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@ -144,6 +145,172 @@ static void set_l2_entry(FAR uint32_t *l2table, uintptr_t paddr,
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l2table[index] = (paddr | mmuflags);
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}
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/****************************************************************************
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* Name: up_addrenv_create_region
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*
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* Description:
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* Destroy one memory region.
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*
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****************************************************************************/
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int up_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
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uintptr_t vaddr, size_t regionsize,
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uint32_t mmuflags)
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{
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irqstate_t flags;
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uintptr_t paddr;
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FAR uint32_t *l2table;
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uint32_t l1save;
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size_t nmapped;
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unsigned int npages;
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unsigned int i;
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unsigned int j;
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bvdbg("listlen=%d vaddr=%08lx regionsize=%ld, mmuflags=%08x\n",
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listlen, (unsigned long)vaddr, (unsigned long)regionsize,
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(unsigned int)mmuflags);
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/* Verify that we are configured with enough virtual address space to
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* support this memory region.
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*/
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npages = MM_NPAGES(regionsize);
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if (npages > listlen)
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{
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bdbg("ERROR: npages=%u listlen=%u\n", npages, listlen);
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return -E2BIG;
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}
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/* Back the allocation up with physical pages and set up the level mapping
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* (which of course does nothing until the L2 page table is hooked into
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* the L1 page table).
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*/
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nmapped = 0;
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for (i = 0; i < npages; i++)
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{
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/* Allocate one physical page for the L2 page table */
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paddr = mm_pgalloc(1);
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if (!paddr)
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{
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return -ENOMEM;
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}
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DEBUGASSERT(MM_ISALIGNED(paddr));
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list[i] = (FAR uint32_t *)paddr;
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/* Temporarily map the page into the virtual address space */
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flags = irqsave();
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l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
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mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE, MMU_MEMFLAGS);
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l2table = (FAR uint32_t *)(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
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/* Initialize the page table */
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memset(l2table, 0, ENTRIES_PER_L2TABLE * sizeof(uint32_t));
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/* Back up L2 entries with physical memory */
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for (j = 0; j < ENTRIES_PER_L2TABLE && nmapped < regionsize; j++)
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{
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/* Allocate one physical page for region data */
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paddr = mm_pgalloc(1);
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if (!paddr)
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{
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mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
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irqrestore(flags);
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return -ENOMEM;
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}
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/* Map the .text region virtual address to this physical address */
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set_l2_entry(l2table, paddr, vaddr, mmuflags);
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nmapped += MM_PGSIZE;
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vaddr += MM_PGSIZE;
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}
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/* Make sure that the initialized L2 table is flushed to physical
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* memory.
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*/
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arch_flush_dcache((uintptr_t)l2table,
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(uintptr_t)l2table +
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ENTRIES_PER_L2TABLE * sizeof(uint32_t));
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/* Restore the original L1 page table entry */
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mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
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irqrestore(flags);
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}
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return OK;
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}
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/****************************************************************************
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* Name: up_addrenv_destroy_region
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*
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* Description:
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* Destroy one memory region.
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*
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****************************************************************************/
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void up_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
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uintptr_t vaddr)
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{
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irqstate_t flags;
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uintptr_t paddr;
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FAR uint32_t *l2table;
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uint32_t l1save;
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int i;
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int j;
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bvdbg("listlen=%d vaddr=%08lx\n", listlen, (unsigned long)vaddr);
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for (i = 0; i < listlen; vaddr += SECTION_SIZE, list++, i++)
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{
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/* Unhook the L2 page table from the L1 page table */
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mmu_l1_clrentry(vaddr);
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/* Has this page table been allocated? */
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paddr = (uintptr_t)list[i];
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if (paddr != 0)
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{
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/* Temporarily map the page into the virtual address space */
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flags = irqsave();
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l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
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mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE, MMU_MEMFLAGS);
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l2table = (FAR uint32_t *)(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
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/* Return the allocated pages to the page allocator */
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for (j = 0; j < ENTRIES_PER_L2TABLE; j++)
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{
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paddr = *l2table++;
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if (paddr != 0)
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{
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paddr &= PTE_SMALL_PADDR_MASK;
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mm_pgfree(paddr, 1);
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}
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}
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/* Restore the original L1 page table entry */
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mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
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irqrestore(flags);
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/* And free the L2 page table itself */
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mm_pgfree((uintptr_t)list[i], 1);
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}
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}
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -173,16 +340,6 @@ static void set_l2_entry(FAR uint32_t *l2table, uintptr_t paddr,
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int up_addrenv_create(size_t textsize, size_t datasize,
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FAR group_addrenv_t *addrenv)
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{
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irqstate_t flags;
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uintptr_t vaddr;
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uintptr_t paddr;
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FAR uint32_t *l2table;
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uint32_t l1save;
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size_t nmapped;
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unsigned int ntextpages;
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unsigned int ndatapages;
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unsigned int i;
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unsigned int j;
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int ret;
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bvdbg("addrenv=%p textsize=%lu datasize=%lu\n",
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@ -194,18 +351,6 @@ int up_addrenv_create(size_t textsize, size_t datasize,
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memset(addrenv, 0, sizeof(group_addrenv_t));
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/* Verify that we are configured with enough virtual address space to
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* support this address environment.
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*/
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ntextpages = MM_NPAGES(textsize);
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ndatapages = MM_NPAGES(datasize);
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if (ntextpages > ARCH_TEXT_NSECTS || ndatapages > ARCH_DATA_NSECTS)
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{
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return -E2BIG;
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}
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/* Back the allocation up with physical pages and set up the level mapping
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* (which of course does nothing until the L2 page table is hooked into
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* the L1 page table).
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@ -213,88 +358,24 @@ int up_addrenv_create(size_t textsize, size_t datasize,
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/* Allocate .text space pages */
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vaddr = CONFIG_ARCH_TEXT_VBASE;
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nmapped = 0;
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for (i = 0; i < ntextpages; i++)
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ret = up_addrenv_create_region(addrenv->text, ARCH_TEXT_NSECTS,
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CONFIG_ARCH_TEXT_VBASE, textsize,
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MMU_L2_TEXTFLAGS);
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if (ret < 0)
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{
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/* Allocate one physical page */
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paddr = mm_pgalloc(1);
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if (!paddr)
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{
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ret = -ENOMEM;
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goto errout;
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}
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DEBUGASSERT(MM_ISALIGNED(paddr));
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addrenv->text[i] = (FAR uint32_t *)paddr;
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/* Temporarily map the page into the virtual address space */
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flags = irqsave();
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l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
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mmu_l1_setentry(paddr, ARCH_SCRATCH_VBASE, MMU_MEMFLAGS);
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l2table = (FAR uint32_t *)ARCH_SCRATCH_VBASE;
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/* Initialize the page table */
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memset(l2table, 0, ENTRIES_PER_L2TABLE * sizeof(uint32_t));
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for (j = 0; j < ENTRIES_PER_L2TABLE && nmapped < textsize; j++)
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{
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set_l2_entry(l2table, paddr, vaddr, MMU_L2_TEXTFLAGS);
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nmapped += MM_PGSIZE;
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paddr += MM_PGSIZE;
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vaddr += MM_PGSIZE;
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}
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/* Restore the original L1 page table entry */
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mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
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irqrestore(flags);
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bdbg("ERROR: Failed to create .text region: %d\n", ret);
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goto errout;
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}
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/* Allocate .bss/.data space pages */
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vaddr = CONFIG_ARCH_DATA_VBASE;
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nmapped = 0;
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for (i = 0; i < ndatapages; i++)
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ret = up_addrenv_create_region(addrenv->data, ARCH_DATA_NSECTS,
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CONFIG_ARCH_DATA_VBASE, datasize,
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MMU_L2_DATAFLAGS);
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if (ret < 0)
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{
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/* Allocate one physical page */
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paddr = mm_pgalloc(1);
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if (!paddr)
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{
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ret = -ENOMEM;
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goto errout;
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}
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DEBUGASSERT(MM_ISALIGNED(paddr));
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addrenv->data[i] = (FAR uint32_t *)paddr;
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/* Temporarily map the page into the virtual address space */
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flags = irqsave();
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l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
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mmu_l1_setentry(paddr, ARCH_SCRATCH_VBASE, MMU_MEMFLAGS);
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l2table = (FAR uint32_t *)ARCH_SCRATCH_VBASE;
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/* Initialize the page table */
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memset(l2table, 0, ENTRIES_PER_L2TABLE * sizeof(uint32_t));
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for (j = 0; j < ENTRIES_PER_L2TABLE && nmapped < datasize; j++)
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{
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set_l2_entry(l2table, paddr, vaddr, MMU_L2_DATAFLAGS);
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nmapped += MM_PGSIZE;
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paddr += MM_PGSIZE;
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vaddr += MM_PGSIZE;
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}
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/* Restore the original L1 page table entry */
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mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
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irqrestore(flags);
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bdbg("ERROR: Failed to create .bss/.data region: %d\n", ret);
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goto errout;
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}
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/* Notice that no pages are yet allocated for the heap */
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@ -324,45 +405,24 @@ errout:
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int up_addrenv_destroy(FAR group_addrenv_t *addrenv)
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{
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uintptr_t vaddr;
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int i;
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bvdbg("addrenv=%p\n", addrenv);
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DEBUGASSERT(addrenv);
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for (vaddr = CONFIG_ARCH_TEXT_VBASE, i = 0;
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i < ARCH_TEXT_NSECTS;
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vaddr += SECTION_SIZE, i++)
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{
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mmu_l1_clrentry(vaddr);
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if (addrenv->text[i])
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{
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mm_pgfree((uintptr_t)addrenv->text[i], ARCH_SECT2PG(1));
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}
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}
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/* Destroy the .text region */
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for (vaddr = CONFIG_ARCH_DATA_VBASE, i = 0;
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i < ARCH_DATA_NSECTS;
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vaddr += SECTION_SIZE, i++)
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{
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mmu_l1_clrentry(vaddr);
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if (addrenv->data[i])
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{
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mm_pgfree((uintptr_t)addrenv->data[i], ARCH_SECT2PG(1));
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}
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}
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up_addrenv_destroy_region(addrenv->text, ARCH_TEXT_NSECTS,
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CONFIG_ARCH_TEXT_VBASE);
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/* Destroy the .bss/.data region */
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up_addrenv_destroy_region(addrenv->data, ARCH_DATA_NSECTS,
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CONFIG_ARCH_DATA_VBASE);
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#if 0 /* Not yet implemented */
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for (vaddr = CONFIG_ARCH_HEAP_VBASE, i = 0;
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i < ARCH_HEAP_NSECTS;
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vaddr += SECTION_SIZE, i++)
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{
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mmu_l1_clrentry(vaddr);
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if (addrenv->heap[i])
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{
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mm_pgfree((uintptr_t)addrenv->heap[i], ARCH_SECT2PG(1));
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}
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}
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/* Destroy the heap region */
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up_addrenv_destroy_region(addrenv->heap, ARCH_HEAP_NSECTS,
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CONFIG_ARCH_HEAP_VBASE);
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#endif
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memset(addrenv, 0, sizeof(group_addrenv_t));
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