arch: imxrt: Fix CONFIG_IMXRT_ENET_ENHANCEDBD

Summary:
- I noticed that CONFIG_IMXRT_ENET_ENHANCEDBD is not correctly
  used though it is defined in Kconfig.
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with imxrt1060-evk:netnsh_dcache_wb (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
This commit is contained in:
Masayuki Ishikawa 2023-02-20 16:37:37 +09:00 committed by Xiang Xiao
parent e6e2017d3c
commit 3a4542f3c4
2 changed files with 9 additions and 8 deletions

View File

@ -640,7 +640,7 @@
/* Legacy Buffer Descriptor */ /* Legacy Buffer Descriptor */
#ifdef CONFIG_ENET_ENHANCEDBD #ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
#ifdef IMXRT_USE_DBSWAP #ifdef IMXRT_USE_DBSWAP
/* When DBSWP is used to swap the bytes in hardware, it is done 32-bits /* When DBSWP is used to swap the bytes in hardware, it is done 32-bits
* at a time. Therefore, all 16 bit elements need to be swapped to * at a time. Therefore, all 16 bit elements need to be swapped to
@ -675,7 +675,7 @@ struct enet_desc_s
uint32_t reserved2; /* unused */ uint32_t reserved2; /* unused */
}; };
#endif /* IMXRT_USE_DBSWAP */ #endif /* IMXRT_USE_DBSWAP */
#else /* CONFIG_ENET_ENHANCEDBD */ #else /* CONFIG_IMXRT_ENET_ENHANCEDBD */
#ifdef IMXRT_USE_DBSWAP #ifdef IMXRT_USE_DBSWAP
struct enet_desc_s struct enet_desc_s
{ {
@ -691,7 +691,7 @@ struct enet_desc_s
uint8_t *data; /* Buffer address */ uint8_t *data; /* Buffer address */
}; };
#endif /* IMXRT_USE_DBSWAP */ #endif /* IMXRT_USE_DBSWAP */
#endif /* CONFIG_ENET_ENHANCEDBD */ #endif /* CONFIG_IMXRT_ENET_ENHANCEDBD */
/**************************************************************************** /****************************************************************************
* Public Data * Public Data

View File

@ -159,7 +159,8 @@
* REVISIT: The size of descriptors and buffers must also be in even units * REVISIT: The size of descriptors and buffers must also be in even units
* of the cache line size That is because the operations to clean and * of the cache line size That is because the operations to clean and
* invalidate the cache will operate on a full 32-byte cache line. If * invalidate the cache will operate on a full 32-byte cache line. If
* CONFIG_ENET_ENHANCEDBD is selected, then the size of the descriptor is * CONFIG_IMXRT_ENET_ENHANCEDBD is selected,
* then the size of the descriptor is
* 32-bytes (and probably already the correct size for the cache line); * 32-bytes (and probably already the correct size for the cache line);
* otherwise, the size of the descriptors much smaller, only 8 bytes. * otherwise, the size of the descriptors much smaller, only 8 bytes.
*/ */
@ -665,7 +666,7 @@ static int imxrt_transmit(struct imxrt_driver_s *priv)
*/ */
txdesc->length = imxrt_swap16(priv->dev.d_len); txdesc->length = imxrt_swap16(priv->dev.d_len);
#ifdef CONFIG_IMXRT_ENETENHANCEDBD #ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
txdesc->bdu = 0x00000000; txdesc->bdu = 0x00000000;
txdesc->status2 = TXDESC_INT | TXDESC_TS; /* | TXDESC_IINS | TXDESC_PINS; */ txdesc->status2 = TXDESC_INT | TXDESC_TS; /* | TXDESC_IINS | TXDESC_PINS; */
#endif #endif
@ -1343,7 +1344,7 @@ static int imxrt_ifup_action(struct net_driver_s *dev, bool resetphy)
/* Select legacy of enhanced buffer descriptor format */ /* Select legacy of enhanced buffer descriptor format */
#ifdef CONFIG_IMXRT_ENETENHANCEDBD #ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
imxrt_enet_putreg32(priv, ENET_ECR_EN1588, IMXRT_ENET_ECR_OFFSET); imxrt_enet_putreg32(priv, ENET_ECR_EN1588, IMXRT_ENET_ECR_OFFSET);
#else #else
imxrt_enet_putreg32(priv, 0, IMXRT_ENET_ECR_OFFSET); imxrt_enet_putreg32(priv, 0, IMXRT_ENET_ECR_OFFSET);
@ -2608,7 +2609,7 @@ static void imxrt_initbuffers(struct imxrt_driver_s *priv)
priv->txdesc[i].status1 = 0; priv->txdesc[i].status1 = 0;
priv->txdesc[i].length = 0; priv->txdesc[i].length = 0;
priv->txdesc[i].data = (uint8_t *)imxrt_swap32((uint32_t)addr); priv->txdesc[i].data = (uint8_t *)imxrt_swap32((uint32_t)addr);
#ifdef CONFIG_IMXRT_ENETENHANCEDBD #ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
priv->txdesc[i].status2 = TXDESC_IINS | TXDESC_PINS; priv->txdesc[i].status2 = TXDESC_IINS | TXDESC_PINS;
#endif #endif
addr += ALIGNED_BUFSIZE; addr += ALIGNED_BUFSIZE;
@ -2621,7 +2622,7 @@ static void imxrt_initbuffers(struct imxrt_driver_s *priv)
priv->rxdesc[i].status1 = RXDESC_E; priv->rxdesc[i].status1 = RXDESC_E;
priv->rxdesc[i].length = 0; priv->rxdesc[i].length = 0;
priv->rxdesc[i].data = (uint8_t *)imxrt_swap32((uint32_t)addr); priv->rxdesc[i].data = (uint8_t *)imxrt_swap32((uint32_t)addr);
#ifdef CONFIG_IMXRT_ENETENHANCEDBD #ifdef CONFIG_IMXRT_ENET_ENHANCEDBD
priv->rxdesc[i].bdu = 0; priv->rxdesc[i].bdu = 0;
priv->rxdesc[i].status2 = RXDESC_INT; priv->rxdesc[i].status2 = RXDESC_INT;
#endif #endif