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arch/c5471/include and arch/dm320/include are not identical. This is in preparation to replace arch/c5471 and arch/dm320 with arch/arm

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@186 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2007-04-26 00:44:27 +00:00
parent bbf383d960
commit 3a7df4b3ae
8 changed files with 69 additions and 140 deletions
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8
arch/c5471/include/arch.h
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@ -1,5 +1,5 @@
/************************************************************
* arch.h
* arch/arch.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -37,8 +37,8 @@
* only indirectly through nuttx/arch.h
*/
#ifndef __ARCH_C5471_ARCH_H
#define __ARCH_C5471_ARCH_H
#ifndef __ARCH_ARCH_H
#define __ARCH_ARCH_H
/************************************************************
* Included Files
@ -76,5 +76,5 @@ extern "C" {
}
#endif
#endif /* __ARCH_C5471_ARCH_H */
#endif /* __ARCH_ARCH_H */

107
arch/c5471/include/irq.h
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@ -1,5 +1,5 @@
/************************************************************
* irq.h
* arch/irq.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -37,13 +37,15 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_C5471_IRQ_H
#define __ARCH_C5471_IRQ_H
#ifndef __ARCH_IRQ_H
#define __ARCH_IRQ_H
/************************************************************
* Included Files
************************************************************/
#include <arch/chip/irq.h>
/************************************************************
* Definitions
************************************************************/
@ -60,68 +62,45 @@
* xcp.regs array:
*/
#define REG_R0 (0)
#define REG_R1 (1)
#define REG_R2 (2)
#define REG_R3 (3)
#define REG_R4 (4)
#define REG_R5 (5
#define REG_R6 (6)
#define REG_R7 (7)
#define REG_R8 (8)
#define REG_R9 (9)
#define REG_R10 (10)
#define REG_R11 (11)
#define REG_R12 (12)
#define REG_R13 (13)
#define REG_R14 (14)
#define REG_R15 (15)
#define REG_CPSR (16)
#define REG_R0 (0)
#define REG_R1 (1)
#define REG_R2 (2)
#define REG_R3 (3)
#define REG_R4 (4)
#define REG_R5 (5)
#define REG_R6 (6)
#define REG_R7 (7)
#define REG_R8 (8)
#define REG_R9 (9)
#define REG_R10 (10)
#define REG_R11 (11)
#define REG_R12 (12)
#define REG_R13 (13)
#define REG_R14 (14)
#define REG_R15 (15)
#define REG_CPSR (16)
#define XCPTCONTEXT_REGS (17)
#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
#define XCPTCONTEXT_REGS (17)
#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
#define REG_A1 REG_R0
#define REG_A2 REG_R1
#define REG_A3 REG_R2
#define REG_A4 REG_R3
#define REG_V1 REG_R4
#define REG_V2 REG_R5
#define REG_V3 REG_R6
#define REG_V4 REG_R7
#define REG_V5 REG_R8
#define REG_V6 REG_R9
#define REG_V7 REG_R10
#define REG_SB REG_R9
#define REG_SL REG_R10
#define REG_FP REG_R11
#define REG_IP REG_R12
#define REG_SP REG_R13
#define REG_LR REG_R14
#define REG_PC REG_R15
/* C5471 Interrupts */
#define C5471_IRQ_TIMER0 0
#define C5471_IRQ_TIMER1 1
#define C5471_IRQ_TIMER2 2
#define C5471_IRQ_GPIO0 3
#define C5471_IRQ_ETHER 4
#define C5471_IRQ_KBGPIO_0_7 5
#define C5471_IRQ_UART 6
#define C5471_IRQ_UART_IRDA 7
#define C5471_IRQ_KBGPIO_8_15 8
#define C5471_IRQ_GPIO3 9
#define C5471_IRQ_GPIO2 10
#define C5471_IRQ_I2C 11
#define C5471_IRQ_GPIO1 12
#define C5471_IRQ_SPI 13
#define C5471_IRQ_GPIO_4_19 14
#define C5471_IRQ_API 15
#define C5471_IRQ_WATCHDOG C5471_IRQ_TIMER0
#define C5471_IRQ_SYSTIMER C5471_IRQ_TIMER2
#define NR_IRQS (C5471_IRQ_API+1)
#define REG_A1 REG_R0
#define REG_A2 REG_R1
#define REG_A3 REG_R2
#define REG_A4 REG_R3
#define REG_V1 REG_R4
#define REG_V2 REG_R5
#define REG_V3 REG_R6
#define REG_V4 REG_R7
#define REG_V5 REG_R8
#define REG_V6 REG_R9
#define REG_V7 REG_R10
#define REG_SB REG_R9
#define REG_SL REG_R10
#define REG_FP REG_R11
#define REG_IP REG_R12
#define REG_SP REG_R13
#define REG_LR REG_R14
#define REG_PC REG_R15
/************************************************************
* Public Types
@ -243,5 +222,5 @@ extern "C" {
#endif
#endif
#endif /* __ARCH_C5471_IRQ_H */
#endif /* __ARCH_IRQ_H */

4
arch/c5471/include/serial.h
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@ -1,5 +1,5 @@
/************************************************************
* serial.h
* arch/serial.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -44,7 +44,7 @@
* Definitions
************************************************************/
/* IOCTL commands supported by the C5471 serial driver */
/* IOCTL commands supported by the ARM serial driver */
#define TIOCSBRK 0x5401 /* BSD compatibility */
#define TIOCCBRK 0x5402 /* " " " " */

8
arch/c5471/include/types.h
View File

@ -1,5 +1,5 @@
/************************************************************
* types.h
* arch/types.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -37,8 +37,8 @@
* only indirectly through sys/types.h
*/
#ifndef __ARCH_C5471_TYPES_H
#define __ARCH_C5471_TYPES_H
#ifndef __ARCH_TYPES_H
#define __ARCH_TYPES_H
/************************************************************
* Included Files
@ -79,4 +79,4 @@ typedef unsigned int irqstate_t;
* Global Function Prototypes
************************************************************/
#endif /* __ARCH_C5471_TYPES_H */
#endif /* __ARCH_TYPES_H */

8
arch/dm320/include/arch.h
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@ -1,5 +1,5 @@
/************************************************************
* arch.h
* arch/arch.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -37,8 +37,8 @@
* only indirectly through nuttx/arch.h
*/
#ifndef __ARCH_DM320_ARCH_H
#define __ARCH_DM320_ARCH_H
#ifndef __ARCH_ARCH_H
#define __ARCH_ARCH_H
/************************************************************
* Included Files
@ -76,5 +76,5 @@ extern "C" {
}
#endif
#endif /* __ARCH_DM320_ARCH_H */
#endif /* __ARCH_ARCH_H */

62
arch/dm320/include/irq.h
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@ -1,5 +1,5 @@
/************************************************************
* irq.h
* arch/irq.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -37,13 +37,15 @@
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_DM320_IRQ_H
#define __ARCH_DM320_IRQ_H
#ifndef __ARCH_IRQ_H
#define __ARCH_IRQ_H
/************************************************************
* Included Files
************************************************************/
#include <arch/chip/irq.h>
/************************************************************
* Definitions
************************************************************/
@ -100,58 +102,6 @@
#define REG_LR REG_R14
#define REG_PC REG_R15
/* DM320 Interrupts */
#define DM320_IRQ_TMR0 0 /* IRQ0: Timer 0 Interrupt */
#define DM320_IRQ_TMR1 1 /* IRQ1: Timer 1 Interrupt */
#define DM320_IRQ_TMR2 2 /* IRQ2: Timer 2 Interrupt (CCD timer 0) */
#define DM320_IRQ_TMR3 3 /* IRQ3: Timer 3 Interrupt (CCD timer 1) */
#define DM320_IRQ_CCDVD0 4 /* IRQ4: CCD VD Interrupt #0 */
#define DM320_IRQ_CCDVD1 5 /* IRQ5: CCD VD Interrupt #1 */
#define DM320_IRQ_CCDWEN 6 /* IRQ6: CCD WEN Interrupt */
#define DM320_IRQ_VENC 7 /* IRQ7: Video Encoder Interrupt */
#define DM320_IRQ_SP0 8 /* IRQ8: Serial Port 0 Interrupt (with DMA) */
#define DM320_IRQ_SP1 9 /* IRQ9: Serial Port 1 Interrupt */
#define DM320_IRQ_EXTHOST 10 /* IRQ10: External host interrupt */
#define DM320_IRQ_IMGBUF 11 /* IRQ11: Image Buffer */
#define DM320_IRQ_UART0 12 /* IRQ12: UART0 Interrupt */
#define DM320_IRQ_UART1 13 /* IRQ13: UART1 Interrupt */
#define DM320_IRQ_USB0 14 /* IRQ14: USB 0 Interrupt (DMA) */
#define DM320_IRQ_USB1 15 /* IRQ15: USB 1 Interrupt (Core) */
#define DM320_IRQ_VLYNQ 16 /* IRQ16: VLYNQ Interrupt */
#define DM320_IRQ_MTC0 17 /* IRQ17: Memory Traffic Controller 0 (DMA) */
#define DM320_IRQ_MTC1 18 /* IRQ18: Memory Traffic Controller 1 (CFC_RDY) */
#define DM320_IRQ_MMCSD0 19 /* IRQ19: MMC/SD or MS 0 Interrupt */
#define DM320_IRQ_MMCSD1 20 /* IRQ20: MMC/SD or MS 1 Interrupt */
#define DM320_IRQ_EXT0 21 /* IRQ21: External Interrupt #0 (GIO0) */
#define DM320_IRQ_EXT1 22 /* IRQ22: External Interrupt #1 (GIO1) */
#define DM320_IRQ_EXT2 23 /* IRQ23: External Interrupt #2 (GIO2) */
#define DM320_IRQ_EXT3 24 /* IRQ24: External Interrupt #3 (GIO3) */
#define DM320_IRQ_EXT4 25 /* IRQ25: External Interrupt #4 (GIO4) */
#define DM320_IRQ_EXT5 26 /* IRQ26: External Interrupt #5 (GIO5) */
#define DM320_IRQ_EXT6 27 /* IRQ27: External Interrupt #6 (GIO6) */
#define DM320_IRQ_EXT7 28 /* IRQ28: External Interrupt #7 (GIO7) */
#define DM320_IRQ_EXT8 29 /* IRQ29: External Interrupt #8 (GIO8) */
#define DM320_IRQ_EXT9 30 /* IRQ30: External Interrupt #9 (GIO9) */
#define DM320_IRQ_EXT10 31 /* IRQ31: External Interrupt #10 (GIO10) */
#define DM320_IRQ_EXT11 32 /* IRQ32: External Interrupt #11 (GIO11) */
#define DM320_IRQ_EXT12 33 /* IRQ33: External Interrupt #12 (GIO12) */
#define DM320_IRQ_EXT13 34 /* IRQ34: External Interrupt #13 (GIO13) */
#define DM320_IRQ_EXT14 35 /* IRQ35: External Interrupt #14 (GIO14) */
#define DM320_IRQ_EXT15 36 /* IRQ36: External Interrupt #15 (GIO15) */
#define DM320_IRQ_PREV0 37 /* IRQ37: Preview Engine 0 (Preview Over) */
#define DM320_IRQ_PREV1 38 /* IRQ38: Preview Engine 1 (Preview Historgram Over) */
#define DM320_IRQ_WDT 39 /* IRQ39: Watchdog Timer Interrupt */
#define DM320_IRQ_I2C 40 /* IRQ40: I2C Interrupt */
#define DM320_IRQ_CLKC 41 /* IRQ41: Clock controller Interrupt (wake up) */
#define DM320_IRQ_E2ICE 42 /* IRQ42: Embedded ICE Interrupt */
#define DM320_IRQ_ARMCOMRX 43 /* IRQ43: ARMCOMM Receive Interrupt */
#define DM320_IRQ_ARMCOMTX 44 /* IRQ44: ARMCOMM Transmit Interrupt */
#define DM320_IRQ_RSV 45 /* IRQ45: Reserved Interrupt */
#define DM320_IRQ_SYSTIMER DM320_IRQ_TMR0
#define NR_IRQS (DM320_IRQ_RSV+1)
/************************************************************
* Public Types
************************************************************/
@ -272,5 +222,5 @@ extern "C" {
#endif
#endif
#endif /* __ARCH_DM320_IRQ_H */
#endif /* __ARCH_IRQ_H */

4
arch/dm320/include/serial.h
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@ -1,5 +1,5 @@
/************************************************************
* serial.h
* arch/serial.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -44,7 +44,7 @@
* Definitions
************************************************************/
/* IOCTL commands supported by the DM320 serial driver */
/* IOCTL commands supported by the ARM serial driver */
#define TIOCSBRK 0x5401 /* BSD compatibility */
#define TIOCCBRK 0x5402 /* " " " " */

8
arch/dm320/include/types.h
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@ -1,5 +1,5 @@
/************************************************************
* types.h
* arch/types.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@ -37,8 +37,8 @@
* only indirectly through sys/types.h
*/
#ifndef __ARCH_DM320_TYPES_H
#define __ARCH_DM320_TYPES_H
#ifndef __ARCH_TYPES_H
#define __ARCH_TYPES_H
/************************************************************
* Included Files
@ -79,4 +79,4 @@ typedef unsigned int irqstate_t;
* Global Function Prototypes
************************************************************/
#endif /* __ARCH_DM320_TYPES_H */
#endif /* __ARCH_TYPES_H */