SAMA5 NAND: Basic support for access to NAND FLASH
This commit is contained in:
Gregory Nutt
parent
9680043a46
commit
3ab6d2b40a
@ -226,3 +226,19 @@ ifeq ($(CONFIG_SAMA5_TC1),y)
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CHIP_CSRCS += sam_tc.c
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endif
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endif
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ifeq ($(CONFIG_SAMA5_EBICS0_NAND),y)
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CHIP_CSRCS += sam_nand.c
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else
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ifeq ($(CONFIG_SAMA5_EBICS1_NAND),y)
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CHIP_CSRCS += sam_nand.c
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else
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ifeq ($(CONFIG_SAMA5_EBICS2_NAND),y)
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CHIP_CSRCS += sam_nand.c
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else
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ifeq ($(CONFIG_SAMA5_EBICS3_NAND),y)
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CHIP_CSRCS += sam_nand.c
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endif
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endif
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endif
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endif
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331
arch/arm/src/sama5/sam_nand.c
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331
arch/arm/src/sama5/sam_nand.c
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@ -0,0 +1,331 @@
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/****************************************************************************
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* arch/arm/src/sama5/sam_nand.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/fs/ioctl.h>
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#include <nuttx/mtd.h>
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#include "sam_nand.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* This type represents the state of the NAND MTD device. The struct
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* mtd_dev_s must appear at the beginning of the definition so that you can
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* freely cast between pointers to struct mtd_dev_s and struct nand_dev_s.
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*/
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struct nand_dev_s
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{
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struct mtd_dev_s mtd; /* Externally visible part of the driver */
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uint8_t cs; /* Chip select number (0..3) */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* MTD driver methods */
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static int nand_erase(struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks);
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static ssize_t nand_bread(struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks, uint8_t *buf);
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static ssize_t nand_bwrite(struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks, const uint8_t *buf);
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static int nand_ioctl(struct mtd_dev_s *dev, int cmd,
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unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* These pre-allocated structures hold the state of the MTD driver for NAND
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* on CS0..3 as configured.
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*/
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#ifdef CONFIG_SAMA5_EBICS0_NAND
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static struct nand_dev_s g_cs0nand;
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#endif
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#ifdef CONFIG_SAMA5_EBICS1_NAND
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static struct nand_dev_s g_cs1nand;
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#endif
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#ifdef CONFIG_SAMA5_EBICS2_NAND
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static struct nand_dev_s g_cs2nand;
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#endif
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#ifdef CONFIG_SAMA5_EBICS3_NAND
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static struct nand_dev_s g_cs3nand;
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: nand_erase
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*
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* Description:
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* Erase several blocks, each of the size previously reported.
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*
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****************************************************************************/
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static int nand_erase(struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks)
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{
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struct nand_dev_s *priv = (struct nand_dev_s *)dev;
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/* The interface definition assumes that all erase blocks are the same size.
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* If that is not true for this particular device, then transform the
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* start block and nblocks as necessary.
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*/
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#warning Missing logic
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/* Erase the specified blocks and return status (OK or a negated errno) */
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return OK;
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}
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/****************************************************************************
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* Name: nand_bread
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*
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* Description:
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* Read the specified number of blocks into the user provided buffer.
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*
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****************************************************************************/
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static ssize_t nand_bread(struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks, uint8_t *buf)
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{
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struct nand_dev_s *priv = (struct nand_dev_s *)dev;
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/* The interface definition assumes that all read/write blocks are the same size.
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* If that is not true for this particular device, then transform the
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* start block and nblocks as necessary.
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*/
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/* Read the specified blocks into the provided user buffer and return status
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* (The positive, number of blocks actually read or a negated errno).
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*/
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#warning Missing logic
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return 0;
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}
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/****************************************************************************
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* Name: nand_bwrite
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*
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* Description:
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* Write the specified number of blocks from the user provided buffer.
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*
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****************************************************************************/
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static ssize_t nand_bwrite(struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks, const uint8_t *buf)
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{
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struct nand_dev_s *priv = (struct nand_dev_s *)dev;
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/* The interface definition assumes that all read/write blocks are the same size.
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* If that is not true for this particular device, then transform the
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* start block and nblocks as necessary.
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*/
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/* Write the specified blocks from the provided user buffer and return status
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* (The positive, number of blocks actually written or a negated errno)
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*/
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#warning Missing logic
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return 0;
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}
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/****************************************************************************
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* Name: nand_ioctl
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****************************************************************************/
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static int nand_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg)
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{
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struct nand_dev_s *priv = (struct nand_dev_s *)dev;
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int ret = -EINVAL; /* Assume good command with bad parameters */
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switch (cmd)
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{
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case MTDIOC_GEOMETRY:
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{
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struct mtd_geometry_s *geo = (struct mtd_geometry_s *)arg;
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if (geo)
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{
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/* Populate the geometry structure with information needed to know
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* the capacity and how to access the device.
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*
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* NOTE: that the device is treated as though it where just an array
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* of fixed size blocks. That is most likely not true, but the client
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* will expect the device logic to do whatever is necessary to make it
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* appear so.
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*/
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geo->blocksize = 512; /* Size of one read/write block */
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geo->erasesize = 4096; /* Size of one erase block */
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geo->neraseblocks = 1024; /* Number of erase blocks */
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ret = OK;
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}
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}
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break;
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case MTDIOC_BULKERASE:
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{
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/* Erase the entire device */
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ret = OK;
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}
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break;
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case MTDIOC_XIPBASE:
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default:
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ret = -ENOTTY; /* Bad command */
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break;
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}
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return ret;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sam_nand_initialize
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*
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* Description:
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* Create and initialize a raw NAND MTD device instance. MTD devices are
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* not registered in the file system, but are created as instances that can
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* be bound to other functions (such as a block or character driver front
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* end).
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*
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* This MTD devices implements a RAW NAND interface: No ECC or sparing is
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* performed here. Those necessary NAND features are provided by common,
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* higher level MTD layers found in drivers/mtd.
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*
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* Input parameters:
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* cs - Chip select number (in the event that multiple NAND devices
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* are connected on-board).
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*
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* Returned value.
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* On success a non-NULL pointer to an MTD device structure is returned;
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* NULL is returned on a failure.
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*
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****************************************************************************/
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struct mtd_dev_s *sam_nand_initialize(int cs)
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{
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struct nand_dev_s *priv;
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int ret;
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fvdbg("CS%d\n", cs);
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/* Select the device structure */
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#ifdef CONFIG_SAMA5_EBICS0_NAND
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if (cs == HSMC_CS0)
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{
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priv = &g_cs0nand;
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}
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else
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#endif
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#ifdef CONFIG_SAMA5_EBICS1_NAND
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if (cs == HSMC_CS1)
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{
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priv = &g_cs1nand;
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}
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else
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#endif
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#ifdef CONFIG_SAMA5_EBICS2_NAND
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if (cs == HSMC_CS2)
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{
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priv = &g_cs2nand;
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}
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else
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#endif
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#ifdef CONFIG_SAMA5_EBICS3_NAND
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if (cs == HSMC_CS3)
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{
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priv = &g_cs3nand;
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}
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else
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#endif
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{
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fdbg("ERROR: CS%d unsupported or invalid\n", cs);
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return NULL;
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}
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/* Initialize the device structure */
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memset(priv, 0, sizeof(struct nand_dev_s));
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priv->mtd.erase = nand_erase;
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priv->mtd.bread = nand_bread;
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priv->mtd.bwrite = nand_bwrite;
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priv->mtd.ioctl = nand_ioctl;
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priv->cs = cs;
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/* Initialize the NAND hardware */
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/* Perform board-specific SMC intialization for this CS */
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ret = board_nandflash_config(cs);
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if (ret < 0)
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{
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fdbg("ERROR: board_nandflash_config failed for CS%d: %d\n", cs, ret);
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return NULL;
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}
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/* Initialize the NAND */
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#warning Missing logic
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/* Return the implementation-specific state structure as the MTD device */
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return (struct mtd_dev_s *)priv;
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}
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121
arch/arm/src/sama5/sam_nand.h
Normal file
121
arch/arm/src/sama5/sam_nand.h
Normal file
@ -0,0 +1,121 @@
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/****************************************************************************
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* arch/arm/src/sama5/sam_nand.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
|
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMA5_SAM_NAND_H
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#define __ARCH_ARM_SRC_SAMA5_SAM_NAND_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "chip/sam_hsmc.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sam_nand_initialize
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*
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* Description:
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* Create and initialize a raw NAND MTD device instance. MTD devices are
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* not registered in the file system, but are created as instances that can
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* be bound to other functions (such as a block or character driver front
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* end).
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*
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* This MTD devices implements a RAW NAND interface: No ECC or sparing is
|
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* performed here. Those necessary NAND features are provided by common,
|
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* higher level MTD layers found in drivers/mtd.
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*
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* Input parameters:
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* cs - Chip select number (in the event that multiple NAND devices
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* are connected on-board).
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*
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* Returned value.
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* On success a non-NULL pointer to an MTD device structure is returned;
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* NULL is returned on a failure.
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*
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****************************************************************************/
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struct mtd_dev_s;
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struct mtd_dev_s *sam_nand_initialize(int cs);
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/****************************************************************************
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* Name: board_nandflash_config
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*
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* Description:
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* If CONFIG_SAMA5_BOOT_CS3FLASH is defined, then NAND FLASH support is
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* enabled. This function provides the board-specific implementation of
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* the logic to reprogram the SMC to support NAND FLASH on the specified
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* CS.
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*
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* Input Parameters:
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* cs - Chip select number (in the event that multiple NAND devices
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* are connected on-board).
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*
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* Returned Values:
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* OK if the HSMC was successfully configured for this CS. A negated
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* errno value is returned on a failure. This would fail with -ENODEV,
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* for example, if the board does not support NAND FLASH on the requested
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* CS.
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*
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****************************************************************************/
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int board_nandflash_config(int cs);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_SAMA5_SAM_NAND_H */
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