From 3ab6d2b40a76bf373c44a921f776d05060e0bda2 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 15 Nov 2013 09:30:05 -0600 Subject: [PATCH] SAMA5 NAND: Basic support for access to NAND FLASH --- arch/arm/src/sama5/Make.defs | 16 ++ arch/arm/src/sama5/sam_nand.c | 331 ++++++++++++++++++++++++++++++++++ arch/arm/src/sama5/sam_nand.h | 121 +++++++++++++ 3 files changed, 468 insertions(+) create mode 100644 arch/arm/src/sama5/sam_nand.c create mode 100644 arch/arm/src/sama5/sam_nand.h diff --git a/arch/arm/src/sama5/Make.defs b/arch/arm/src/sama5/Make.defs index e49fcf43cc..e79ea35524 100644 --- a/arch/arm/src/sama5/Make.defs +++ b/arch/arm/src/sama5/Make.defs @@ -226,3 +226,19 @@ ifeq ($(CONFIG_SAMA5_TC1),y) CHIP_CSRCS += sam_tc.c endif endif + +ifeq ($(CONFIG_SAMA5_EBICS0_NAND),y) +CHIP_CSRCS += sam_nand.c +else +ifeq ($(CONFIG_SAMA5_EBICS1_NAND),y) +CHIP_CSRCS += sam_nand.c +else +ifeq ($(CONFIG_SAMA5_EBICS2_NAND),y) +CHIP_CSRCS += sam_nand.c +else +ifeq ($(CONFIG_SAMA5_EBICS3_NAND),y) +CHIP_CSRCS += sam_nand.c +endif +endif +endif +endif diff --git a/arch/arm/src/sama5/sam_nand.c b/arch/arm/src/sama5/sam_nand.c new file mode 100644 index 0000000000..4e3b910d69 --- /dev/null +++ b/arch/arm/src/sama5/sam_nand.c @@ -0,0 +1,331 @@ +/**************************************************************************** + * arch/arm/src/sama5/sam_nand.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "sam_nand.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This type represents the state of the NAND MTD device. The struct + * mtd_dev_s must appear at the beginning of the definition so that you can + * freely cast between pointers to struct mtd_dev_s and struct nand_dev_s. + */ + +struct nand_dev_s +{ + struct mtd_dev_s mtd; /* Externally visible part of the driver */ + uint8_t cs; /* Chip select number (0..3) */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* MTD driver methods */ + +static int nand_erase(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks); +static ssize_t nand_bread(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, uint8_t *buf); +static ssize_t nand_bwrite(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, const uint8_t *buf); +static int nand_ioctl(struct mtd_dev_s *dev, int cmd, + unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* These pre-allocated structures hold the state of the MTD driver for NAND + * on CS0..3 as configured. + */ + +#ifdef CONFIG_SAMA5_EBICS0_NAND +static struct nand_dev_s g_cs0nand; +#endif +#ifdef CONFIG_SAMA5_EBICS1_NAND +static struct nand_dev_s g_cs1nand; +#endif +#ifdef CONFIG_SAMA5_EBICS2_NAND +static struct nand_dev_s g_cs2nand; +#endif +#ifdef CONFIG_SAMA5_EBICS3_NAND +static struct nand_dev_s g_cs3nand; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: nand_erase + * + * Description: + * Erase several blocks, each of the size previously reported. + * + ****************************************************************************/ + +static int nand_erase(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks) +{ + struct nand_dev_s *priv = (struct nand_dev_s *)dev; + + /* The interface definition assumes that all erase blocks are the same size. + * If that is not true for this particular device, then transform the + * start block and nblocks as necessary. + */ +#warning Missing logic + + /* Erase the specified blocks and return status (OK or a negated errno) */ + + return OK; +} + +/**************************************************************************** + * Name: nand_bread + * + * Description: + * Read the specified number of blocks into the user provided buffer. + * + ****************************************************************************/ + +static ssize_t nand_bread(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, uint8_t *buf) +{ + struct nand_dev_s *priv = (struct nand_dev_s *)dev; + + /* The interface definition assumes that all read/write blocks are the same size. + * If that is not true for this particular device, then transform the + * start block and nblocks as necessary. + */ + + /* Read the specified blocks into the provided user buffer and return status + * (The positive, number of blocks actually read or a negated errno). + */ +#warning Missing logic + + return 0; +} + +/**************************************************************************** + * Name: nand_bwrite + * + * Description: + * Write the specified number of blocks from the user provided buffer. + * + ****************************************************************************/ + +static ssize_t nand_bwrite(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, const uint8_t *buf) +{ + struct nand_dev_s *priv = (struct nand_dev_s *)dev; + + /* The interface definition assumes that all read/write blocks are the same size. + * If that is not true for this particular device, then transform the + * start block and nblocks as necessary. + */ + + /* Write the specified blocks from the provided user buffer and return status + * (The positive, number of blocks actually written or a negated errno) + */ +#warning Missing logic + + return 0; +} + +/**************************************************************************** + * Name: nand_ioctl + ****************************************************************************/ + +static int nand_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg) +{ + struct nand_dev_s *priv = (struct nand_dev_s *)dev; + int ret = -EINVAL; /* Assume good command with bad parameters */ + + switch (cmd) + { + case MTDIOC_GEOMETRY: + { + struct mtd_geometry_s *geo = (struct mtd_geometry_s *)arg; + if (geo) + { + /* Populate the geometry structure with information needed to know + * the capacity and how to access the device. + * + * NOTE: that the device is treated as though it where just an array + * of fixed size blocks. That is most likely not true, but the client + * will expect the device logic to do whatever is necessary to make it + * appear so. + */ + + geo->blocksize = 512; /* Size of one read/write block */ + geo->erasesize = 4096; /* Size of one erase block */ + geo->neraseblocks = 1024; /* Number of erase blocks */ + ret = OK; + } + } + break; + + case MTDIOC_BULKERASE: + { + /* Erase the entire device */ + + ret = OK; + } + break; + + case MTDIOC_XIPBASE: + default: + ret = -ENOTTY; /* Bad command */ + break; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_nand_initialize + * + * Description: + * Create and initialize a raw NAND MTD device instance. MTD devices are + * not registered in the file system, but are created as instances that can + * be bound to other functions (such as a block or character driver front + * end). + * + * This MTD devices implements a RAW NAND interface: No ECC or sparing is + * performed here. Those necessary NAND features are provided by common, + * higher level MTD layers found in drivers/mtd. + * + * Input parameters: + * cs - Chip select number (in the event that multiple NAND devices + * are connected on-board). + * + * Returned value. + * On success a non-NULL pointer to an MTD device structure is returned; + * NULL is returned on a failure. + * + ****************************************************************************/ + +struct mtd_dev_s *sam_nand_initialize(int cs) +{ + struct nand_dev_s *priv; + int ret; + + fvdbg("CS%d\n", cs); + + /* Select the device structure */ + +#ifdef CONFIG_SAMA5_EBICS0_NAND + if (cs == HSMC_CS0) + { + priv = &g_cs0nand; + } + else +#endif +#ifdef CONFIG_SAMA5_EBICS1_NAND + if (cs == HSMC_CS1) + { + priv = &g_cs1nand; + } + else +#endif +#ifdef CONFIG_SAMA5_EBICS2_NAND + if (cs == HSMC_CS2) + { + priv = &g_cs2nand; + } + else +#endif +#ifdef CONFIG_SAMA5_EBICS3_NAND + if (cs == HSMC_CS3) + { + priv = &g_cs3nand; + } + else +#endif + { + fdbg("ERROR: CS%d unsupported or invalid\n", cs); + return NULL; + } + + /* Initialize the device structure */ + + memset(priv, 0, sizeof(struct nand_dev_s)); + priv->mtd.erase = nand_erase; + priv->mtd.bread = nand_bread; + priv->mtd.bwrite = nand_bwrite; + priv->mtd.ioctl = nand_ioctl; + priv->cs = cs; + + /* Initialize the NAND hardware */ + /* Perform board-specific SMC intialization for this CS */ + + ret = board_nandflash_config(cs); + if (ret < 0) + { + fdbg("ERROR: board_nandflash_config failed for CS%d: %d\n", cs, ret); + return NULL; + } + + /* Initialize the NAND */ +#warning Missing logic + + /* Return the implementation-specific state structure as the MTD device */ + + return (struct mtd_dev_s *)priv; +} diff --git a/arch/arm/src/sama5/sam_nand.h b/arch/arm/src/sama5/sam_nand.h new file mode 100644 index 0000000000..9aed2905fc --- /dev/null +++ b/arch/arm/src/sama5/sam_nand.h @@ -0,0 +1,121 @@ +/**************************************************************************** + * arch/arm/src/sama5/sam_nand.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAMA5_SAM_NAND_H +#define __ARCH_ARM_SRC_SAMA5_SAM_NAND_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip.h" +#include "chip/sam_hsmc.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_nand_initialize + * + * Description: + * Create and initialize a raw NAND MTD device instance. MTD devices are + * not registered in the file system, but are created as instances that can + * be bound to other functions (such as a block or character driver front + * end). + * + * This MTD devices implements a RAW NAND interface: No ECC or sparing is + * performed here. Those necessary NAND features are provided by common, + * higher level MTD layers found in drivers/mtd. + * + * Input parameters: + * cs - Chip select number (in the event that multiple NAND devices + * are connected on-board). + * + * Returned value. + * On success a non-NULL pointer to an MTD device structure is returned; + * NULL is returned on a failure. + * + ****************************************************************************/ + +struct mtd_dev_s; +struct mtd_dev_s *sam_nand_initialize(int cs); + +/**************************************************************************** + * Name: board_nandflash_config + * + * Description: + * If CONFIG_SAMA5_BOOT_CS3FLASH is defined, then NAND FLASH support is + * enabled. This function provides the board-specific implementation of + * the logic to reprogram the SMC to support NAND FLASH on the specified + * CS. + * + * Input Parameters: + * cs - Chip select number (in the event that multiple NAND devices + * are connected on-board). + * + * Returned Values: + * OK if the HSMC was successfully configured for this CS. A negated + * errno value is returned on a failure. This would fail with -ENODEV, + * for example, if the board does not support NAND FLASH on the requested + * CS. + * + ****************************************************************************/ + +int board_nandflash_config(int cs); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_SAMA5_SAM_NAND_H */