arch/arm/src/lpc17xx: Add support for ARMv7-M run time stack checking on NXP LPC17xx MCUs based on CONFIG_ARMV7M_STACKCHECK. Basically copied from stm32.

arch/arm/Kconfig

@@ -149,6 +149,7 @@ config ARCH_CHIP_LPC17XX
 	select ARCH_HAVE_MPU
 	select ARM_HAVE_MPU_UNIFIED
 	select ARCH_HAVE_FETCHADD
+	select ARMV7M_HAVE_STACKCHECK
 	---help---
 		NXP LPC17xx architectures (ARM Cortex-M3)
 

arch/arm/src/lpc17xx/Make.defs

@@ -57,6 +57,10 @@ CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
 CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_unblocktask.c up_usestack.c
 CMN_CSRCS += up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c up_vfork.c
 
+ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
+CMN_CSRCS += up_stackcheck.c
+endif
+
 ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y)
 ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
 CMN_ASRCS += up_lazyexception.S

arch/arm/src/lpc17xx/lpc17_start.c

@@ -171,6 +171,12 @@ static inline void lpc17_fpuconfig(void)
  * Public Functions
  ****************************************************************************/
 
+#ifdef CONFIG_ARMV7M_STACKCHECK
+/* we need to get r10 set before we can allow instrumentation calls */
+
+void __start(void) __attribute__ ((no_instrument_function));
+#endif
+
 /****************************************************************************
  * Name: _start
  *
@@ -184,6 +190,12 @@ void __start(void)
   const uint32_t *src;
   uint32_t *dest;
 
+#ifdef CONFIG_ARMV7M_STACKCHECK
+  /* Set the stack limit before we attempt to call any functions */
+
+  __asm__ volatile ("sub r10, sp, %0" : : "r" (CONFIG_IDLETHREAD_STACKSIZE - 64) : );
+#endif
+
   /* Configure the uart so that we can get debug output as soon as possible */
 
   lpc17_clockconfig();