arch/armv8-m: add ARMV8M_TRUSTZONE_HYBRID feature
Some chips only have one core that supports secure in smp mode, so need change EXC_RETURN to non-secure when switching to a core that does not support secure. Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
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@ -153,3 +153,19 @@ config ARMV8M_SYSTICK
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depends on TIMER
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depends on TIMER
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---help---
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---help---
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Enable SysTick timer driver.
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Enable SysTick timer driver.
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config ARMV8M_TRUSTZONE_HYBRID
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bool "Hybrid with secure and non-secure."
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default n
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depends on SMP
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---help---
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Enable the hybrid with secure and non-secure domain.
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In SMP mode, you can enable this configuration when one
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core supports secure and the other does not.
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config ARMV8M_TRUSTZONE_CPU_BITMASK
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hex "Security support bitmap for multicore."
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depends on ARMV8M_TRUSTZONE_HYBRID
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default 0
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---help---
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Set Security bitmap for multicore, bit 0 means core 0.
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@ -33,6 +33,7 @@
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#include <arch/board/board.h>
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include "arm_internal.h"
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#include "exc_return.h"
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/****************************************************************************
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/****************************************************************************
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* Public Functions
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* Public Functions
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@ -92,5 +93,19 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
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#endif
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#endif
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board_autoled_off(LED_INIRQ);
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board_autoled_off(LED_INIRQ);
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#ifdef CONFIG_ARMV8M_TRUSTZONE_HYBRID
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if (((1 << up_cpu_index()) & CONFIG_ARMV8M_TRUSTZONE_CPU_BITMASK) == 0)
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{
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regs[REG_EXC_RETURN] &=
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~(EXC_RETURN_EXC_SECURE | EXC_RETURN_SECURE_STACK);
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}
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else
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{
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regs[REG_EXC_RETURN] |=
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(EXC_RETURN_EXC_SECURE | EXC_RETURN_SECURE_STACK);
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}
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#endif
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return regs;
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return regs;
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}
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}
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