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SAMA5: Initial framework for a UDPHS USB device side driver

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This commit is contained in:
Gregory Nutt 2013-08-29 16:29:27 -06:00
parent be88385911
commit 3b1323a74b
3 changed files with 3523 additions and 0 deletions
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4
ChangeLog
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@ -5477,3 +5477,7 @@
interrupt endpoints (2013-8-28).
* arch/arm/src/sama5/chip/sam_udphs.h: High-speed USB device register
definitions for the SAMA5 (2013-8-28)
* arch/arm/src/sama5/sam-udphs.c: A framework for the USB device
driver taken from another architecture. There is very little
useful in this initial check-in (2013-8-29).

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arch/arm/src/sama5/chip/sam_udphs.h
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@ -4,6 +4,9 @@
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* References:
* SAMA5D3 Series Data Sheet
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@ -48,6 +51,10 @@
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* General Definitions **********************************************************************/
#define SAM_UDPHS_NENDPOINTS 15
#define SAM_UDPHS_NDMACHANNELS 7
/* Register offsets *************************************************************************/
@ -431,6 +438,21 @@
* Public Types
********************************************************************************************/
/* This structure defines the UDPHS DMA Transfer Descriptor. Instances of DMA transfer
* descriptors must by aligned to 16-byte address boundaries.
*
* Each value contains the next value of each of three UDPHS DMA registers. The first
* register value (UDPHS_DMANXTDSCx) is a link that can be used to chain sequences of
* DMA transfers.
*/
struct udphs_dtd_s
{
uint32_t nxtd; /* Next Descriptor Address Register: UDPHS_DMANXTDSCx */
uint32_t addr; /* DMA Channelx Address Register: UDPHS_DMAADDRESSx */
uint32_t ctrl; /* DMA Channelx Control Register: UDPHS_DMACONTROLx */
};
/********************************************************************************************
* Public Data
********************************************************************************************/

3497
arch/arm/src/sama5/sam_udphs.c Normal file
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