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XDMAC register sampling missed CIM register; Should not set SWREQ bit in DMA setup

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This commit is contained in:
Gregory Nutt 2014-07-21 13:23:36 -06:00
parent e202c8e9b2
commit 3b24da2d7c
2 changed files with 7 additions and 0 deletions
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1
arch/arm/src/sama5/sam_dmac.h
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@ -323,6 +323,7 @@ struct sam_dmaregs_s
/* Channel Registers */
uint32_t cim; /* Channel Interrupt Mask Register */
uint32_t cis; /* Channel Interrupt Status Register */
uint32_t csa; /* Channel Source Address Register */
uint32_t cda; /* Channel Destination Address Register */

6
arch/arm/src/sama5/sam_xdmac.c
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@ -1133,11 +1133,13 @@ static inline uint32_t sam_txcc(struct sam_xdmach_s *xdmach)
field = sam_sink_channel(xdmach, pid);
regval |= (field << XDMACH_CC_CSIZE_SHIFT);
#if 0 /* Not supported */
/* 10. Set SWREQ to use software request (only relevant for a
* peripheral synchronized transfer).
*/
regval |= XDMACH_CC_SWREQ;
#endif
}
return regval;
@ -1287,11 +1289,13 @@ static inline uint32_t sam_rxcc(struct sam_xdmach_s *xdmach)
field = sam_source_channel(xdmach, pid);
regval |= (field << XDMACH_CC_CSIZE_SHIFT);
#if 0 /* Not supported */
/* 10. Set SWREQ to use software request (only relevant for a
* peripheral synchronized transfer).
*/
regval |= XDMACH_CC_SWREQ;
#endif
}
return regval;
@ -2421,6 +2425,7 @@ void sam_dmasample(DMA_HANDLE handle, struct sam_dmaregs_s *regs)
/* Sample channel registers */
regs->cim = sam_getdmach(xdmach, SAM_XDMACH_CIM_OFFSET);
regs->cis = sam_getdmach(xdmach, SAM_XDMACH_CIS_OFFSET);
regs->csa = sam_getdmach(xdmach, SAM_XDMACH_CSA_OFFSET);
regs->cda = sam_getdmach(xdmach, SAM_XDMACH_CDA_OFFSET);
@ -2467,6 +2472,7 @@ void sam_dmadump(DMA_HANDLE handle, const struct sam_dmaregs_s *regs,
dmadbg(" GWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GWS_OFFSET, regs->gws);
dmadbg(" GSWS[%08x]: %08x\n", xdmac->base + SAM_XDMAC_GSWS_OFFSET, regs->gsws);
dmadbg(" DMA Channel Registers:\n");
dmadbg(" CIM[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIM_OFFSET, regs->cim);
dmadbg(" CIS[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CIS_OFFSET, regs->cis);
dmadbg(" CSA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CSA_OFFSET, regs->csa);
dmadbg(" CDA[%08x]: %08x\n", xdmach->base + SAM_XDMACH_CDA_OFFSET, regs->cda);