sched/irq/irq_csection.c: Fix typos and correct some comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
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7947e50f06
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3b2aea204c
@ -162,7 +162,7 @@ int irqchain_detach(int irq, xcpt_t isr, FAR void *arg);
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* instrumentation):
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* instrumentation):
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*
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*
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* Take the CPU IRQ lock and disable interrupts on all CPUs. A thread-
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* Take the CPU IRQ lock and disable interrupts on all CPUs. A thread-
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* specific counter is increment to indicate that the thread has IRQs
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* specific counter is incremented to indicate that the thread has IRQs
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* disabled and to support nested calls to enter_critical_section().
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* disabled and to support nested calls to enter_critical_section().
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*
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*
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* NOTE: Most architectures do not support disabling all CPUs from one
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* NOTE: Most architectures do not support disabling all CPUs from one
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@ -66,7 +66,7 @@ volatile uint8_t g_cpu_nestcount[CONFIG_SMP_NCPUS];
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* Name: irq_waitlock
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* Name: irq_waitlock
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*
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*
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* Description:
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* Description:
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* Spin to get g_irq_waitlock, handling a known deadlock condition:
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* Spin to get g_cpu_irqlock, handling a known deadlock condition:
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*
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*
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* A deadlock may occur if enter_critical_section is called from an
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* A deadlock may occur if enter_critical_section is called from an
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* interrupt handler. Suppose:
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* interrupt handler. Suppose:
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@ -92,7 +92,7 @@ volatile uint8_t g_cpu_nestcount[CONFIG_SMP_NCPUS];
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* section. Since it is spinning with interrupts disabled, CPUm cannot
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* section. Since it is spinning with interrupts disabled, CPUm cannot
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* process the pending pause interrupt, causing the deadlock.
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* process the pending pause interrupt, causing the deadlock.
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*
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*
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* This function detects this deadlock condition while spinning with \
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* This function detects this deadlock condition while spinning with
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* interrupts disabled.
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* interrupts disabled.
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*
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*
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* Input Parameters:
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* Input Parameters:
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@ -131,7 +131,7 @@ static bool irq_waitlock(int cpu)
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*/
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*/
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#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
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#ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS
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/* Notify that we are waiting for a spinlock */
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/* Notify that we have aborted the wait for the spinlock */
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sched_note_spinabort(tcb, &g_cpu_irqlock);
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sched_note_spinabort(tcb, &g_cpu_irqlock);
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#endif
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#endif
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@ -161,7 +161,7 @@ static bool irq_waitlock(int cpu)
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*
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*
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* Description:
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* Description:
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* Take the CPU IRQ lock and disable interrupts on all CPUs. A thread-
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* Take the CPU IRQ lock and disable interrupts on all CPUs. A thread-
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* specific counter is increment to indicate that the thread has IRQs
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* specific counter is incremented to indicate that the thread has IRQs
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* disabled and to support nested calls to enter_critical_section().
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* disabled and to support nested calls to enter_critical_section().
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*
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*
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****************************************************************************/
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****************************************************************************/
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@ -253,7 +253,7 @@ try_again:
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else
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else
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{
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{
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/* Make sure that the g_cpu_irqlock() was not already set
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/* Make sure that the g_cpu_irqset was not already set
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* by previous logic on this CPU that was executed by the
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* by previous logic on this CPU that was executed by the
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* interrupt handler. We know that the bit in g_cpu_irqset
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* interrupt handler. We know that the bit in g_cpu_irqset
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* for this CPU was zero on entry into the interrupt handler,
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* for this CPU was zero on entry into the interrupt handler,
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@ -270,8 +270,8 @@ try_again_in_irq:
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if (!irq_waitlock(cpu))
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if (!irq_waitlock(cpu))
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{
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{
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/* We are in a deadlock condition due to a pending
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/* We are in a deadlock condition due to a pending
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* pause request interrupt request. Break the
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* pause request interrupt. Break the deadlock by
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* deadlock by handling the pause interrupt now.
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* handling the pause request now.
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*/
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*/
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DEBUGVERIFY(up_cpu_paused(cpu));
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DEBUGVERIFY(up_cpu_paused(cpu));
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@ -360,7 +360,7 @@ try_again_in_irq:
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goto try_again;
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goto try_again;
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}
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}
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/* The set the lock count to 1.
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/* Then set the lock count to 1.
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*
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*
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* Interrupts disables must follow a stacked order. We
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* Interrupts disables must follow a stacked order. We
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* cannot other context switches to re-order the enabling
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* cannot other context switches to re-order the enabling
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