Merged in dagar/nuttx/pr-stm32f7_SPI_DMA_per_bus (pull request #798)
stm32f7 enable separate DMA per SPI configuration Approved-by: GregoryN <gnutt@nuttx.org>
This commit is contained in:
Daniel Agar
GregoryN
parent
a0a537a9f0
commit
3b55f35bb3
@ -1969,6 +1969,48 @@ config STM32F7_SPI_DMA
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default n
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---help---
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Use DMA to improve SPI transfer performance. Cannot be used with STM32F7_SPI_INTERRUPT.
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config STM32F7_SPI1_DMA
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bool "SPI1 DMA"
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default n
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depends on STM32F7_SPI1 && STM32F7_SPI_DMA
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---help---
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Use DMA to improve SPI1 transfer performance.
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config STM32F7_SPI2_DMA
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bool "SPI2 DMA"
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default n
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depends on STM32F7_SPI2 && STM32F7_SPI_DMA
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---help---
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Use DMA to improve SPI2 transfer performance.
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config STM32F7_SPI3_DMA
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bool "SPI3 DMA"
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default n
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depends on STM32F7_SPI3 && STM32F7_SPI_DMA
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---help---
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Use DMA to improve SPI3 transfer performance.
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config STM32F7_SPI4_DMA
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bool "SPI4 DMA"
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default n
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depends on STM32F7_SPI4 && STM32F7_SPI_DMA
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---help---
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Use DMA to improve SPI4 transfer performance.
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config STM32F7_SPI5_DMA
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bool "SPI5 DMA"
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default n
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depends on STM32F7_SPI5 && STM32F7_SPI_DMA
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---help---
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Use DMA to improve SPI5 transfer performance.
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config STM32F7_SPI6_DMA
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bool "SPI6 DMA"
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default n
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depends on STM32F7_SPI6 && STM32F7_SPI_DMA
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---help---
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Use DMA to improve SPI6 transfer performance.
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endmenu # "SPI Configuration"
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@ -286,8 +286,13 @@ static struct stm32_spidev_s g_spi1dev =
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.spiirq = STM32_IRQ_SPI1,
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#endif
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#ifdef CONFIG_STM32F7_SPI_DMA
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# ifdef CONFIG_STM32F7_SPI1_DMA
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.rxch = DMAMAP_SPI1_RX,
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.txch = DMAMAP_SPI1_TX,
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# else
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.rxch = 0,
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.txch = 0,
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# endif
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#endif
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#ifdef CONFIG_PM
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.pm_cb.prepare = spi_pm_prepare,
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@ -336,8 +341,13 @@ static struct stm32_spidev_s g_spi2dev =
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.spiirq = STM32_IRQ_SPI2,
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#endif
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#ifdef CONFIG_STM32F7_SPI_DMA
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# ifdef CONFIG_STM32F7_SPI2_DMA
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.rxch = DMAMAP_SPI2_RX,
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.txch = DMAMAP_SPI2_TX,
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# else
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.rxch = 0,
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.txch = 0,
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# endif
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#endif
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#ifdef CONFIG_PM
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.pm_cb.prepare = spi_pm_prepare,
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@ -386,8 +396,13 @@ static struct stm32_spidev_s g_spi3dev =
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.spiirq = STM32_IRQ_SPI3,
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#endif
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#ifdef CONFIG_STM32F7_SPI_DMA
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# ifdef CONFIG_STM32F7_SPI3_DMA
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.rxch = DMAMAP_SPI3_RX,
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.txch = DMAMAP_SPI3_TX,
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# else
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.rxch = 0,
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.txch = 0,
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# endif
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#endif
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#ifdef CONFIG_PM
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.pm_cb.prepare = spi_pm_prepare,
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@ -436,8 +451,13 @@ static struct stm32_spidev_s g_spi4dev =
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.spiirq = STM32_IRQ_SPI4,
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#endif
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#ifdef CONFIG_STM32F7_SPI_DMA
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# ifdef CONFIG_STM32F7_SPI4_DMA
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.rxch = DMAMAP_SPI4_RX,
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.txch = DMAMAP_SPI4_TX,
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# else
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.rxch = 0,
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.txch = 0,
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# endif
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#endif
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#ifdef CONFIG_PM
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.pm_cb.prepare = spi_pm_prepare,
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@ -486,8 +506,13 @@ static struct stm32_spidev_s g_spi5dev =
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.spiirq = STM32_IRQ_SPI5,
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#endif
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#ifdef CONFIG_STM32F7_SPI_DMA
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# ifdef CONFIG_STM32F7_SPI5_DMA
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.rxch = DMAMAP_SPI5_RX,
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.txch = DMAMAP_SPI5_TX,
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# else
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.rxch = 0,
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.txch = 0,
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# endif
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#endif
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#ifdef CONFIG_PM
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.pm_cb.prepare = spi_pm_prepare,
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@ -508,7 +533,7 @@ static const struct spi_ops_s g_sp6iops =
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#endif
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.status = stm32_spi6status,
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#ifdef CONFIG_SPI_CMDDATA
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.cmddata = stm32_spi3cmddata,
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.cmddata = stm32_spi6cmddata,
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#endif
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.send = spi_send,
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#ifdef CONFIG_SPI_EXCHANGE
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@ -536,8 +561,13 @@ static struct stm32_spidev_s g_spi6dev =
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.spiirq = STM32_IRQ_SPI6,
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#endif
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#ifdef CONFIG_STM32F7_SPI_DMA
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# ifdef CONFIG_STM32F7_SPI6_DMA
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.rxch = DMAMAP_SPI6_RX,
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.txch = DMAMAP_SPI6_TX,
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# else
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.rxch = 0,
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.txch = 0,
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# endif
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#endif
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#ifdef CONFIG_PM
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.pm_cb.prepare = spi_pm_prepare,
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@ -1648,10 +1678,12 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
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DEBUGASSERT(priv != NULL);
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#ifdef CONFIG_STM32F7_DMACAPABLE
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if ((txbuffer && !stm32_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) ||
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(rxbuffer && !stm32_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr)))
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if ((priv->rxdma == NULL) || (priv->txdma == NULL) ||
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(txbuffer && !stm32_dmacapable((uint32_t)txbuffer, nwords, priv->txccr)) ||
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(rxbuffer && !stm32_dmacapable((uint32_t)rxbuffer, nwords, priv->rxccr)) ||
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up_interrupt_context())
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{
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/* Unsupported memory region, fall back to non-DMA method. */
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/* Invalid DMA channels, unsupported memory region, or interrupt context, fall back to non-DMA method. */
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spi_exchange_nodma(dev, txbuffer, rxbuffer, nwords);
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}
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@ -1959,28 +1991,36 @@ static void spi_bus_initialize(struct stm32_spidev_s *priv)
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* priority inheritance enabled.
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*/
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nxsem_init(&priv->rxsem, 0, 0);
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nxsem_init(&priv->txsem, 0, 0);
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if (priv->rxch && priv->txch)
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{
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nxsem_init(&priv->rxsem, 0, 0);
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nxsem_init(&priv->txsem, 0, 0);
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nxsem_setprotocol(&priv->rxsem, SEM_PRIO_NONE);
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nxsem_setprotocol(&priv->txsem, SEM_PRIO_NONE);
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nxsem_setprotocol(&priv->rxsem, SEM_PRIO_NONE);
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nxsem_setprotocol(&priv->txsem, SEM_PRIO_NONE);
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/* Get DMA channels. NOTE: stm32_dmachannel() will always assign the DMA channel.
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* if the channel is not available, then stm32_dmachannel() will block and wait
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* until the channel becomes available. WARNING: If you have another device sharing
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* a DMA channel with SPI and the code never releases that channel, then the call
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* to stm32_dmachannel() will hang forever in this function! Don't let your
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* design do that!
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*/
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/* Get DMA channels. NOTE: stm32_dmachannel() will always assign the DMA
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* channel. If the channel is not available, then stm32_dmachannel() will
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* block and wait until the channel becomes available. WARNING: If you have
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* another device sharing a DMA channel with SPI and the code never releases
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* that channel, then the call to stm32_dmachannel() will hang forever in
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* this function! Don't let your design do that!
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*/
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priv->rxdma = stm32_dmachannel(priv->rxch);
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priv->txdma = stm32_dmachannel(priv->txch);
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DEBUGASSERT(priv->rxdma && priv->txdma);
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priv->rxdma = stm32_dmachannel(priv->rxch);
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priv->txdma = stm32_dmachannel(priv->txch);
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DEBUGASSERT(priv->rxdma && priv->txdma);
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spi_modifycr2(priv, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN, 0);
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spi_modifycr2(priv, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN, 0);
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}
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else
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{
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priv->rxdma = NULL;
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priv->txdma = NULL;
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}
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#endif
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/* Enable spi */
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/* Enable SPI */
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spi_modifycr1(priv, SPI_CR1_SPE, 0);
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