sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Errors found while implementing USB support

Browse Source 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2562 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2010-03-28 21:26:08 +00:00
parent 44712b500a
commit 3b6ba4eae1
4 changed files with 12 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/src/lpc313x/Make.defs
View File

@ -1,7 +1,7 @@
############################################################################
# arch/arm/lpc313x/Make.defs
#
# Copyright (C) 2009 Gregory Nutt. All rights reserved.
# Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
#
# Redistribution and use in source and binary forms, with or without
@ -55,4 +55,4 @@ CGU_CSRCS = lpc313x_bcrndx.c lpc313x_clkdomain.c lpc313x_clkexten.c \
CHIP_ASRCS = $(CGU_ASRCS)
CHIP_CSRCS = lpc313x_allocateheap.c lpc313x_boot.c lpc313x_decodeirq.c \
lpc313x_irq.c lpc313x_lowputc.c lpc313x_serial.c \
lpc313x_timerisr.c $(CGU_CSRCS)
lpc313x_timerisr.c lpc313x_usbdev.c $(CGU_CSRCS)

10
arch/arm/src/lpc313x/lpc313x_evntrtr.h
View File

@ -1,7 +1,7 @@
/********************************************************************************************************
* arch/arm/src/lpc313x/lpc313x_evntrtr.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -60,7 +60,7 @@
#define _B(b) ((b)<<2) /* Maps bank number 0-3 to word offset */
#define _O(o) ((o)<<5) /* Maps output to bank group offset */
#define _OB(o,b) (_O(o)+_B(b)) /* Mqpw output and bank to word offset
#define _OB(o,b) (_O(o)+_B(b)) /* Mqpw output and bank to word offset */
#define EVNTRTR_EVENT(bank,bit) ((bank)<<5|bit) /* Makes a event number from a bank and bit */
#define EVNTRTR_BANK(e) ((e)>>5) /* Maps a event to a bank */
@ -74,7 +74,7 @@
#define LPC313X_EVNTRTR_INTSET_OFFSET(b) (0x0c40+_B(b)) /* Input event set */
#define LPC313X_EVNTRTR_MASK_OFFSET(b) (0x0c60+_B(b)) /* Input event mask */
#define LPC313X_EVNTRTR_MASKCLR_OFFSET(b) (0x0c80+_B(b)) /* Input event mask clear */
#define LPC313X_EVNTRTR_PEND_OFFSET(b) (0x0ca0+_B(b)) /* Input event mask set */
#define LPC313X_EVNTRTR_MASKSET_OFFSET(b) (0x0ca0+_B(b)) /* Input event mask set */
#define LPC313X_EVNTRTR_APR_OFFSET(b) (0x0cc0+_B(b)) /* Input event activation polarity */
#define LPC313X_EVNTRTR_ATR_OFFSET(b) (0x0ce0+_B(b)) /* Input event activation type */
#define LPC313X_EVNTRTR_RSR_OFFSET(b) (0x0d20+_B(b)) /* Input event raw status */
@ -100,7 +100,7 @@
#define LPC313X_EVNTRTR_APR(b) (LPC313X_EVNTRTR_VBASE+LPC313X_EVNTRTR_APR_OFFSET(b))
#define LPC313X_EVNTRTR_ATR(b) (LPC313X_EVNTRTR_VBASE+LPC313X_EVNTRTR_ATR_OFFSET(b))
#define LPC313X_EVNTRTR_RSR(b) (LPC313X_EVNTRTR_VBASE+LPC313X_EVNTRTR_RSR_OFFSET(b))
#define LPC313X_EVNTRTR_INTOUT_OFFSET (LPC313X_EVNTRTR_VBASE+LPC313X_EVNTRTR_INTOUT_OFFSET)
#define LPC313X_EVNTRTR_INTOUT (LPC313X_EVNTRTR_VBASE+LPC313X_EVNTRTR_INTOUT_OFFSET)
#define LPC313X_EVNTRTR_INTOUTPEND(o,b) (LPC313X_EVNTRTR_VBASE+LPC313X_EVNTRTR_INTOUTPEND_OFFSET(o,b))
#define LPC313X_EVNTRTR_CGUWKUPPEND(b) (LPC313X_EVNTRTR_VBASE+LPC313X_EVNTRTR_CGUWKUPPEND_OFFSET(b))
#define LPC313X_EVNTRTR_INTOUTMASK(o,b) (LPC313X_EVNTRTR_VBASE+LPC313X_EVNTRTR_INTOUTMASK_OFFSET(o,b))
@ -239,7 +239,7 @@
#define EVENTRTR_ARM926LPNFIQ EVNTRTR_EVENT(3,11) /* Reflects nFIQ signal to ARM core */
#define EVENTRTR_I2C1SCLN EVNTRTR_EVENT(3,10) /* Input event from I2C1 */
#define EVENTRTR_I2C0SCLN EVNTRTR_EVENT(3,9) /* Input event from I2C0 */
#define EVENTRTR_UARTRXD EVNTRTR_EVENT(3,8) /* Input event from UART */
#define EVENTRTR_UART EVNTRTR_EVENT(3,8) /* Input event from UART */
#define EVENTRTR_WDOGM0 EVNTRTR_EVENT(3,7) /* Input event from Watchdog Timer */
#define EVENTRTR_ADCINT EVNTRTR_EVENT(3,6) /* Input event from ADC */
#define EVENTRTR_TIMER3INTCT1 EVNTRTR_EVENT(3,5) /* Input event from Timer 3 */

7
arch/arm/src/lpc313x/lpc313x_usbotg.h
View File

@ -1,7 +1,7 @@
/************************************************************************************************
* arch/arm/src/lpc313x/lpc313x_usbotg.h
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
@ -341,7 +341,7 @@
#define USBHOST_FRINDEX_FLI_SHIFT (3) /* Bits 3-(n+2): Frame list current index */
#define USBHOST_FRINDEX_FLI_MASK(n) (0x7ff << ((n)+USBHOST_FRINDEX_FLI_SHIFT-1)
#define USBHOST_FRINDEX_CUFN_SHIFT (0) /* Bits 0-2: Current micro frame number */
#define USBHOST_FRINDEX_CUFN_SHIFT (7 << USBHOST_FRINDEX_CUFN_SHIFT)
#define USBHOST_FRINDEX_CUFN_MASK (7 << USBHOST_FRINDEX_CUFN_SHIFT)
/* USB Device Address register DEVICEADDR (address 0x19000154) -- Device Mode */
@ -604,8 +604,7 @@
#define USBDEV_ENDPTCOMPLETE_ERCE1 (1 << 1) /* Bit 1: EP recv complete event for physical OUT EP 1 */
#define USBDEV_ENDPTCOMPLETE_ERCE0 (1 << 0) /* Bit 0: EP recv complete event for physical OUT EP 0 */
/* USB Endpoint 0 Control register ENDPTCTRL0 (address 0xffe0c1c0) */
#warning "REVISIT -- Check address"
/* USB Endpoint 0 Control register ENDPTCTRL0 (address 0x190001c0) */
#define USBDEV_ENDPTCTRL0_TXE (1 << 23) /* Bit 23: Tx endpoint enable */
#define USBDEV_ENDPTCTRL0_TXT_SHIFT (18) /* Bits 18-19: Tx endpoint type */

4
arch/arm/src/sam3u/Make.defs
View File

@ -46,6 +46,6 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
CHIP_ASRCS =
CHIP_CSRCS = sam3u_allocateheap.c sam3u_clockconfig.c sam3u_gpioirq.c \
sam3u_irq.c sam3u_lowputc.c sam3u_pio.c sam3u_serial.c \
sam3u_start.c sam3u_timerisr.c
sam3u_hsmci.c sam3u_irq.c sam3u_lowputc.c sam3u_pio.c \
sam3u_serial.c sam3u_start.c sam3u_timerisr.c