Fix more overflow/truncation problems in timer setups
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1537 42af7a65-404d-4744-a932-0658087f49c3
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@ -631,8 +631,9 @@
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wrong by 64 bytes (Kevin Franzen).
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* ez80Acclaim!: Corrected some stack handling errors during interrupt handling
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context save and restore (Kevin Franzen).
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* ez80Acclaim!:Corrected vector intialization logic (Kevin Franzen).
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* ez80Acclaim!: Corrected overflow problem in calculation of baud rate divisor
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* ez80Acclaim!: Corrected vector intialization logic (Kevin Franzen).
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* ez80Acclaim!: Corrected overflow problem in the calculation of UART baud rate
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divisor, the system timer divisor, and the EMAC poll timer.
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* ez80Acclaim!: Fixed GPIO pin configuration get serial output
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* ez80Acclaim!: Correct stack overflow in ostest example configuration
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@ -1352,8 +1352,9 @@ nuttx-0.4.2 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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wrong by 64 bytes (Kevin Franzen).
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* ez80Acclaim!: Corrected some stack handling errors during interrupt handling
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context save and restore (Kevin Franzen).
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* ez80Acclaim!:Corrected vector intialization logic (Kevin Franzen).
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* ez80Acclaim!: Corrected overflow problem in calculation of baud rate divisor
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* ez80Acclaim!: Corrected vector intialization logic (Kevin Franzen).
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* ez80Acclaim!: Corrected overflow problem in the calculation of UART baud rate
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divisor, the system timer divisor, and the EMAC poll timer.
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* ez80Acclaim!: Fixed GPIO pin configuration get serial output
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* ez80Acclaim!: Correct stack overflow in ostest example configuration
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2
Makefile
2
Makefile
@ -251,7 +251,7 @@ subdir_clean:
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@$(MAKE) -C mm -f Makefile.test TOPDIR="$(TOPDIR)" clean
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clean: subdir_clean
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@rm -f $(BIN) $(BIN).* mm_test *.map *~
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@rm -f $(BIN) nuttx.* mm_test *.map *~
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subdir_distclean:
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@for dir in $(CLEANDIRS) ; do \
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@ -117,11 +117,6 @@
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# error "Unsupported CONFIG_EZ80_PKTBUFSIZE value"
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#endif
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/* The system clock frequency is defined in the linkcmd file */
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extern unsigned long SYS_CLK_FREQ;
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#define _DEFCLK ((unsigned long)&SYS_CLK_FREQ)
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/* Select the fastest MDC clock that does not exceed 25MHz. The MDC
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* clock derives from the SCLK divided by 4, 6, 8, 10, 14, 20, or 28.
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*/
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@ -152,10 +147,10 @@ extern unsigned long SYS_CLK_FREQ;
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#define EMAC_RETRY 0x0f /* CFG3: Maximum number of retry default value */
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/* Poll timer setting. The transmit poll timer is set in increments of
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* SYSCLCK / 256
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* SYSCLCK / 256. NOTE: The system clock frequency is defined in the board.h file.
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*/
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#define EMAC_PTMR ((CONFIG_EZ80_TXPOLLTIMERMS * (_DEFCLK / 1000) >> 8))
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#define EMAC_PTMR ((CONFIG_EZ80_TXPOLLTIMERMS * (ez80_systemclock / 1000) >> 8))
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/* EMAC system interrupts :
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*
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@ -55,8 +55,6 @@
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* Private Definitions
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****************************************************************************/
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/* The system clock frequency is defined in the board.h file */
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/* Is there any serial support? This might be the case if the board does
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* not have serial ports but supports stdout through, say, an LCD.
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*/
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@ -148,11 +146,13 @@ static void ez80_setbaud(void)
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/* The resulting BAUD and depends on the system clock frequency and the
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* BRG divisor as follows:
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*
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* BAUD = SYSTEM_CLOCK_FREQUENCY / (16 * BRG_Divisor)
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* BAUD = SYSTEM_CLOCK_FREQUENCY / (16 * BRG_Divisor)
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*
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* Or
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*
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* BRG_Divisor = SYSTEM_CLOCK_FREQUENCY / 16 / BAUD
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* BRG_Divisor = SYSTEM_CLOCK_FREQUENCY / 16 / BAUD
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*
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* NOTE: The system clock frequency value is defined in the board.h file
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*/
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brg_divisor = (ez80_systemclock + (CONFIG_UART_BAUD << 3)) / (CONFIG_UART_BAUD << 4);
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@ -1,7 +1,7 @@
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/***************************************************************************
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* arch/z80/src/ez80/ez80_timerisr.c
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -53,11 +53,6 @@
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* Definitions
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***************************************************************************/
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/* The system clock frequency is defined in the linkcmd file */
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extern unsigned long SYS_CLK_FREQ;
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#define _DEFCLK ((unsigned long)&SYS_CLK_FREQ)
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/***************************************************************************
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* Private Types
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***************************************************************************/
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@ -143,9 +138,11 @@ void up_timerinit(void)
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*
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* For a system timer of 50,000,000 that would result in a reload value of
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* 31,250
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*
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* NOTE: The system clock frequency value is defined in the board.h file
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*/
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reload = (uint16)(_DEFCLK / 1600);
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reload = (uint16)(ez80_systemclock / 1600);
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outp(EZ80_TMR0_RRH, (ubyte)(reload >> 8));
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outp(EZ80_TMR0_RRL, (ubyte)(reload));
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@ -2,7 +2,7 @@
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* arch/z80/src/ez80/ez80f91.h
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* arch/z80/src/chip/ez80f91.h
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -206,7 +206,7 @@
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# define EZ80_TMRCLKDIV_16 0x08 /* 01: 16 */
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# define EZ80_TMRCLKDIV_64 0x10 /* 10: 64 */
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# define EZ80_TMRCLKDIV_256 0x18 /* 11: 256 */
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#define EZ80_TMRCTL_TIMCONT 0x04 /* Bit 2: Continusous mode */
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#define EZ80_TMRCTL_TIMCONT 0x04 /* Bit 2: Continuous mode */
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#define EZ80_TMRCTL_RLD 0x02 /* Bit 1: Force reload */
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#define EZ80_TMRCTL_TIMEN 0x01 /* Bit 0: Programmable reload timer enabled */
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@ -231,7 +231,7 @@ CONFIG_DEV_LOWCONSOLE=y
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CONFIG_DISABLE_CLOCK=n
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CONFIG_DISABLE_POSIX_TIMERS=n
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CONFIG_DISABLE_PTHREAD=n
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CONFIG_DISABLE_SIGNALS=n
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CONFIG_DISABLE_SIGNALS=y
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CONFIG_DISABLE_MQUEUE=n
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CONFIG_DISABLE_MOUNTPOINT=n
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CONFIG_DISABLE_ENVIRON=n
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