xtensa/esp32s3: Add support for Tickless kernel using Systimer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei
Petro Karashchenko
parent
d61476f467
commit
3b7a6ae311
@ -483,6 +483,12 @@ config ESP32S3_ONESHOT
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endmenu # Timer/Counter Configuration
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config ESP32S3_TICKLESS
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bool "Enable Tickless OS"
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default n
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select ARCH_HAVE_TICKLESS
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select SCHED_TICKLESS
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menu "Application Image Configuration"
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choice
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@ -64,9 +64,8 @@ endif
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# Required ESP32-S3 files (arch/xtensa/src/esp32s3)
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CHIP_CSRCS = esp32s3_irq.c esp32s3_clockconfig.c esp32s3_region.c
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CHIP_CSRCS += esp32s3_timerisr.c esp32s3_user.c esp32s3_allocateheap.c
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CHIP_CSRCS += esp32s3_systemreset.c esp32s3_user.c esp32s3_allocateheap.c
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CHIP_CSRCS += esp32s3_wdt.c esp32s3_gpio.c esp32s3_lowputc.c esp32s3_serial.c
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CHIP_CSRCS += esp32s3_systemreset.c
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# Configuration-dependent ESP32-S3 files
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@ -74,6 +73,12 @@ ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CHIP_CSRCS += esp32s3_idle.c
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endif
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ifeq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += esp32s3_tickless.c
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else
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CHIP_CSRCS += esp32s3_timerisr.c
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endif
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ifeq ($(CONFIG_ESP32S3_TIMER),y)
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CHIP_CSRCS += esp32s3_tim.c
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ifeq ($(CONFIG_TIMER),y)
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484
arch/xtensa/src/esp32s3/esp32s3_tickless.c
Normal file
484
arch/xtensa/src/esp32s3/esp32s3_tickless.c
Normal file
@ -0,0 +1,484 @@
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/****************************************************************************
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* arch/xtensa/src/esp32s3/esp32s3_tickless.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Tickless OS Support.
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*
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* When CONFIG_SCHED_TICKLESS is enabled, all support for timer interrupts
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* is suppressed and the platform specific code is expected to provide the
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* following custom functions.
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*
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* void up_timer_initialize(void): Initializes the timer facilities.
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* Called early in the initialization sequence (by up_initialize()).
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* int up_timer_gettime(struct timespec *ts): Returns the current
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* time from the platform specific time source.
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* int up_timer_cancel(void): Cancels the interval timer.
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* int up_timer_start(const struct timespec *ts): Start (or re-starts)
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* the interval timer.
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*
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* The RTOS will provide the following interfaces for use by the platform-
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* specific interval timer implementation:
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*
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* void sched_timer_expiration(void): Called by the platform-specific
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* logic when the interval timer expires.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <time.h>
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#include <assert.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/clock.h>
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#include <arch/board/board.h>
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#include <arch/irq.h>
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#include "xtensa.h"
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#include "chip.h"
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#include "esp32s3_irq.h"
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#include "hardware/esp32s3_systimer.h"
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#include "hardware/esp32s3_system.h"
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#include "hardware/esp32s3_soc.h"
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#ifdef CONFIG_SCHED_TICKLESS
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define ESP32S3_SYSTIMER_TICKS_PER_SEC (16 * 1000 * 1000)
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#define CTICK_PER_SEC (ESP32S3_SYSTIMER_TICKS_PER_SEC)
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#define CTICK_PER_USEC (CTICK_PER_SEC / USEC_PER_SEC)
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#define SEC_2_CTICK(s) ((s) * CTICK_PER_SEC)
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#define USEC_2_CTICK(us) ((us) * CTICK_PER_USEC)
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#define NSEC_2_CTICK(nsec) (((nsec) * CTICK_PER_USEC) / NSEC_PER_USEC)
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#define CTICK_2_SEC(tick) ((tick) / CTICK_PER_SEC)
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#define CTICK_2_USEC(tick) ((tick) / CTICK_PER_USEC)
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#define CTICK_2_NSEC(tick) ((tick) * 1000 / CTICK_PER_USEC)
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#define CPU_TICKS_MAX (UINT32_MAX / 4 * 3)
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static inline uint64_t tickless_getcounter(void);
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static inline uint64_t tickless_getalarmvalue(void);
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static void IRAM_ATTR tickless_setcounter(uint64_t ticks);
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static int IRAM_ATTR tickless_isr(int irq, void *context, void *arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static bool g_timer_started; /* Whether an interval timer is being started */
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: tickless_getcounter
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*
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* Description:
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* Return the total ticks of system since power-on.
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*
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* Input Parameters:
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* None.
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*
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* Returned Value:
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* Total system ticks.
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*
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****************************************************************************/
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static inline uint64_t tickless_getcounter(void)
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{
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uint32_t lo;
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uint32_t lo_start;
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uint32_t hi;
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uint64_t counter;
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/* Set the "update" bit and wait for acknowledgment */
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modifyreg32(SYSTIMER_UNIT0_OP_REG, 0, SYSTIMER_TIMER_UNIT0_UPDATE);
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while ((getreg32(SYSTIMER_UNIT0_OP_REG) &
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SYSTIMER_TIMER_UNIT0_VALUE_VALID_M) !=
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SYSTIMER_TIMER_UNIT0_VALUE_VALID_M);
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/* Read LO, HI, then LO again, check that LO returns the same value.
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* This accounts for the case when an interrupt may happen between reading
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* HI and LO values, and this function may get called from the ISR.
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* In this case, the repeated read will return consistent values.
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*/
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lo_start = getreg32(SYSTIMER_UNIT0_VALUE_LO_REG);
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do
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{
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lo = lo_start;
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hi = getreg32(SYSTIMER_UNIT0_VALUE_HI_REG);
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lo_start = getreg32(SYSTIMER_UNIT0_VALUE_LO_REG);
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}
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while (lo_start != lo);
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counter = ((uint64_t) hi << 32) | lo;
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return counter;
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}
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/****************************************************************************
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* Name: tickless_getalarmvalue
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*
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* Description:
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* Return the remaining ticks in the currently running timer.
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*
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* Input Parameters:
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* None.
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*
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* Returned Value:
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* Remaining ticks.
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*
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****************************************************************************/
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static inline uint64_t tickless_getalarmvalue(void)
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{
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uint32_t hi = getreg32(SYSTIMER_TARGET0_HI_REG);
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uint32_t lo = getreg32(SYSTIMER_TARGET0_LO_REG);
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uint64_t ticks = ((uint64_t) hi << 32) | lo;
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return ticks;
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}
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/****************************************************************************
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* Name: tickless_setcounter
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*
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* Description:
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* Set the new value for the timer counter.
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*
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* Input Parameters:
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* ticks - Ticks for a timer operation.
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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static void IRAM_ATTR tickless_setcounter(uint64_t ticks)
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{
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uint64_t alarm_ticks = tickless_getcounter() + ticks;
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/* Select alarm mode */
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modifyreg32(SYSTIMER_TARGET0_CONF_REG, SYSTIMER_TARGET0_PERIOD_MODE, 0);
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/* Set alarm value */
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putreg32(alarm_ticks & 0xffffffff, SYSTIMER_TARGET0_LO_REG);
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putreg32((alarm_ticks >> 32) & 0xfffff, SYSTIMER_TARGET0_HI_REG);
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/* Apply alarm value */
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putreg32(SYSTIMER_TIMER_COMP0_LOAD, SYSTIMER_COMP0_LOAD_REG);
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/* Enable alarm */
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modifyreg32(SYSTIMER_CONF_REG, 0, SYSTIMER_TARGET0_WORK_EN);
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/* Enable interrupt */
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modifyreg32(SYSTIMER_INT_CLR_REG, 0, SYSTIMER_TARGET0_INT_CLR);
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modifyreg32(SYSTIMER_INT_ENA_REG, 0, SYSTIMER_TARGET0_INT_ENA);
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}
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/****************************************************************************
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* Name: tickless_isr
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*
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* Description:
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* Called as the IRQ handler for timer expiration.
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*
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* Input Parameters:
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* irq - CPU interrupt index.
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* context - Context data from the ISR.
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* arg - Opaque pointer to the internal driver state structure.
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*
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* Returned Value:
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* Zero (OK) is returned on success. A negated errno value is returned on
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* failure.
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*
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****************************************************************************/
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static int IRAM_ATTR tickless_isr(int irq, void *context, void *arg)
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{
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g_timer_started = false;
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modifyreg32(SYSTIMER_INT_CLR_REG, 0, SYSTIMER_TARGET0_INT_CLR);
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nxsched_timer_expiration();
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return OK;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_timer_gettime
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*
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* Description:
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* Return the elapsed time since power-up (or, more correctly, since
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* up_timer_initialize() was called). This function is functionally
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* equivalent to:
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*
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* int clock_gettime(clockid_t clockid, struct timespec *ts);
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*
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* when clockid is CLOCK_MONOTONIC.
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*
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* This function provides the basis for reporting the current time and
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* also is used to eliminate error build-up from small errors in interval
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* time calculations.
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*
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* Provided by platform-specific code and called from the RTOS base code.
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*
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* Input Parameters:
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* ts - Provides the location in which to return the up-time.
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned on
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* any failure.
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*
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* Assumptions:
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* Called from the normal tasking context. The implementation must
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* provide whatever mutual exclusion is necessary for correct operation.
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* This can include disabling interrupts in order to assure atomic register
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* operations.
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*
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****************************************************************************/
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int IRAM_ATTR up_timer_gettime(struct timespec *ts)
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{
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uint64_t ticks;
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irqstate_t flags;
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flags = enter_critical_section();
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ticks = tickless_getcounter();
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ts->tv_sec = CTICK_2_SEC(ticks);
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ts->tv_nsec = CTICK_2_NSEC(ticks % CTICK_PER_SEC);
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leave_critical_section(flags);
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return OK;
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}
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/****************************************************************************
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* Name: up_timer_cancel
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*
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* Description:
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* Cancel the interval timer and return the time remaining on the timer.
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* These two steps need to be as nearly atomic as possible.
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* nxsched_timer_expiration() will not be called unless the timer is
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* restarted with up_timer_start().
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*
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* If, as a race condition, the timer has already expired when this
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* function is called, then that pending interrupt must be cleared so
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* that up_timer_start() and the remaining time of zero should be
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* returned.
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*
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* NOTE: This function may execute at a high rate with no timer running (as
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* when pre-emption is enabled and disabled).
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*
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* Provided by platform-specific code and called from the RTOS base code.
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*
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* Input Parameters:
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* ts - Location to return the remaining time. Zero should be returned
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* if the timer is not active. ts may be zero in which case the
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* time remaining is not returned.
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*
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* Returned Value:
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* Zero (OK) is returned on success. A call to up_timer_cancel() when
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* the timer is not active should also return success; a negated errno
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* value is returned on any failure.
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*
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* Assumptions:
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* May be called from interrupt level handling or from the normal tasking
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* level. Interrupts may need to be disabled internally to assure
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* non-reentrancy.
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*
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****************************************************************************/
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int IRAM_ATTR up_timer_cancel(struct timespec *ts)
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{
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uint64_t alarm_value;
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uint64_t counter;
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irqstate_t flags;
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flags = enter_critical_section();
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if (ts != NULL)
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{
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if (!g_timer_started)
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{
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ts->tv_sec = 0;
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ts->tv_nsec = 0;
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}
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else
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{
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alarm_value = tickless_getalarmvalue();
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counter = tickless_getcounter();
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if (alarm_value <= counter)
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{
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alarm_value = 0;
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}
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else
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{
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alarm_value -= counter;
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}
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ts->tv_sec = CTICK_2_SEC(alarm_value);
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ts->tv_nsec = CTICK_2_NSEC(alarm_value % CTICK_PER_SEC);
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}
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}
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g_timer_started = false;
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modifyreg32(SYSTIMER_CONF_REG, SYSTIMER_TARGET0_WORK_EN, 0);
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modifyreg32(SYSTIMER_INT_ENA_REG, SYSTIMER_TARGET0_INT_ENA, 0);
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modifyreg32(SYSTIMER_INT_CLR_REG, SYSTIMER_TARGET0_INT_CLR, 0);
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leave_critical_section(flags);
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return OK;
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}
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/****************************************************************************
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* Name: up_timer_start
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*
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* Description:
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* Start the interval timer. nxsched_timer_expiration() will be
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* called at the completion of the timeout (unless up_timer_cancel
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* is called to stop the timing.
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*
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* Provided by platform-specific code and called from the RTOS base code.
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*
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* Input Parameters:
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* ts - Provides the time interval until nxsched_timer_expiration() is
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* called.
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned on
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* any failure.
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*
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* Assumptions:
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* May be called from interrupt level handling or from the normal tasking
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* level. Interrupts may need to be disabled internally to assure
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* non-reentrancy.
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*
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****************************************************************************/
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int IRAM_ATTR up_timer_start(const struct timespec *ts)
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{
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uint64_t cpu_ticks;
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irqstate_t flags;
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flags = enter_critical_section();
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if (g_timer_started)
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{
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up_timer_cancel(NULL);
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}
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cpu_ticks = SEC_2_CTICK((uint64_t)ts->tv_sec) +
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NSEC_2_CTICK((uint64_t)ts->tv_nsec);
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tickless_setcounter(cpu_ticks);
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g_timer_started = true;
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leave_critical_section(flags);
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return OK;
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}
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/****************************************************************************
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* Name: up_timer_initialize
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*
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* Description:
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* Initializes all platform-specific timer facilities. This function is
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* called early in the initialization sequence by up_initialize().
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* On return, the current up-time should be available from
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* up_timer_gettime() and the interval timer is ready for use (but not
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* actively timing.
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*
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* Provided by platform-specific code and called from the architecture-
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* specific logic.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* Called early in the initialization sequence before any special
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* concurrency protections are required.
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*
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****************************************************************************/
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void up_timer_initialize(void)
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{
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int cpuint;
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g_timer_started = false;
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||||
|
||||
cpuint = esp32s3_setup_irq(0, ESP32S3_PERIPH_SYSTIMER_TARGET0, 1,
|
||||
ESP32S3_CPUINT_LEVEL);
|
||||
|
||||
DEBUGASSERT(cpuint >= 0);
|
||||
|
||||
/* Attach the timer interrupt. */
|
||||
|
||||
irq_attach(ESP32S3_IRQ_SYSTIMER_TARGET0, tickless_isr, NULL);
|
||||
|
||||
/* Enable the allocated CPU interrupt. */
|
||||
|
||||
up_enable_irq(ESP32S3_IRQ_SYSTIMER_TARGET0);
|
||||
|
||||
/* Enable timer clock */
|
||||
|
||||
modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, SYSTEM_SYSTIMER_CLK_EN);
|
||||
modifyreg32(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_SYSTIMER_RST, 0);
|
||||
modifyreg32(SYSTIMER_CONF_REG, 0, SYSTIMER_CLK_EN);
|
||||
|
||||
/* Stall systimer 0 when CPU stalls, e.g., when using JTAG to debug */
|
||||
|
||||
modifyreg32(SYSTIMER_CONF_REG, 0, SYSTIMER_TIMER_UNIT0_CORE0_STALL_EN);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SCHED_TICKLESS */
|
||||
@ -0,0 +1,48 @@
|
||||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_ARCH_LEDS is not set
|
||||
# CONFIG_NSH_ARGCAT is not set
|
||||
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
|
||||
# CONFIG_NSH_CMDPARMS is not set
|
||||
CONFIG_ARCH="xtensa"
|
||||
CONFIG_ARCH_BOARD="esp32s3-devkit"
|
||||
CONFIG_ARCH_BOARD_ESP32S3_DEVKIT=y
|
||||
CONFIG_ARCH_CHIP="esp32s3"
|
||||
CONFIG_ARCH_CHIP_ESP32S3=y
|
||||
CONFIG_ARCH_CHIP_ESP32S3WROOM1=y
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_ARCH_XTENSA=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16717
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_FULLOPT=y
|
||||
CONFIG_DEBUG_SYMBOLS=y
|
||||
CONFIG_ESP32S3_TICKLESS=y
|
||||
CONFIG_ESP32S3_UART0=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_HAVE_CXX=y
|
||||
CONFIG_HAVE_CXXINITIALIZE=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=3072
|
||||
CONFIG_INIT_ENTRYPOINT="nsh_main"
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_FILEIOSIZE=512
|
||||
CONFIG_NSH_LINELEN=64
|
||||
CONFIG_NSH_READLINE=y
|
||||
CONFIG_PREALLOC_TIMERS=4
|
||||
CONFIG_RAM_SIZE=114688
|
||||
CONFIG_RAM_START=0x20000000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_START_DAY=6
|
||||
CONFIG_START_MONTH=12
|
||||
CONFIG_START_YEAR=2011
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_USEC_PER_TICK=10000
|
||||
Loading…
Reference in New Issue
Block a user