Fix an error in LPC43xx clock configuratin that can cause fail to boot
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4945 42af7a65-404d-4744-a932-0658087f49c3
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@ -65,7 +65,6 @@
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#include "up_arch.h"
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#include "chip.h"
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#include "lpc43_internal.h"
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#include "lpc43_syscon.h"
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#include "lpc43_pinconn.h"
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#include "lpc43_adc.h"
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@ -163,13 +163,13 @@ static inline void lpc43_xtalconfig(void)
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/* Select the crystal oscillator as the input to PLL1 */
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regval = getreg32(LPC43_PLL1_CTRL);
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regval &= PLL1_CTRL_CLKSEL_MASK;
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regval &= ~PLL1_CTRL_CLKSEL_MASK;
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regval |= PLL1_CLKSEL_XTAL | PLL1_CTRL_AUTOBLOCK;
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putreg32(regval, LPC43_PLL1_CTRL);
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}
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/****************************************************************************
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* Name: lpc43_clockconfig
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* Name: lpc43_pll1config
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*
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* Description:
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* Configure PLL1 dividers and multipliers per the settings in the board.h
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@ -197,11 +197,11 @@ static inline void lpc43_pll1config(void)
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PLL1_CTRL_MSEL_MASK);
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putreg32(regval, LPC43_PLL1_CTRL);
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/* Clear PLL1 controls:
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/* Set selected PLL1 controls:
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*
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* - PLL1_CTRL_FBSEL: Set in both integer and direct modes
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* - PLL1_CTRL_DIRECT: Set in direct mode
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* - PLL1_CTRL_PSEL: Set to the value from board.h
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* - PLL1_CTRL_PSEL: Set to the value from board.h (integer mode only)
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* - PLL1_CTRL_NSEL: Set to the value from board.h
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* - PLL1_CTRL_MSEL: Set to the value from board.h
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*/
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@ -75,11 +75,11 @@
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/* Integer and direct modes are supported:
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*
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* In integer mode:
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* In integer mode (Fclkout < 156000000):
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* Fclkin = BOARD_XTAL_FREQUENCY
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* Fclkout = Msel * FClkin / Nsel
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* Fcco = 2 * Psel * Nclkout
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* In direct mode:
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* Fcco = 2 * Psel * Fclkout
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* In direct mode (Fclkout > 156000000):
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* Fclkin = BOARD_XTAL_FREQUENCY
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* Fclkout = Msel * FClkin / Nsel
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* Fcco = Fclkout
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@ -112,6 +112,7 @@ static int devnull_poll(FAR struct file *filp, FAR struct pollfd *fds,
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sem_post(fds->sem);
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}
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}
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return OK;
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}
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#endif
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