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arch/z80/: Change some *err() message to *info() messages if what was a *dbg() message does not indicate and error condition.

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This commit is contained in:
Gregory Nutt 2016-06-13 18:55:24 -06:00
parent 191d875b05
commit 3c2050040c
23 changed files with 127 additions and 143 deletions
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12
arch/z80/src/common/up_assert.c
View File

@ -161,17 +161,17 @@ void up_assert(void)
#ifdef CONFIG_HAVE_FILENAME
#if CONFIG_TASK_NAME_SIZE > 0
llerr("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
llinfo("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
llerr("Assertion failed at file:%s line: %d\n",
filename, lineno);
llinfo("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
#else
#if CONFIG_TASK_NAME_SIZE > 0
llerr("Assertion failed: task: %s\n", rtcb->name);
llinfo("Assertion failed: task: %s\n", rtcb->name);
#else
llerr("Assertion failed\n");
llinfo("Assertion failed\n");
#endif
#endif

2
arch/z80/src/common/up_blocktask.c
View File

@ -85,7 +85,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
(tcb->task_state <= LAST_READY_TO_RUN_STATE));
/* err("Blocking TCB=%p\n", tcb); */
/* info("Blocking TCB=%p\n", tcb); */
/* Remove the tcb task from the ready-to-run list. If we
* are blocking the task at the head of the task list (the

22
arch/z80/src/common/up_exit.c
View File

@ -88,8 +88,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
int i;
#endif
llerr(" TCB=%p name=%s\n", tcb, tcb->argv[0]);
llerr(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
llinfo(" TCB=%p name=%s\n", tcb, tcb->argv[0]);
llinfo(" priority=%d state=%d\n", tcb->sched_priority, tcb->task_state);
#if CONFIG_NFILE_DESCRIPTORS > 0
filelist = tcb->group->tg_filelist;
@ -98,8 +98,8 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
struct inode *inode = filelist->fl_files[i].f_inode;
if (inode)
{
llerr(" fd=%d refcount=%d\n",
i, inode->i_crefs);
llinfo(" fd=%d refcount=%d\n",
i, inode->i_crefs);
}
}
#endif
@ -112,11 +112,11 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
if (filep->fs_fd >= 0)
{
#if CONFIG_STDIO_BUFFER_SIZE > 0
llerr(" fd=%d nbytes=%d\n",
filep->fs_fd,
filep->fs_bufpos - filep->fs_bufstart);
llinfo(" fd=%d nbytes=%d\n",
filep->fs_fd,
filep->fs_bufpos - filep->fs_bufstart);
#else
llerr(" fd=%d\n", filep->fs_fd);
llinfo(" fd=%d\n", filep->fs_fd);
#endif
}
}
@ -149,10 +149,10 @@ void _exit(int status)
(void)up_irq_save();
sllerr("TCB=%p exiting\n", tcb);
sllinfo("TCB=%p exiting\n", tcb);
#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG_FEATURES)
llerr("Other tasks:\n");
llinfo("Other tasks:\n");
sched_foreach(_up_dumponexit, NULL);
#endif
@ -165,7 +165,7 @@ void _exit(int status)
*/
tcb = this_task();
sllerr("New Active Task TCB=%p\n", tcb);
sllinfo("New Active Task TCB=%p\n", tcb);
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously running

4
arch/z80/src/common/up_initialize.c
View File

@ -75,13 +75,13 @@ static void up_calibratedelay(void)
{
int i;
llerr("Beginning 100s delay\n");
llwarn("Beginning 100s delay\n");
for (i = 0; i < 100; i++)
{
up_mdelay(1000);
}
llerr("End 100s delay\n");
llwarn("End 100s delay\n");
}
#else
# define up_calibratedelay()

2
arch/z80/src/common/up_releasepending.c
View File

@ -70,7 +70,7 @@ void up_release_pending(void)
{
FAR struct tcb_s *rtcb = this_task();
sllerr("From TCB=%p\n", rtcb);
sllinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */

2
arch/z80/src/common/up_reprioritizertr.c
View File

@ -98,7 +98,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
FAR struct tcb_s *rtcb = this_task();
bool switch_needed;
sllerr("TCB=%p PRI=%d\n", tcb, priority);
sllinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just

10
arch/z80/src/common/up_stackdump.c
View File

@ -87,13 +87,13 @@ static void up_stackdump(void)
uint16_t stack_base = (uint16_t)rtcb->adj_stack_ptr;
uint16_t stack_size = (uint16_t)rtcb->adj_stack_size;
llerr("stack_base: %04x\n", stack_base);
llerr("stack_size: %04x\n", stack_size);
llerr("sp: %04x\n", sp);
llinfo("stack_base: %04x\n", stack_base);
llinfo("stack_size: %04x\n", stack_size);
llinfo("sp: %04x\n", sp);
if (sp >= stack_base || sp < stack_base - stack_size)
{
llerr("ERROR: Stack pointer is not within allocated stack\n");
llinfo("ERROR: Stack pointer is not within allocated stack\n");
return;
}
else
@ -103,7 +103,7 @@ static void up_stackdump(void)
for (stack = sp & ~0x0f; stack < stack_base; stack += 8*sizeof(uint16_t))
{
uint16_t *ptr = (uint16_t*)stack;
llerr("%04x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
llinfo("%04x: %04x %04x %04x %04x %04x %04x %04x %04x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}

2
arch/z80/src/common/up_unblocktask.c
View File

@ -81,7 +81,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) &&
(tcb->task_state <= LAST_BLOCKED_STATE));
/* err("Unblocking TCB=%p\n", tcb); */
/* info("Unblocking TCB=%p\n", tcb); */
/* Remove the task from the blocked task list */

70
arch/z80/src/ez80/ez80_emac.c
View File

@ -578,7 +578,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
phyval = ez80emac_miiread(priv, MII_PHYID1);
if (phyval != MII_PHYID1_AM79C874)
{
nerr("Not an Am79c874 PHY: PHY1=%04x vs %04x\n", phyval, MII_PHYID1_AM79C874);
nerr("ERROR: Not an Am79c874 PHY: PHY1=%04x vs %04x\n", phyval, MII_PHYID1_AM79C874);
ret = -ENODEV;
goto dumpregs;
}
@ -586,7 +586,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
phyval = ez80emac_miiread(priv, MII_PHYID2);
if (phyval != MII_PHYID2_AM79C874)
{
nerr("Not an Am79c874 PHY: PHY2=%04x vs %04x\n", phyval, MII_PHYID2_AM79C874);
nerr("ERROR: Not an Am79c874 PHY: PHY2=%04x vs %04x\n", phyval, MII_PHYID2_AM79C874);
ret = -ENODEV;
goto dumpregs;
}
@ -618,7 +618,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
#if CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_AUTONEG
nerr("Configure autonegotiation\n");
ninfo("Configure autonegotiation\n");
if (bauto)
{
ez80emac_miiwrite(priv, MII_ADVERTISE,
@ -628,12 +628,12 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
}
else
{
nerr("Am79c784 is not capable of autonegotiation\n");
nerr("ERROR: Am79c784 is not capable of autonegotiation\n");
}
#elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_100BFD
nerr("100BASETX full duplex\n");
ninfo("100BASETX full duplex\n");
phyval |= MII_MCR_SPEED100 | MII_MCR_FULLDPLX;
ez80emac_miiwrite(priv, MII_ADVERTISE,
MII_ADVERTISE_100BASETXFULL|MII_ADVERTISE_100BASETXHALF|
@ -642,7 +642,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
#elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_100BHD
nerr("100BASETX half duplex\n");
ninfo("100BASETX half duplex\n");
phyval |= MII_MCR_SPEED100;
ez80emac_miiwrite(priv, MII_ADVERTISE,
MII_ADVERTISE_100BASETXHALF|MII_ADVERTISE_10BASETXFULL|
@ -650,14 +650,14 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
#elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_10BFD
nerr("10BASETX full duplex\n");
ninfo("10BASETX full duplex\n");
phyval |= MII_MCR_FULLDPLX;
ez80emac_miiwrite(priv, MII_ADVERTISE,
MII_ADVERTISE_10BASETXFULL|MII_ADVERTISE_10BASETXHALF|MII_ADVERTISE_CSMA);
#elif CONFIG_EZ80_PHYCONFIG == EZ80_EMAC_10BHD
nerr("10BASETX half duplex\n");
ninfo("10BASETX half duplex\n");
ez80emac_miiwrite(priv, MII_ADVERTISE,
MII_ADVERTISE_10BASETXHALF|MII_ADVERTISE_CSMA);
@ -681,7 +681,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
if ((phyval & MII_MSR_LINKSTATUS) == 0)
{
nerr("Failed to establish link\n");
nerr("ERROR: Failed to establish link\n");
ret = -ETIMEDOUT;
}
else
@ -731,21 +731,21 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_ANRESTART, false))
{
nerr("Autonegotiation didn't start.\n");
nerr("ERROR: Autonegotiation didn't start.\n");
}
/* Wait for auto-negotiation to complete */
if (!ez80emac_miipoll(priv, MII_MSR, MII_MSR_ANEGCOMPLETE, true))
{
nerr("Autonegotiation didn't complete.\n");
nerr("ERROR: Autonegotiation didn't complete.\n");
}
/* Wait link */
if (!ez80emac_miipoll(priv, MII_MSR, MII_MSR_LINKSTATUS, true))
{
nerr("Link is down!\n");
nwarn("WARNING: Link is down!\n");
priv->blinkok = false;
}
else
@ -763,7 +763,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
if ((advertise & MII_ADVERTISE_100BASETXFULL) && (lpa & MII_LPA_100BASETXFULL))
{
nerr("100BASETX full duplex\n");
ninfo("100BASETX full duplex\n");
regval = inp(EZ80_EMAC_CFG1);
regval |= EMAC_CFG1_FULLHD; /* Enable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@ -775,7 +775,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
else if ((advertise & MII_ADVERTISE_100BASETXHALF) && (lpa & MII_LPA_100BASETXHALF))
{
nerr("100BASETX half duplex\n");
ninfo("100BASETX half duplex\n");
regval = inp(EZ80_EMAC_CFG1);
regval &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@ -787,7 +787,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
else if ((advertise & MII_ADVERTISE_10BASETXFULL) && (lpa & MII_LPA_10BASETXFULL))
{
nerr("10BASETX full duplex\n");
ninfo("10BASETX full duplex\n");
regval = inp(EZ80_EMAC_CFG1);
regval |= EMAC_CFG1_FULLHD; /* Enable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@ -799,7 +799,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
else if ((advertise & MII_ADVERTISE_10BASETXHALF) && (lpa & MII_LPA_10BASETXHALF))
{
nerr("10BASETX half duplex\n");
ninfo("10BASETX half duplex\n");
regval = inp(EZ80_EMAC_CFG1);
regval &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@ -808,7 +808,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
}
else
{
nerr("No valid connection; force 10Mbps half-duplex.\n");
nwarn("WARNING: No valid connection; force 10Mbps half-duplex.\n");
regval = inp(EZ80_EMAC_CFG1);
regval &= ~EMAC_CFG1_FULLHD; /* Disable full duplex mode */
outp(EZ80_EMAC_CFG1, regval);
@ -1400,7 +1400,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
else
#endif
{
nerr("Unsupported packet type dropped (%02x)\n", ETHBUF->type);
ninfo("Unsupported packet type dropped (%02x)\n", ETHBUF->type);
EMAC_STAT(priv, rx_dropped);
}
@ -1458,9 +1458,9 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
{
if ((txhead->stat & EMAC_TXDESC_ABORT) != 0)
{
nerr("Descriptor %p aborted {%06x, %u, %04x} trp=%02x%02x\n",
txhead, txhead->np, txhead->pktsize, txhead->stat,
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
nwarn("WARNING: Descriptor %p aborted {%06x, %u, %04x} trp=%02x%02x\n",
txhead, txhead->np, txhead->pktsize, txhead->stat,
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L));
EMAC_STAT(priv, tx_errors);
EMAC_STAT(priv, tx_abterrors);
@ -1604,7 +1604,7 @@ static int ez80emac_sysinterrupt(int irq, FAR void *context)
if ((istat & EMAC_ISTAT_TXFSMERR) != 0)
{
nerr("Tx FSMERR txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
nwarn("WARNING: Tx FSMERR txhead=%p {%06x, %u, %04x} trp=%02x%02x istat=%02x\n",
priv->txhead, priv->txhead->np, priv->txhead->pktsize, priv->txhead->stat,
inp(EZ80_EMAC_TRP_H), inp(EZ80_EMAC_TRP_L), istat);
@ -1620,7 +1620,7 @@ static int ez80emac_sysinterrupt(int irq, FAR void *context)
if ((istat & EMAC_ISTAT_RXOVR) != 0)
{
nerr("Rx OVR rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x istat=%02x\n",
nwarn("WARNING: Rx OVR rxnext=%p {%06x, %u, %04x} rrp=%02x%02x rwp=%02x%02x blkslft=%02x istat=%02x\n",
priv->rxnext, priv->rxnext->np, priv->rxnext->pktsize, priv->rxnext->stat,
inp(EZ80_EMAC_RRP_H), inp(EZ80_EMAC_RRP_L),
inp(EZ80_EMAC_RWP_H), inp(EZ80_EMAC_RWP_L),
@ -1728,13 +1728,13 @@ static int ez80emac_ifup(FAR struct net_driver_s *dev)
uint8_t regval;
int ret;
nerr("Bringing up: MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
nerr(" IP %d.%d.%d.%d\n",
dev->d_ipaddr >> 24, (dev->d_ipaddr >> 16) & 0xff,
(dev->d_ipaddr >> 8) & 0xff, dev->d_ipaddr & 0xff);
ninfo("Bringing up: MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
dev->d_mac.ether_addr_octet[0], dev->d_mac.ether_addr_octet[1],
dev->d_mac.ether_addr_octet[2], dev->d_mac.ether_addr_octet[3],
dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
ninfo(" IP %d.%d.%d.%d\n",
dev->d_ipaddr >> 24, (dev->d_ipaddr >> 16) & 0xff,
(dev->d_ipaddr >> 8) & 0xff, dev->d_ipaddr & 0xff);
/* Bring up the interface -- Must be down right now */
@ -2094,7 +2094,7 @@ static int ez80_emacinitialize(void)
ez80emac_miiwrite(priv, MII_MCR, MII_MCR_RESET);
if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_RESET, false))
{
nerr("PHY reset error.\n");
nerr("ERROR: PHY reset error.\n");
}
/* Initialize MAC */
@ -2149,7 +2149,7 @@ static int ez80_emacinitialize(void)
ez80emac_miiwrite(priv, MII_MCR, MII_MCR_RESET);
if (!ez80emac_miipoll(priv, MII_MCR, MII_MCR_RESET, false))
{
nerr("PHY reset error.\n");
nerr("ERROR: PHY reset error.\n");
ret = -EIO;
goto errout;
}
@ -2200,7 +2200,7 @@ int up_netinitialize(void)
ret = irq_attach(EZ80_EMACSYS_IRQ, ez80emac_sysinterrupt);
if (ret < 0)
{
nllerr("Unable to attach IRQ %d\n", EZ80_EMACSYS_IRQ);
nllerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACSYS_IRQ);
ret = -EAGAIN;
goto errout;
}
@ -2208,7 +2208,7 @@ int up_netinitialize(void)
ret = irq_attach(EZ80_EMACRX_IRQ, ez80emac_rxinterrupt);
if (ret < 0)
{
nllerr("Unable to attach IRQ %d\n", EZ80_EMACRX_IRQ);
nllerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACRX_IRQ);
ret = -EAGAIN;
goto errout;
}
@ -2216,7 +2216,7 @@ int up_netinitialize(void)
ret = irq_attach(EZ80_EMACTX_IRQ, ez80emac_txinterrupt);
if (ret < 0)
{
nllerr("Unable to attach IRQ %d\n", EZ80_EMACTX_IRQ);
nllerr("ERROR: Unable to attach IRQ %d\n", EZ80_EMACTX_IRQ);
ret = -EAGAIN;
goto errout;
}

18
arch/z80/src/ez80/ez80_i2c.c
View File

@ -404,7 +404,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
{
/* This error should never occur */
err("Bad START status: %02x\n", sr);
err("ERROR: Bad START status: %02x\n", sr);
ez80_i2c_clriflg();
return -EIO;
}
@ -426,7 +426,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
sr = ez80_i2c_waitiflg();
if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
{
err("Bad ADDR8 status: %02x\n", sr);
err("ERROR: Bad ADDR8 status: %02x\n", sr);
goto failure;
}
}
@ -445,7 +445,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
sr = ez80_i2c_waitiflg();
if (sr != I2C_SR_MADDRWRACK && sr != I2C_SR_MADDRWR)
{
err("Bad ADDR10H status: %02x\n", sr);
err("ERROR: Bad ADDR10H status: %02x\n", sr);
goto failure;
}
@ -459,7 +459,7 @@ static int ez80_i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
sr = ez80_i2c_waitiflg();
if (sr != I2C_SR_MADDR2WRACK && sr != I2C_SR_MADDR2WR)
{
err("Bad ADDR10L status: %02x\n", sr);
err("ERROR: Bad ADDR10L status: %02x\n", sr);
goto failure;
}
}
@ -479,12 +479,12 @@ failure:
* Call address received, ACK transmitted */
case I2C_SR_ARBLOST4: /* Arbitration lost in address as master, slave
* address and Read bit received, ACK transmitted */
err("Arbitration lost: %02x\n", sr);
err("ERROR: Arbitration lost: %02x\n", sr);
ez80_i2c_clriflg();
return -EAGAIN;
default:
err("Unexpected status: %02x\n", sr);
err("ERROR: Unexpected status: %02x\n", sr);
ez80_i2c_clriflg();
return -EIO;
}
@ -634,7 +634,7 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
* this will cause the whole transfer to start over
*/
err("Arbitration lost: %02x\n", regval);
err("ERROR: Arbitration lost: %02x\n", regval);
ez80_i2c_clriflg();
break;
}
@ -643,7 +643,7 @@ static int ez80_i2c_read_transfer(FAR struct ez80_i2cdev_s *priv,
else
{
err("Unexpected status: %02x\n", regval);
err("ERROR: Unexpected status: %02x\n", regval);
ez80_i2c_clriflg();
return-EIO;
}
@ -731,7 +731,7 @@ static int ez80_i2c_write_transfer(FAR struct ez80_i2cdev_s *priv,
sr = ez80_i2c_waitiflg();
if (sr != I2C_SR_MDATAWRACK && sr != I2C_SR_MDATAWR)
{
err("Bad DATA status: %02x\n", sr);
err("ERROR: Bad DATA status: %02x\n", sr);
ez80_i2c_clriflg();
if (sr == I2C_SR_ARBLOST1)
{

32
arch/z80/src/ez80/ez80_registerdump.c
View File

@ -81,23 +81,23 @@ static void ez80_registerdump(void)
if (g_current_regs)
{
#ifdef CONFIG_EZ80_Z80MODE
llerr("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
llerr("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
llerr("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
llerr("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
llinfo("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
llinfo("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
llinfo("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
llinfo("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
#else
llerr("AF: %06x I: %06x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
llerr("BC: %06x DE: %06x HL: %06x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
llerr("IX: %06x IY: %06x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
llerr("SP: %06x PC: %06x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
llinfo("AF: %06x I: %06x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
llinfo("BC: %06x DE: %06x HL: %06x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
llinfo("IX: %06x IY: %06x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
llinfo("SP: %06x PC: %06x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
#endif
}
}

2
arch/z80/src/ez80/ez80_schedulesigaction.c
View File

@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
serr("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
sinfo("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Make sure that interrupts are disabled */

6
arch/z80/src/ez80/ez80_sigdeliver.c
View File

@ -95,8 +95,8 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
@ -127,7 +127,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

28
arch/z80/src/z180/z180_registerdump.c
View File

@ -60,14 +60,6 @@
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@ -80,16 +72,16 @@ static void z180_registerdump(void)
{
if (g_current_regs)
{
llerr("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
llerr("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
llerr("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
llerr("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
llerr("CBAR: %02x BBR: %02x CBR: %02x\n"
inp(Z180_MMU_CBAR), inp(Z180_MMU_BBR), inp(Z180_MMU_CBR));
llinfo("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
llinfo("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
llinfo("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
llinfo("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
llinfo("CBAR: %02x BBR: %02x CBR: %02x\n"
inp(Z180_MMU_CBAR), inp(Z180_MMU_BBR), inp(Z180_MMU_CBR));
}
}

2
arch/z80/src/z180/z180_schedulesigaction.c
View File

@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
err("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Make sure that interrupts are disabled */

6
arch/z80/src/z180/z180_sigdeliver.c
View File

@ -94,8 +94,8 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

2
arch/z80/src/z8/z8_i2c.c
View File

@ -236,7 +236,7 @@ static uint16_t z8_i2c_getbrg(uint32_t frequency)
if (frequency > 400*1000)
{
err("Invalid inputs\n");
err("ERROR: Invalid inputs\n");
frequency = 400*1000;
}

16
arch/z80/src/z8/z8_registerdump.c
View File

@ -63,30 +63,22 @@
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
static inline void z8_dumpregs(FAR chipret_t *regs)
{
llerr("REGS: %04x %04x %04x %04x %04x %04x %04x %04x\n",
llinfo("REGS: %04x %04x %04x %04x %04x %04x %04x %04x\n",
regs[XCPT_RR0], regs[XCPT_RR2], regs[XCPT_RR4], regs[XCPT_RR6],
regs[XCPT_RR8], regs[XCPT_RR10], regs[XCPT_RR12], regs[XCPT_RR14]);
regs[XCPT_RR8], regs[XCPT_RR10], regs[XCPT_RR12], regs[XCPT_RR14]);
}
static inline void z8_dumpstate(chipreg_t sp, chipreg_t pc, uint8_t irqctl,
chipreg_t rpflags)
{
llerr("SP: %04x PC: %04x IRQCTL: %02x RP: %02x FLAGS: %02x\n",
sp, pc, irqctl & 0xff, rpflags >> 8, rpflags & 0xff);
llinfo("SP: %04x PC: %04x IRQCTL: %02x RP: %02x FLAGS: %02x\n",
sp, pc, irqctl & 0xff, rpflags >> 8, rpflags & 0xff);
}
/****************************************************************************

2
arch/z80/src/z8/z8_schedulesigaction.c
View File

@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
err("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Make sure that interrupts are disabled */

6
arch/z80/src/z8/z8_sigdeliver.c
View File

@ -109,8 +109,8 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
@ -141,7 +141,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;

16
arch/z80/src/z80/z80_registerdump.c
View File

@ -80,14 +80,14 @@ static void z80_registerdump(void)
{
if (g_current_regs)
{
llerr("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
llerr("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
llerr("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
llerr("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
llinfo("AF: %04x I: %04x\n",
g_current_regs[XCPT_AF], g_current_regs[XCPT_I]);
llinfo("BC: %04x DE: %04x HL: %04x\n",
g_current_regs[XCPT_BC], g_current_regs[XCPT_DE], g_current_regs[XCPT_HL]);
llinfo("IX: %04x IY: %04x\n",
g_current_regs[XCPT_IX], g_current_regs[XCPT_IY]);
llinfo("SP: %04x PC: %04x\n"
g_current_regs[XCPT_SP], g_current_regs[XCPT_PC]);
}
}

2
arch/z80/src/z80/z80_schedulesigaction.c
View File

@ -125,7 +125,7 @@ void up_schedule_sigaction(FAR struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
err("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
info("tcb=0x%p sigdeliver=0x%04x\n", tcb, (uint16_t)sigdeliver);
/* Make sure that interrupts are disabled */

6
arch/z80/src/z80/z80_sigdeliver.c
View File

@ -94,8 +94,8 @@ void up_sigdeliver(void)
board_autoled_on(LED_SIGNAL);
serr("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
ASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the real return state on the stack. */
@ -126,7 +126,7 @@ void up_sigdeliver(void)
* errno that is needed by the user logic (it is probably EINTR).
*/
serr("Resuming\n");
sinfo("Resuming\n");
(void)up_irq_save();
rtcb->pterrno = saved_errno;