From 3c7021477dfde30925f6f7a4aa380d7ea21b2a66 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 19 Mar 2014 08:42:42 -0600 Subject: [PATCH] nuttx/include/nuttx/i2c.h typo fixes drom Vijay Kumar --- ChangeLog | 2 ++ include/nuttx/i2c.h | 20 ++++++++++---------- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/ChangeLog b/ChangeLog index e82906f366..f824247a80 100644 --- a/ChangeLog +++ b/ChangeLog @@ -7011,4 +7011,6 @@ (2014-3-18). * arch/arm/Kconfig: Improved documentation of the use of the BASEPRI register from Vijay Kumar (2014-3-19). + * include/nuttx/i2c.h: More typo fixes from Vijay Kumar (2014-3-19). + diff --git a/include/nuttx/i2c.h b/include/nuttx/i2c.h index 23356ecd30..1b246d5838 100644 --- a/include/nuttx/i2c.h +++ b/include/nuttx/i2c.h @@ -48,7 +48,7 @@ * Pre-processor Definitions ****************************************************************************/ /* If a dynamic timeout is selected, then a non-negative, non-zero micro- - * seconds per byte vale must be provided as well. + * seconds per byte value must be provided as well. */ #ifdef CONFIG_STM32_I2C_DYNTIMEO @@ -64,7 +64,7 @@ #define I2C_READBIT 0x01 -/* Conver 7- to 8-bit address */ +/* Convert 7- to 8-bit address */ #define I2C_ADDR8(a) ((a) << 1) #define I2C_WRITEADDR8(a) I2C_ADDR8(a) @@ -81,7 +81,7 @@ #define I2C_READADDR10H(a) (I2C_ADDR10H(a) | I2C_READBIT) #define I2C_READADDR10L(a) I2C_ADDR10L(a) -/* Bit definitions for the flags field in struct i2c_ops_s */ +/* Bit definitions for the flags field in struct i2c_msg_s */ #define I2C_M_READ 0x0001 /* read data, from slave to master */ #define I2C_M_TEN 0x0002 /* ten bit address */ @@ -134,7 +134,7 @@ * disables Master mode on given instance (note that I2C is a bus, where * multiple masters and slave may be handled by one device driver). * - * One may register callback to be notifyed about reception. During the + * One may register a callback to be notified about reception. During the * slave mode reception, the function READ and WRITE must be used to * to handle reads and writes from a master. * @@ -146,7 +146,7 @@ * * Returned Value: * OK on valid address and if the same address has not been assigned - * to other existance sharing the same port. Otherwise ERROR is returned. + * to another instance sharing the same port. Otherwise ERROR is returned. * ****************************************************************************/ @@ -265,7 +265,7 @@ struct i2c_ops_s }; /* I2C transaction segment beginning with a START. A number of these can - * be transfered together to form an arbitrary sequence of write/read transfer + * be transferred together to form an arbitrary sequence of write/read transfer * to an I2C slave device. */ @@ -309,10 +309,10 @@ extern "C" { * different frequency and slave address. * * Input Parameter: - * Port number (for hardware that has mutiple I2C interfaces) + * Port number (for hardware that has multiple I2C interfaces) * * Returned Value: - * Valid I2C device structre reference on succcess; a NULL on failure + * Valid I2C device structure reference on succcess; a NULL on failure * ****************************************************************************/ @@ -325,10 +325,10 @@ EXTERN FAR struct i2c_dev_s *up_i2cinitialize(int port); * De-initialize the selected I2C port, and power down the device. * * Input Parameter: - * Device structure as returned by the up_i2cinitalize() + * Device structure as returned by the up_i2cinitialize() * * Returned Value: - * OK on success, ERROR when internal reference count missmatch or dev + * OK on success, ERROR when internal reference count mismatch or dev * points to invalid hardware device. * ****************************************************************************/