Fix XTAL frequencies for AVR; add ISP mkII connection info

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3698 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-06-12 18:45:39 +00:00
parent 145ad2cb5e
commit 3d65c469cd
3 changed files with 335 additions and 187 deletions

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@ -50,7 +50,7 @@
/* Clocking *****************************************************************/
#define BOARD_CPU_CLOCK 8000000 /* 8MHz */
#define BOARD_CPU_CLOCK 14745600 /* F_CPU = 14.7456MHz */
/* LED definitions **********************************************************/

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@ -12,6 +12,9 @@ Contents
^^^^^^^^
o Micropendous3 Features
o Pin Usage
o Serial Console
o Atmel mkII Connection
o Toolchains
o Windows Native Toolchains
o NuttX buildroot Toolchain
@ -31,7 +34,7 @@ Micropendous3 Features
stock Atmel or LUFA)
o 4 kbytes SRAM and 2 kbytes of EEPROM (AT90USB64) or 8 kbytes SRAM and 4
kbytes of EEPROM (AT90USB128)
o external SRAM is possible
o External SRAM is possible. Layout for CY7C1019D 1-Mbit SRAM (unpopulated)
o USB powered
o 16MHz crystal
o 48 General Purpose IO Pins (47 with external SRAM)
@ -45,6 +48,145 @@ Micropendous3 Features
o Size LxWxH (including headers): 3.15" x 0.8" x 0.6" =~ 8cm x 2cm x 1.5cm
o Completely OpenHardware Design
Pin Usage
^^^^^^^^^
AT90USB90128/64 TQFP64
-- ------------------------ ---------------------------------------------
PIN SIGNAL BOARD CONNECTION
-- ------------------------ ---------------------------------------------
(left)
1 (INT.6/AIN.0) PE6 J3-25 E6, CY7C1019D ^CE (Unpopulated)
2 (INT.7/AIN.1/UVcon) PE7 J3-26 E7, CY7C1019D A16 (Unpopulated)
3 UVcc
4 D- USB DP
5 D+ USB DM
6 UGnd GND
7 UCap GND (via cap)
8 VBus USB VBUS
9 (IUID) PE3 J3-22 E3
10 (SS/PCINT0) PB0 J3-28 B0
11 (PCINT1/SCLK) PB1 J3-29 B1
12 (PDI/PCINT2/MOSI) PB2 J3-30 B2
13 (PDO/PCINT3/MISO) PB3 J3-31 B3
14 (PCINT4/OC.2A) PB4 J3-32 B4
15 (PCINT5/OC.1A) PB5 J3-33 B5
16 (PCINT6/OC.1B) PB6 J3-34 B6
(bottom)
17 (PCINT7/OC.0A/OC.1C) PB7 J3-35 B7
18 (INT4/TOSC1) PE4 J3-23 E4
19 (INT.5/TOSC2) PE5 J3-24 E5
20 RESET SW1
21 VCC VCC
22 GND GND
23 XTAL2 X1
24 XTAL1 X1
25 (OC0B/SCL/INT0) PD0 J3-36 D0
26 (OC2B/SDA/INT1) PD1 J3-37 D1
27 (RXD1/INT2) PD2 J3-38 D2
28 (TXD1/INT3) PD3 J3-39 D3
29 (ICP1) PD4 J3-40 D4
30 (XCK1) PD5 J3-41 D5
31 (T1) PD6 J3-42 D6
32 (T0) PD7 J3-43 D7
(right)
48 PA3 (AD3) J3-14 A3, 74AHC573 D3, CY7C1019D |O3 (Unpopulated)
47 PA4 (AD4) J3-15 A4, 74AHC573 D4, CY7C1019D |O4 (Unpopulated)
46 PA5 (AD5) J3-16 A5, 74AHC573 D5, CY7C1019D |O5 (Unpopulated)
45 PA6 (AD6) J3-17 A6, 74AHC573 D6, CY7C1019D |O6 (Unpopulated)
44 PA7 (AD7) J3-18 A7, 74AHC573 D7, CY7C1019D |O7 (Unpopulated)
43 PE2 (ALE/HWB) SW-2 (pulled-up), J3-21 E2, 74AHC573 Cp
42 PC7 (A15/IC.3/CLKO) J3-51 C7, CY7C1019D A15 (Unpopulated)
41 PC6 (A14/OC.3A) J3-50 C6, CY7C1019D A14 (Unpopulated)
40 PC5 (A13/OC.3B) J3-49 C5, CY7C1019D A13 (Unpopulated)
39 PC4 (A12/OC.3C) J3-48 C4, CY7C1019D A12 (Unpopulated)
38 PC3 (A11/T.3) J3-47 C3, CY7C1019D A11 (Unpopulated)
37 PC2 (A10) J3-46 C2, CY7C1019D A10 (Unpopulated)
36 PC1 (A9) J3-45 C1, CY7C1019D A9 (Unpopulated)
35 PC0 (A8) J3-44 C0, CY7C1019D A8 (Unpopulated)
34 PE1 (RD) J3-20 E1, CY7C1019D ^OE (Unpopulated)
33 PE0 (WR) J3-19 E0, CY7C1019D ^WE (Unpopulated)
(top)
64 AVCC (Power circuitry)
63 GND GND
62 AREF J3-2 AREF, (Power circuitry)
61 PF0 (ADC0) J3-3 F0
60 PF1 (ADC1) J3-4 F1
59 PF2 (ADC2) J3-5 F2
58 PF3 (ADC3) J3-6 F3
57 PF4 (ADC4/TCK) J3-7 F4, JTAG TCK
56 PF5 (ADC5/TMS) J3-8 F5, JTAG TMS
55 PF6 (ADC6/TDO) J3-9 F6, JTAG TD0
54 PF7 (ADC7/TDI) J3-20 F7, JTAG TDI
53 GND GND
52 VCC VCC
51 PA0 (AD0) J3-11 A0, 74AHC573 D0, CY7C1019D |O0 (Unpopulated)
50 PA1 (AD1) J3-12 A1, 74AHC573 D1, CY7C1019D |O1 (Unpopulated)
49 PA2 (AD2) J3-13 A2, 74AHC573 D2, CY7C1019D |O2 (Unpopulated)
Atmel mkII Connection
^^^^^^^^^^^^^^^^^^^^^
ISP6PIN Header
--------------
1 2
MISO o o VCC
SCK o o MOSI
RESET o o GND
Micropendous 3 JTAG (JTAG10PIN Connector)
------------------- ---------------------
1 2 1 2
TCK o o GND TCK o o GND
TDO o o VCC TDO o o VTref
TMS o o RESET TMS o o nSRST
VCC o o N/C o o (nTRST)
TDI o o GND TDI o o GND
JTAGICE mkII Connection to 10-pin Header
------------------------------------------
10PIN Header 6PIN Header
-------------------- ---------------------
Pin 1 TCK Pin 3 SCK
Pin 2 GND Pin 6 GND
Pin 3 TDO Pin 1 MISO
Pin 4 VTref Pin 2 Vcc
Pin 6 nSRT Pin 5 Reset
Pin 9 TDI Pin 4 MOSI
Connect your Micropendous board programmed with AVRISP firmware to another AVR using SPI (you can even connect to another USB AVR board to program its' bootloader):
Micropendous Target AVR
PB4 RESET
PB1(SCK) SCK
PB2(MOSI) MOSI/PDI
PB3(MISO) MISO/PDO
GND GND+AGND
Vcc Vcc+AVcc
Serial Console
^^^^^^^^^^^^^^
A serial console is supported on an external MAX232/MAX3232 Connected
on PD2 and PD3:
Port D, Bit 2: RXD1, Receive Data (Data input pin for the USART1). When
the USART1 receiver is enabled this pin is configured as an input
regardless of the value of DDD2. When the USART forces this pin to
be an input, the pull-up can still be controlled by the PORTD2 bit.
Port D, Bit 3: TXD1, Transmit Data (Data output pin for the USART1).
When the USART1 Transmitter is enabled, this pin is configured as
an output regardless of the value of DDD3.
AT90USB90128/64 TQFP64
-- ------------------------ ---------------------------------------------
PIN SIGNAL BOARD CONNECTION
-- ------------------------ ---------------------------------------------
27 (RXD1/INT2) PD2 J3-38 D2
28 (TXD1/INT3) PD3 J3-39 D3
Toolchains
^^^^^^^^^^

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@ -50,9 +50,10 @@
/* Clocking *****************************************************************/
#define BOARD_CPU_CLOCK 8000000 /* 8MHz */
#define BOARD_CPU_CLOCK 16000000 /* F_CPU = 16MHz */
/* LED definitions **********************************************************/
/* The Micropendous 3 has no on-board LEDs */
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
@ -63,6 +64,11 @@
#define LED_ASSERTION 6
#define LED_PANIC 7
/* Button definitions *******************************************************/
/* SW1 = Connects to AT90USBxx RESET pin and is not available to software.
* SW2 = Connects (via a pull-up) to PE-2
*/
/****************************************************************************
* Public Types
****************************************************************************/