Cosmetic update to comments and README files
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@ -108,15 +108,15 @@ endchoice # Atmel AT91SAMA5 Chip Selection
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menu "SAMA5 Peripheral Support"
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config SAMA5_DBGU
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bool "Debug Unit Interrupt (DBGU)"
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bool "Debug Unit (DBGU)"
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default n
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config SAMA5_PIT
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bool "Periodic Interval Timer Interrupt (PIT)"
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bool "Periodic Interval Timer (PIT)"
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default n
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config SAMA5_WDT
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bool "Watchdog timer Interrupt (WDT)"
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bool "Watchdog timer (WDT)"
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default n
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select WATCHDOG
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@ -1,9 +1,9 @@
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/************************************************************************************************
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* arch/arm/src/sam34/chip/sam3u_uart.h
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* arch/arm/src/sama5/chip/sam3u_uart.h
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* Universal Asynchronous Receiver Transmitter (UART) and Universal Synchronous Asynchronous
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* Receiver Transmitter (USART) definitions for the SAM3U, SAM3X, SAM3A and SAM4S
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* Receiver Transmitter (USART) definitions for the SAMA5D3
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*
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* Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved.
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -35,8 +35,8 @@
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*
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************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAM34_CHIP_SAM3U_UART_H
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#define __ARCH_ARM_SRC_SAM34_CHIP_SAM3U_UART_H
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#ifndef __ARCH_ARM_SRC_SAMA5_CHIP_SAM_UART_H
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#define __ARCH_ARM_SRC_SAMA5_CHIP_SAM_UART_H
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/************************************************************************************************
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* Included Files
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@ -200,7 +200,7 @@
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#define UART_CR_RSTSTA (1 << 8) /* Bit 8: Reset Status Bits (Common) */
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#define UART_CR_STTBRK (1 << 9) /* Bit 9: Start Break (USART UART mode only) */
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#define UART_CR_STPBRK (1 << 10) /* Bit 10: Stop Break (USART UART mode only) */
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#define UART_CR_STTTO (1 << 11) /* Bit 11: Start Time-out (USART oUART mode nly) */
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#define UART_CR_STTTO (1 << 11) /* Bit 11: Start Time-out (USART UART mode only) */
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#define UART_CR_SENDA (1 << 12) /* Bit 12: Send Address (USART UART mode only) */
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#define UART_CR_RSTIT (1 << 13) /* Bit 13: Reset Iterations (USART UART mode only) */
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#define UART_CR_RSTNACK (1 << 14) /* Bit 14: Reset Non Acknowledge (USART UART mode only) */
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@ -407,4 +407,4 @@
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* Public Functions
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************************************************************************************************/
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#endif /* __ARCH_ARM_SRC_SAM34_CHIP_SAM3U_UART_H */
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#endif /* __ARCH_ARM_SRC_SAMA5_CHIP_SAM_UART_H */
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@ -662,9 +662,7 @@ Serial Console
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By default USART1 is used as the NuttX serial console in all
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configurations (unless otherwise noted). USART1 is provided at TTL
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levels at pins TXD0 and TXD1 or J20.
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USART1 Connector J8
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levels at pins TXD0 and TXD1 of J20.
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DBGU Interface
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--------------
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@ -2528,7 +2526,7 @@ Configurations
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reconfiguration process.
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2. Unless stated otherwise, all configurations generate console
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output on UART0 (J3).
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output on USART1 (J20).
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3. All of these configurations use the Code Sourcery for Windows toolchain
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(unless stated otherwise in the description of the configuration). That
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@ -2609,61 +2607,56 @@ Configurations
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the warning in the section "Information Common to All Configurations"
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for further information.
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3. This configuration executes out of NAND flash and can only
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be loaded via BareBox.
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3. This configuration executes out of SDRAM flash and is loaded into
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SDRAM from NAND, Serial DataFlash, or from a TFTPC sever via
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U-Boot or BareBox. Data also is positioned in SDRAM.
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4. This configuration has support for NSH built-in applications enabled.
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However, no built-in applications are selected in the base configuration.
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5. Data resides in ISRAM, but can be moved to SDRAM as described above
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under "SDRAM Data Configuration."
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6. This configuration has support for the FAT file system built in. However,
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5. This configuration has support for the FAT file system built in. However,
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by default, there are no block drivers initialized. The FAT file system can
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still be used to create RAM disks.
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7. SDRAM support can be enabled by modifying your NuttX configuration as
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described above in the paragraph entitle "SDRAM Support"
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8. The SAMA5D3 Xplained board includes an option serial DataFlash. Support
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6. The SAMA5D3 Xplained board includes an option serial DataFlash. Support
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for that serial FLASH can be enabled by modifying the NuttX configuration
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as described above in the paragraph entitled "AT25 Serial FLASH".
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9. Enabling HSMCI support. The SAMA5D3-Xplained provides a two SD memory
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7. Enabling HSMCI support. The SAMA5D3-Xplained provides a two SD memory
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card slots: (1) a full size SD card slot (J10), and (2) a microSD
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memory card slot (J11). The full size SD card slot connects via HSMCI0;
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the microSD connects vi HSMCI1. Support for both SD slots can be enabled
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with the settings provided in the paragraph entitled "HSMCI Card Slots"
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above.
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10. Support the USB low-, high- and full-speed OHCI host driver can be enabled
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by changing the NuttX configuration file as described in the section
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entitled "USB High-Speed Host" above.
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8. Support the USB low-, high- and full-speed OHCI host driver can be enabled
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by changing the NuttX configuration file as described in the section
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entitled "USB High-Speed Host" above.
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11. Support the USB high-speed USB device driver (UDPHS) can be enabled
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by changing the NuttX configuration file as described above in the
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section entitled "USB High-Speed Device."
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9. Support the USB high-speed USB device driver (UDPHS) can be enabled
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by changing the NuttX configuration file as described above in the
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section entitled "USB High-Speed Device."
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12. I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be
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10. I2C Tool. NuttX supports an I2C tool at apps/system/i2c that can be
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used to peek and poke I2C devices. See the discussion above under
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"I2C Tool" for detailed configuration settings.
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13. Networking support via the can be added to NSH by modifying the
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11. Networking support via the can be added to NSH by modifying the
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configuration. See the "Networking" section above for detailed
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configuration settings.
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16. The Real Time Clock/Calendar RTC) may be enabled by reconfiguring NuttX.
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12. The Real Time Clock/Calendar (RTC) may be enabled by reconfiguring NuttX.
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See the section entitled "RTC" above for detailed configuration settings.
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17. This example can be configured to exercise the watchdog timer test
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13. This example can be configured to exercise the watchdog timer test
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(apps/examples/watchdog). See the detailed configuration settings in
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the section entitled "Watchdog Timer" above.
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18. This example can be configured to enable the SAMA5 TRNG peripheral so
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14. This example can be configured to enable the SAMA5 TRNG peripheral so
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that it provides /dev/random. See the section entitled "TRNG and
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/dev/random" above for detailed configuration information.
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19. See also the sections above for additional configuration options:
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16. See also the sections above for additional configuration options:
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"CAN Usage", "SAMA5 ADC Support", "SAMA5 PWM Support", "I2S Audio
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Support"
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@ -2691,29 +2684,5 @@ To-Do List
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3) HSCMI TX DMA support is currently commented out.
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4) I believe that there is an issue when the internal AT25 FLASH is
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formatted by NuttX. That format works fine with Linux, but does not
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appear to work with Windows. Reformatting on Windows can resolve this.
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NOTE: This is not a SAMA5Dx issue.
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UPDATE: Two important bugs were recently fixed in the NuttX FAT
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formatting function (mkfatfs). It is likely that these fixes will
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eliminate this issue, but that has not yet been verified.
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5) CAN testing has not yet been performed due to issues with cabling. I
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just do not have a good test bed (or sufficient CAN knowledge) for
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good CAN testing.
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6) The NxWM example does not work well. This example was designed to work
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with much smaller displays and does not look good or work well with the
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SAMA5D3-Xplained's 800x480 display. See above for details.
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7) I have a Camera, but there is still no ISI driver. I am not sure what to
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do with the camera. NuttX needs something like V4L to provide the
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definition for what a camera driver is supposed to do.
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I will probably develop a test harness for ISI, but it is of only
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minimal value with no OS infrastructure to deal with images and video.
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8) GMAC has only been tested on a 10/100Base-T network. I don't have a
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7) GMAC has only been tested on a 10/100Base-T network. I don't have a
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1000Base-T network to support additional testing.
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@ -2857,7 +2857,7 @@ Configurations
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reconfiguration process.
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2. Unless stated otherwise, all configurations generate console
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output on UART0 (J3).
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output on USART1 (J8).
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3. All of these configurations use the Code Sourcery for Windows toolchain
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(unless stated otherwise in the description of the configuration). That
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@ -2979,7 +2979,7 @@ Configurations
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Relevant configuration settings are provided in the paragraph entitled
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"SDRAM Support" above.
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6. The Real Time Clock/Calendar RTC) is enabled. See the section entitled
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6. The Real Time Clock/Calendar (RTC) is enabled. See the section entitled
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"RTC" above.
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7. The Embest or Ronetix CPU module includes an Atmel AT25DF321A,
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@ -3170,7 +3170,7 @@ Configurations
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configuration instrcutions in the section entitled "Touchscreen
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Testing" above.
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16. The Real Time Clock/Calendar RTC) may be enabled by reconfiguring NuttX.
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16. The Real Time Clock/Calendar (RTC) may be enabled by reconfiguring NuttX.
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See the section entitled "RTC" above for detailed configuration settings.
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17. This example can be configured to exercise the watchdog timer test
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