Merged nuttx/nuttx into master

Documentation/NuttxPortingGuide.html

@@ -3915,7 +3915,7 @@ void sched_process_timer(void);
   The timer interrupt logic itself is implemented in the
   architecture specific code, but must call the following OS
   function periodically -- the calling interval must be
-  <code>MSEC_PER_TICK</code>.
+  <code>CONFIG_USEC_PER_TICK</code>.
 </p>
 
 <h3><a name="schedtimerexpiration">4.8.4 <code>sched_timer_expiration()</code></a></h3>

arch/arm/src/stm32/chip/stm32f20xxx_pinmap.h

@@ -230,7 +230,6 @@
 #define GPIO_ETH_RMII_TXD0_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
-#define GPIO_ETH_RMII_TX_CLK  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
 #define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
 #define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
 

arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h

@@ -254,7 +254,6 @@
 #  define GPIO_ETH_RMII_TXD0_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
 #  define GPIO_ETH_RMII_TXD1_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
 #  define GPIO_ETH_RMII_TXD1_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
-#  define GPIO_ETH_RMII_TX_CLK  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
 #  define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
 #  define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
 #endif

arch/arm/src/stm32/stm32_eth.c

@@ -3683,7 +3683,6 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
   stm32_configgpio(GPIO_ETH_RMII_RXD1);
   stm32_configgpio(GPIO_ETH_RMII_TXD0);
   stm32_configgpio(GPIO_ETH_RMII_TXD1);
-  /* stm32_configgpio(GPIO_ETH_RMII_TX_CLK); not needed? */
   stm32_configgpio(GPIO_ETH_RMII_TX_EN);
 
 #endif

arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h

@@ -242,7 +242,6 @@
 #define GPIO_ETH_RMII_TXD0_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
-#define GPIO_ETH_RMII_TX_CLK  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
 #define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
 #define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
 

arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h

@@ -308,7 +308,6 @@
 #define GPIO_ETH_RMII_TXD0_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_1  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
 #define GPIO_ETH_RMII_TXD1_2  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14)
-#define GPIO_ETH_RMII_TX_CLK  (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3)
 #define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11)
 #define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11)
 

arch/arm/src/stm32f7/stm32_ethernet.c

@@ -3803,7 +3803,6 @@ static inline void stm32_ethgpioconfig(struct stm32_ethmac_s *priv)
   stm32_configgpio(GPIO_ETH_RMII_RXD1);
   stm32_configgpio(GPIO_ETH_RMII_TXD0);
   stm32_configgpio(GPIO_ETH_RMII_TXD1);
-  /* stm32_configgpio(GPIO_ETH_RMII_TX_CLK); not needed? */
   stm32_configgpio(GPIO_ETH_RMII_TX_EN);
 
 #endif

arch/arm/src/tiva/tiva_qencoder.c

@@ -60,28 +60,6 @@
 #include "chip/tiva_pinmap.h"
 #include "chip/tm4c_memorymap.h"
 
-/************************************************************************************
- * Pre-processor Definitions
- ************************************************************************************/
-
-#define qeierr(fmt, args...) printf("%s(%d): " fmt, __FUNCTION__, __LINE__, ##args);
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_QE
-#endif
-
-#ifdef CONFIG_DEBUG_QEI
-#  define qeidbg              dbg
-#  ifdef CONFIG_DEBUG_VERBOSE
-#    define qeivdbg           vdbg
-#  else
-#    define qeivdbg(x...)
-#  endif
-#else
-#  define qeidbg(x...)
-#  define qeivdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Types
  ************************************************************************************/
@@ -101,14 +79,18 @@ struct tiva_qe_s
  * Private Function Prototypes
  ************************************************************************************/
 
-static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset, uint32_t regval);
+static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset,
-static inline uint32_t tiva_qe_getreg(struct tiva_qe_s *qe, unsigned int offset);
+                                  uint32_t regval);
+static inline uint32_t tiva_qe_getreg(struct tiva_qe_s *qe,
+                                      unsigned int offset);
 
 static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower);
 static int tiva_qe_shutdown(FAR struct qe_lowerhalf_s *lower);
-static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos);
+static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower,
+                            FAR int32_t * pos);
 static int tiva_qe_reset(FAR struct qe_lowerhalf_s *lower);
-static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg);
+static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
+                         unsigned long arg);
 
 static int tiva_qe_direction(struct tiva_qe_s *qe, unsigned long *dir);
 static int tiva_qe_velocity(struct tiva_qe_s *qe, unsigned long *vel);
@@ -186,7 +168,8 @@ static inline uint32_t tiva_qe_getreg(struct tiva_qe_s *qe, unsigned int offset)
  *
  ************************************************************************************/
 
-static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset, uint32_t regval)
+static inline void tiva_qe_putreg(struct tiva_qe_s *qe, unsigned int offset,
+                                  uint32_t regval)
 {
   uintptr_t regaddr = qe->base + offset;
   putreg32(regval, regaddr);
@@ -213,57 +196,68 @@ static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower)
 {
   uint32_t ctlreg = 0;
   FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
-  qeidbg("setup QEI %d\n", qe->id);
+  int ret;
+
+  sninfo("setup QEI %d\n", qe->id);
 
   /* Enable GPIO port, GPIO pin type and GPIO alternate function */
   /* (refer to TM4C1294NC 24.4.2-4) */
-  int ret;
+
   ret = tiva_configgpio(qe->idx);
   if (ret < 0)
     {
-      qeierr("tiva_configgpio failed (%x)\n", qe->idx);
+      snerr("ERROR: tiva_configgpio failed (%x)\n", qe->idx);
       return -1;
     }
 
   ret = tiva_configgpio(qe->pha);
   if (ret < 0)
     {
-      qeierr("tiva_configgpio failed (%x)\n", qe->pha);
+      snerr("ERROR: tiva_configgpio failed (%x)\n", qe->pha);
       return -1;
     }
 
   ret = tiva_configgpio(qe->phb);
   if (ret < 0)
     {
-      qeierr("tiva_configgpio failed (%x)\n", qe->phb);
+      snerr("ERROR: tiva_configgpio failed (%x)\n", qe->phb);
       return -1;
     }
 
   /* Set reset mode */
   /* (refer to TM4C1294NC 24.4.5.1) */
-  if (qe->pulses == 0) {
+
+  if (qe->pulses == 0)
+    {
       ctlreg = RESMODE_BY_INDEX_PULSE << TIVA_QEI_CTL_RESMODE;
-  } else {
+    }
+  else
+    {
       ctlreg = RESMODE_BY_MAXPOS << TIVA_QEI_CTL_RESMODE;
     }
+
   tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
 
   /* Set capture mode (PHA_AND_PHB) */
   /* (refer to TM4C1294NC 24.4.5.1) */
+
   ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
   ctlreg |= CAPMODE_PHA_AND_PHB << TIVA_QEI_CTL_CAPMODE;
   tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
 
   /* Set maxpos */
   /* (refer to TM4C1294NC 24.4.5.2) */
+
   tiva_qe_putreg(qe, TIVA_QEI_MAXPOS_OFFSET, qe->pulses * 4);
 
   /* Enable velocity capture */
+
   ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
   ctlreg |= VELEN_ENABLE << TIVA_QEI_CTL_VELEN;
   tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
 
   /* Set prediv (1) */
+
   ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
   ctlreg |= VELDIV_1 << TIVA_QEI_CTL_VELDIV;
   tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
@@ -273,6 +267,7 @@ static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower)
 
   /* Enable the QEI */
   /* (refer to TM4C1294NC 24.4.6) */
+
   ctlreg = tiva_qe_getreg(qe, TIVA_QEI_CTL_OFFSET);
   ctlreg |= QEI_ENABLE << TIVA_QEI_CTL_ENABLE;
   tiva_qe_putreg(qe, TIVA_QEI_CTL_OFFSET, ctlreg);
@@ -299,9 +294,11 @@ static int tiva_qe_setup(FAR struct qe_lowerhalf_s *lower)
 static int tiva_qe_shutdown(FAR struct qe_lowerhalf_s *lower)
 {
   FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
-    qeidbg("shutdown QEI %d\n", qe->id);
+
+  sninfo("shutdown QEI %d\n", qe->id);
 
   /* Disable the QEI */
+
   tiva_qe_putreg(qe, TIVA_SYSCON_SRQEI_OFFSET, SYSCON_SRQEI(qe->id));
 
   return OK;
@@ -324,7 +321,8 @@ static int tiva_qe_shutdown(FAR struct qe_lowerhalf_s *lower)
 static int tiva_qe_reset(FAR struct qe_lowerhalf_s *lower)
 {
   FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
-    qeidbg("reset QEI %d\n", qe->id);
+
+  sninfo("reset QEI %d\n", qe->id);
 
   tiva_qe_putreg(qe, TIVA_QEI_POS_OFFSET, 0);
 
@@ -349,7 +347,8 @@ static int tiva_qe_reset(FAR struct qe_lowerhalf_s *lower)
 static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t * pos)
 {
   FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
-    qeidbg("get position of QEI %d\n", qe->id);
+
+  sninfo("get position of QEI %d\n", qe->id);
 
   /* (refer to TM4C1294NC 24.4.8) */
   *pos = (int32_t) tiva_qe_getreg(qe, TIVA_QEI_POS_OFFSET);
@@ -373,21 +372,25 @@ static int tiva_qe_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos)
  *
  ****************************************************************************/
 
-static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg)
+static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd,
+                         unsigned long arg)
 {
   FAR struct tiva_qe_s *qe = (FAR struct tiva_qe_s *)lower;
-  qeidbg("ioctl QEI %d\n", qe->id);
+
+  sninfo("ioctl QEI %d\n", qe->id);
 
   switch (cmd)
     {
     case QEIOC_DIRECTION:
       tiva_qe_direction(qe, (unsigned long *)arg);
       break;
+
     case QEIOC_VELOCITY:
       tiva_qe_velocity(qe, (unsigned long *)arg);
       break;
+
     default:
-        qeierr("invalid cmd %x\n", cmd);
+      snerr("ERROR: invalid cmd %x\n", cmd);
       break;
     }
 
@@ -411,13 +414,14 @@ static int tiva_qe_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned lon
 
 static int tiva_qe_direction(FAR struct tiva_qe_s *qe, unsigned long *dir)
 {
-    qeidbg("get direction of QEI %d\n", qe->id);
+  sninfo("get direction of QEI %d\n", qe->id);
 
   uint32_t statreg;
   statreg = tiva_qe_getreg(qe, TIVA_QEI_STAT_OFFSET);
 
   int32_t dirbit;
-    dirbit = (statreg & (1 << TIVA_QEI_STAT_DIRECTION)) == DIRECTION_FORWARD ? 1 : -1;
+  dirbit =
+    (statreg & (1 << TIVA_QEI_STAT_DIRECTION)) == DIRECTION_FORWARD ? 1 : -1;
 
   *dir = dirbit;
 
@@ -440,7 +444,7 @@ static int tiva_qe_direction(FAR struct tiva_qe_s *qe, unsigned long *dir)
 
 static int tiva_qe_velocity(FAR struct tiva_qe_s *qe, unsigned long *vel)
 {
-    qeidbg("get direction of QEI %d\n", qe->id);
+  sninfo("get direction of QEI %d\n", qe->id);
 
   *vel = (int32_t) tiva_qe_getreg(qe, TIVA_QEI_SPEED_OFFSET);
 
@@ -465,7 +469,6 @@ static int tiva_qe_velocity(FAR struct tiva_qe_s *qe, unsigned long *vel)
 
 FAR struct qe_lowerhalf_s *tiva_qei_initialize(int id)
 {
-  assert(id >= 0);
   FAR struct tiva_qe_s *qe;
   FAR struct qe_lowerhalf_s *lower;
 
@@ -484,15 +487,17 @@ FAR struct qe_lowerhalf_s *tiva_qei_initialize(int id)
 #endif
 
     default:
-      qeierr("ERROR: invalid QEI %d\n", id);
+      snerr("ERROR: invalid QEI %d\n", id);
       return NULL;
     }
 
   /* Enable QEI clock (refer to TM4C1294NC 24.4.1) */
+
   tiva_qei_enablepwr(qe->id);
   tiva_qei_enableclk(qe->id);
 
   /* Make sure that the QEI enable bit has been cleared */
+
   lower = (FAR struct qe_lowerhalf_s *)qe;
   tiva_qe_shutdown(lower);
 

arch/arm/src/tiva/tm4c_ethernet.c

@@ -3757,7 +3757,6 @@ static inline void tiva_phy_initialize(FAR struct tiva_ethmac_s *priv)
   tiva_configgpio(GPIO_EN0_RMII_RXD1);
   tiva_configgpio(GPIO_EN0_RMII_TXD0);
   tiva_configgpio(GPIO_EN0_RMII_TXD1);
-  /* tiva_configgpio(GPIO_EN0_RMII_TX_CLK); not needed? */
   tiva_configgpio(GPIO_EN0_RMII_TX_EN);
 
 #endif

arch/rgmp/src/rgmp.c

@@ -56,7 +56,10 @@
 
 int nest_irq = 0;
 
-// the default time is 10ms
+// The default time is 10ms
+// REVISIT: tick time is given by CONFIG_USEC_PER_TICK.  MSEC_PER_TICK may
+// be zero.
+
 #ifdef MSEC_PER_TICK
 const unsigned int rtos_tick_time = MSEC_PER_TICK;
 #else

configs/stm32f4discovery/xen1210/Make.defs

@@ -0,0 +1,113 @@
+############################################################################
+# configs/stm32f4discovery/xen1210/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+

configs/stm32f4discovery/xen1210/setenv.sh

@@ -0,0 +1,80 @@
+#!/bin/bash
+# configs/stm32f4discovery/xen1210/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows.  You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows.  You will also have to edit this if you install
+# the Atollic toolchain in any other location.  /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH variable
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"

configs/tm4c1294-launchpad/src/tm4c_bringup.c

@@ -171,11 +171,11 @@ static void tm4c_i2ctool(void)
 ****************************************************************************/
 
 #ifdef HAVE_PWM
-void tm4c_pwm_register(int channel)
+static void tm4c_pwm_register(int channel)
 {
   FAR struct pwm_lowerhalf_s *dev;
-  int ret;
   char pwm_path[PWM_PATH_FMTLEN];
+  int ret;
 
   dev = tiva_pwm_initialize(channel);
   if (dev == NULL)
@@ -247,7 +247,7 @@ static void tm4c_pwm(void)
  *
  ****************************************************************************/
 
-void tm4c_qei_register(int id)
+static void tm4c_qei_register(int id)
 {
   FAR struct qe_lowerhalf_s *dev;
   int ret;

drivers/net/slip.c

@@ -1,7 +1,7 @@
 /****************************************************************************
  * drivers/net/slip.c
  *
- *   Copyright (C) 2011-2012, 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Reference: RFC 1055
@@ -434,8 +434,8 @@ static void slip_txtask(int argc, FAR char *argv[])
   FAR struct slip_driver_s *priv;
   unsigned int index = *(argv[1]) - '0';
   net_lock_t flags;
-  systime_t msec_start;
+  systime_t start_ticks;
-  systime_t msec_now;
+  systime_t now_ticks;
   unsigned int hsec;
 
   nerr("index: %d\n", index);
@@ -450,7 +450,7 @@ static void slip_txtask(int argc, FAR char *argv[])
 
   /* Loop forever */
 
-  msec_start = clock_systimer() * MSEC_PER_TICK;
+  start_ticks = clock_systimer();
   for (;  ; )
     {
       /* Wait for the timeout to expire (or until we are signaled by by  */
@@ -484,14 +484,14 @@ static void slip_txtask(int argc, FAR char *argv[])
 
           /* Has a half second elapsed since the last timer poll? */
 
-          msec_now = clock_systimer() * MSEC_PER_TICK;
+          now_ticks = clock_systimer();
-          hsec = (unsigned int)(msec_now - msec_start) / (MSEC_PER_SEC / 2);
+          hsec = (unsigned int)((now_ticks - start_ticks) / TICK_PER_HSEC);
-          if (hsec)
+          if (hsec > 0)
             {
               /* Yes, perform the timer poll */
 
               (void)devif_timer(&priv->dev, slip_txpoll);
-              msec_start += hsec * (MSEC_PER_SEC / 2);
+              start_ticks += hsec * TICK_PER_HSEC;
             }
           else
             {

fs/mount/fs_mount.c

@@ -283,22 +283,20 @@ int mount(FAR const char *source, FAR const char *target,
   mountpt_inode = inode_find(target, NULL);
   if (mountpt_inode != NULL)
     {
-      /* Yes... Is is a directory node (i.e., not a driver or other special
+      /* Successfully found.  The reference count on the inode has been
-       * node.
+       * incremented.
+       *
+       * But is it a directory node (i.e., not a driver or other special
+       * node)?
        */
 
       if (INODE_IS_SPECIAL(mountpt_inode))
         {
-          ferr("ERROR: target %s exists and is a special nodes\n", target);
+          ferr("ERROR: target %s exists and is a special node\n", target);
           errcode = -ENOTDIR;
+          inode_release(mountpt_inode);
           goto errout_with_semaphore;
         }
-
-      /* Successfully found.  The reference count on the inode has been
-       * incremented.
-       */
-
-      DEBUGASSERT(mountpt_inode->u.i_mops != NULL);
     }
   else
 #endif

fs/nfs/nfs.h

@@ -54,7 +54,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define NFS_TICKINTVL      MSEC_PER_TICK  /* Smallest that we can get */
 #define NFS_TICKS          1              /* Number of system ticks */
 #define NFS_HZ             CLOCKS_PER_SEC /* Ticks/sec */
 #define NFS_TIMEO          (1 * NFS_HZ)   /* Default timeout = 1 second */

fs/procfs/fs_procfsproc.c

@@ -389,7 +389,7 @@ static ssize_t proc_status(FAR struct proc_file_s *procfile,
                            FAR struct tcb_s *tcb, FAR char *buffer,
                            size_t buflen, off_t offset)
 {
-#ifdef HAVE_GROUPID
+#ifdef CONFIG_SCHED_HAVE_PARENT
   FAR struct task_group_s *group;
 #endif
   FAR const char *policy;
@@ -439,10 +439,10 @@ static ssize_t proc_status(FAR struct proc_file_s *procfile,
     }
 
 #ifdef CONFIG_SCHED_HAVE_PARENT
-#ifdef HAVE_GROUPID
   group = tcb->group;
   DEBUGASSERT(group);
 
+#ifdef HAVE_GROUPID
   linesize   = snprintf(procfile->line, STATUS_LINELEN, "%-12s%d\n", "Group:",
                         group->tg_pgid);
 #else

include/nuttx/arch.h

@@ -1934,7 +1934,7 @@ void up_cxxinitialize(void);
  *   CONFIG_SCHED_TICKLESS is *not* defined).  The timer interrupt logic
  *   itself is implemented in the architecture specific code, but must call
  *   the following OS function periodically -- the calling interval must
- *   be MSEC_PER_TICK.
+ *   be CONFIG_USEC_PER_TICK.
  *
  ****************************************************************************/
 

libnx/nxglib/nxglib_splitline.c

@@ -1,7 +1,7 @@
 /****************************************************************************
  * graphics/nxglib/nxglib_splitline.c
  *
- *   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -237,6 +237,42 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector,
 
       return 1;
     }
+  else if (linewidth == 1)
+    {
+      b16_t pixels_per_row;
+
+      /* Close to horizontal line of width 1 */
+
+      pixels_per_row  = itob16(line.pt2.x - line.pt1.x) /
+                        (line.pt2.y - line.pt1.y);
+
+      traps[1].top.x1 = itob16(line.pt1.x);
+      traps[1].top.x2 = traps[1].top.x1 + pixels_per_row;
+      traps[1].top.y  = line.pt1.y;
+
+      traps[1].bot.x2 = itob16(line.pt2.x);
+      traps[1].bot.x1 = traps[1].bot.x2 - pixels_per_row;
+      traps[1].bot.y  = line.pt2.y;
+
+      if (pixels_per_row < 0)
+        {
+          b16_t tmp;
+
+          tmp             = traps[1].top.x2;
+          traps[1].top.x2 = traps[1].top.x1;
+          traps[1].top.x1 = tmp;
+
+          tmp             = traps[1].bot.x2;
+          traps[1].bot.x2 = traps[1].bot.x1;
+          traps[1].bot.x1 = tmp;
+        }
+
+      ginfo("Horizontal traps[1]: (%08x,%08x,%d),(%08x,%08x, %d)\n",
+            traps[1].top.x1, traps[1].top.x2, traps[1].top.y,
+            traps[1].bot.x1, traps[1].bot.x2, traps[1].bot.y);
+
+      return 1;
+    }
 
   /* Okay, then what remains is interesting.
    *

sched/irq/irq.h

@@ -58,7 +58,7 @@
  * occurrence of an interrupt.
  */
 
-extern FAR xcpt_t g_irqvector[NR_IRQS+1];
+extern FAR xcpt_t g_irqvector[NR_IRQS];
 
 #ifdef CONFIG_SMP
 /* This is the spinlock that enforces critical sections when interrupts are

sched/irq/irq_initialize.c

@@ -47,7 +47,7 @@
  * Public Data
  ****************************************************************************/
 
-FAR xcpt_t g_irqvector[NR_IRQS+1];
+FAR xcpt_t g_irqvector[NR_IRQS];
 
 /****************************************************************************
  * Public Functions