Merged in paulpatience/nuttx-arch/stm32_adc (pull request #42)

STM32 ADC: Add DMA support for STM32F30xxx
This commit is contained in:
Gregory Nutt 2015-12-22 05:45:10 -06:00
commit 3e4fb7a60d
2 changed files with 15 additions and 17 deletions

View File

@ -182,6 +182,19 @@
# define ADC_MAX_SAMPLES ADC_MAX_CHANNELS_NODMA
#endif
#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define ADC_DMA_CONTROL_WORD (DMA_SCR_MSIZE_16BITS | \
DMA_SCR_PSIZE_16BITS | \
DMA_SCR_MINC | \
DMA_SCR_CIRC | \
DMA_SCR_DIR_P2M)
#else
# define ADC_DMA_CONTROL_WORD (DMA_CCR_MSIZE_16BITS | \
DMA_CCR_PSIZE_16BITS | \
DMA_CCR_MINC | \
DMA_CCR_CIRC)
#endif
/* DMA channels and interface values differ for the F1 and F4 families */
#if defined(CONFIG_STM32_STM32F10XX)
@ -1923,8 +1936,6 @@ static void adc_reset(FAR struct adc_dev_s *dev)
if (priv->hasdma)
{
uint32_t ccr;
/* Stop and free DMA if it was started before */
if (priv->dma != NULL)
@ -1934,17 +1945,12 @@ static void adc_reset(FAR struct adc_dev_s *dev)
}
priv->dma = stm32_dmachannel(priv->dmachan);
ccr = DMA_SCR_MSIZE_16BITS | /* Memory size */
DMA_SCR_PSIZE_16BITS | /* Peripheral size */
DMA_SCR_MINC | /* Memory increment mode */
DMA_SCR_CIRC | /* Circular buffer */
DMA_SCR_DIR_P2M; /* Read from peripheral */
stm32_dmasetup(priv->dma,
priv->base + STM32_ADC_DR_OFFSET,
(uint32_t)priv->dmabuffer,
priv->nchannels,
ccr);
ADC_DMA_CONTROL_WORD);
stm32_dmastart(priv->dma, adc_dmaconvcallback, dev, false);
}

View File

@ -280,15 +280,7 @@
#undef ADC_HAVE_DMA
#if defined(CONFIG_STM32_ADC1_DMA) || defined(CONFIG_STM32_ADC2_DMA) || \
defined(CONFIG_STM32_ADC3_DMA) || defined(CONFIG_STM32_ADC4_DMA)
# if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define ADC_HAVE_DMA 1
# else
# warning "DMA is only supported for the STM32 F2/F3/F4 families"
# undef CONFIG_STM32_ADC1_DMA
# undef CONFIG_STM32_ADC2_DMA
# undef CONFIG_STM32_ADC3_DMA
# undef CONFIG_STM32_ADC4_DMA
# endif
# define ADC_HAVE_DMA 1
#endif
#ifdef CONFIG_STM32_ADC1_DMA