STM32 TIM: There is a TIM17 on some parts too

This commit is contained in:
Gregory Nutt 2016-06-03 14:08:28 -06:00
parent 282edefab3
commit 3ec2386be8

View File

@ -152,6 +152,10 @@
defined(CONFIG_STM32_TIM16_DAC) || defined(CONFIG_STM32_TIM16_QE) defined(CONFIG_STM32_TIM16_DAC) || defined(CONFIG_STM32_TIM16_QE)
# undef CONFIG_STM32_TIM16 # undef CONFIG_STM32_TIM16
#endif #endif
#if defined(CONFIG_STM32_TIM17_PWM) || defined (CONFIG_STM32_TIM17_ADC) || \
defined(CONFIG_STM32_TIM17_DAC) || defined(CONFIG_STM32_TIM17_QE)
# undef CONFIG_STM32_TIM17
#endif
#if defined(CONFIG_STM32_TIM1) #if defined(CONFIG_STM32_TIM1)
# if defined(GPIO_TIM1_CH1OUT) ||defined(GPIO_TIM1_CH2OUT)||\ # if defined(GPIO_TIM1_CH1OUT) ||defined(GPIO_TIM1_CH2OUT)||\
@ -251,6 +255,13 @@
#endif #endif
#endif #endif
#if defined(CONFIG_STM32_TIM17)
# if defined(GPIO_TIM17_CH1OUT) ||defined(GPIO_TIM17_CH2OUT)||\
defined(GPIO_TIM17_CH3OUT) ||defined(GPIO_TIM17_CH4OUT)
# define HAVE_TIM17_GPIOCONFIG 1
#endif
#endif
/* This module then only compiles if there are enabled timers that are not intended for /* This module then only compiles if there are enabled timers that are not intended for
* some other purpose. * some other purpose.
*/ */
@ -262,7 +273,8 @@
defined(CONFIG_STM32_TIM9) || defined(CONFIG_STM32_TIM10) || \ defined(CONFIG_STM32_TIM9) || defined(CONFIG_STM32_TIM10) || \
defined(CONFIG_STM32_TIM11) || defined(CONFIG_STM32_TIM12) || \ defined(CONFIG_STM32_TIM11) || defined(CONFIG_STM32_TIM12) || \
defined(CONFIG_STM32_TIM13) || defined(CONFIG_STM32_TIM14) || \ defined(CONFIG_STM32_TIM13) || defined(CONFIG_STM32_TIM14) || \
defined(CONFIG_STM32_TIM15) || defined(CONFIG_STM32_TIM16) defined(CONFIG_STM32_TIM15) || defined(CONFIG_STM32_TIM16) || \
defined(CONFIG_STM32_TIM17)
/************************************************************************************ /************************************************************************************
* Private Types * Private Types
@ -497,6 +509,12 @@ static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq)
break; break;
#endif #endif
#if defined(CONFIG_STM32_TIM17) && defined(BOARD_TIM17_FREQUENCY)
case STM32_TIM17_BASE:
freqin = BOARD_TIM17_FREQUENCY;
break;
#endif
default: default:
return -EINVAL; return -EINVAL;
} }
@ -627,6 +645,11 @@ static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev,
vectorno = STM32_IRQ_TIM16; vectorno = STM32_IRQ_TIM16;
break; break;
#endif #endif
#ifdef CONFIG_STM32_TIM17
case STM32_TIM17_BASE:
vectorno = STM32_IRQ_TIM17;
break;
#endif
default: default:
return -EINVAL; return -EINVAL;
@ -1224,6 +1247,35 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
return -EINVAL; return -EINVAL;
} }
break; break;
#endif
#ifdef CONFIG_STM32_TIM17
case STM32_TIM17_BASE:
switch (channel)
{
#if defined(GPIO_TIM17_CH1OUT)
case 0:
stm32_tim_gpioconfig(GPIO_TIM17_CH1OUT, mode);
break;
#endif
#if defined(GPIO_TIM17_CH2OUT)
case 1:
stm32_tim_gpioconfig(GPIO_TIM17_CH2OUT, mode);
break;
#endif
#if defined(GPIO_TIM17_CH3OUT)
case 2:
stm32_tim_gpioconfig(GPIO_TIM17_CH3OUT, mode);
break;
#endif
#if defined(GPIO_TIM17_CH4OUT)
case 3:
stm32_tim_gpioconfig(GPIO_TIM17_CH4OUT, mode);
break;
#endif
default:
return -EINVAL;
}
break;
#endif #endif
default: default:
return -EINVAL; return -EINVAL;
@ -1443,6 +1495,15 @@ struct stm32_tim_priv_s stm32_tim16_priv =
}; };
#endif #endif
#ifdef CONFIG_STM32_TIM17
struct stm32_tim_priv_s stm32_tim17_priv =
{
.ops = &stm32_tim_ops,
.mode = STM32_TIM_MODE_UNUSED,
.base = STM32_TIM17_BASE,
};
#endif
/************************************************************************************ /************************************************************************************
* Public Function - Initialization * Public Function - Initialization
************************************************************************************/ ************************************************************************************/
@ -1550,6 +1611,12 @@ FAR struct stm32_tim_dev_s *stm32_tim_init(int timer)
dev = (struct stm32_tim_dev_s *)&stm32_tim16_priv; dev = (struct stm32_tim_dev_s *)&stm32_tim16_priv;
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM16EN); modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM16EN);
break; break;
#endif
#ifdef CONFIG_STM32_TIM17
case 17:
dev = (struct stm32_tim_dev_s *)&stm32_tim17_priv;
modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM17EN);
break;
#endif #endif
default: default:
return NULL; return NULL;
@ -1656,6 +1723,11 @@ int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev)
case STM32_TIM16_BASE: case STM32_TIM16_BASE:
modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM16EN, 0); modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM16EN, 0);
break; break;
#endif
#ifdef CONFIG_STM32_TIM17
case STM32_TIM17_BASE:
modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM17EN, 0);
break;
#endif #endif
default: default:
return -EINVAL; return -EINVAL;
@ -1668,4 +1740,4 @@ int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev)
return OK; return OK;
} }
#endif /* defined(CONFIG_STM32_TIM1 || ... || TIM16) */ #endif /* defined(CONFIG_STM32_TIM1 || ... || TIM17) */