PIC32 Device Configuration Words
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3635 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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@ -47,6 +47,7 @@
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#include "pic32mx-memorymap.h"
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#include "pic32mx-uart.h"
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#include "pic32mx-int.h"
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#include "pic32mx-devcfg.h"
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/************************************************************************************
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* Pre-processor Definitions
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@ -474,7 +475,7 @@
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# error "CONFIG_PIC32MX_IOPORTGPRIO is too large"
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#endif
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/* UARTs *****************************************************************************/
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/* UARTs ****************************************************************************/
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/* Don't enable UARTs not supported by the chip. */
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#if CHIP_NEUARTS < 1
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@ -508,6 +509,188 @@
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# undef HAVE_SERIAL_CONSOLE
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#endif
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/* Device Configuration *************************************************************/
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/* DEVCFG3 */
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#ifndef CONFIG_PIC32MX_USERID
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# define CONFIG_PIC32MX_USERID 0x584e /* "NutX" */
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#endif
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#ifndef CONFIG_PIC32MX_SRSSEL
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# define CONFIG_PIC32MX_SRSSEL 4 /* Middle priority */
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#endif
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#ifdef CONFIG_PIC32MX_USB
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# ifndef CONFIG_PIC32MX_USBIDO
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# define CONFIG_PIC32MX_USBIDO 1 /* USBID pin is controlled by the USB module */
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# endif
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# ifndef CONFIG_PIC32MX_VBUSIO
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# define CONFIG_PIC32MX_VBUSIO 1 /* VBUSON pin is controlled by the USB module */
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# endif
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#else
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# ifndef CONFIG_PIC32MX_USBIDO
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# define CONFIG_PIC32MX_USBIDO 0 /* USBID pin is controlled by the Port function */
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# endif
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# ifndef CONFIG_PIC32MX_VBUSIO
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# define CONFIG_PIC32MX_VBUSIO 0 /* VBUSON pin is controlled by the Port function */
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# endif
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#endif
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/* DEVCFG2 */
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#undef CONFIG_PIC32MX_PLLIDIV
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#if BOARD_PLL_IDIV == 1
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# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV1
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#elif BOARD_PLL_IDIV == 2
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# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV2
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#elif BOARD_PLL_IDIV == 3
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# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV3
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#elif BOARD_PLL_IDIV == 4
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# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV4
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#elif BOARD_PLL_IDIV == 5
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# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV5
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#elif BOARD_PLL_IDIV == 6
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# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV6
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#elif BOARD_PLL_IDIV == 10
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# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV10
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#elif BOARD_PLL_IDIV == 12
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# define CONFIG_PIC32MX_PLLIDIV DEVCFG2_FPLLIDIV_DIV12
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#else
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# error "Unsupported BOARD_PLL_IDIV"
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#endif
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#undef CONFIG_PIC32MX_PLLMULT
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#if BOARD_PLL_MULT == 15
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# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL15
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#elif BOARD_PLL_MULT == 16
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# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL16
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#elif BOARD_PLL_MULT == 17
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# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL17
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#elif BOARD_PLL_MULT == 18
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# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL18
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#elif BOARD_PLL_MULT == 19
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# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL19
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#elif BOARD_PLL_MULT == 20
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# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL20
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#elif BOARD_PLL_MULT == 21
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# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL21
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#elif BOARD_PLL_MULT == 24
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# define CONFIG_PIC32MX_PLLMULT DEVCFG2_FPLLMULT_MUL24
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#else
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# error "Unsupported BOARD_PLL_MULT"
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#endif
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#undef CONFIG_PIC32MX_UPLLIDIV
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#if BOARD_UPLL_IDIV == 15
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# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL15
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#elif BOARD_UPLL_IDIV == 16
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# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL16
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#elif BOARD_UPLL_IDIV == 17
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# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL17
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#elif BOARD_UPLL_IDIV == 18
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# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL18
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#elif BOARD_UPLL_IDIV == 19
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# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL19
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#elif BOARD_UPLL_IDIV == 20
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# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL20
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#elif BOARD_UPLL_IDIV == 21
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# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL21
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#elif BOARD_UPLL_IDIV == 24
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# define CONFIG_PIC32MX_UPLLIDIV DEVCFG2_FPLLMULT_MUL24
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#else
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# error "Unsupported BOARD_UPLL_IDIV"
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#endif
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#undef CONFIG_PIC32MX_PLLODIV
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#if BOARD_PLL_ODIV == 1
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV1
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#elif BOARD_PLL_ODIV == 2
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2
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#elif BOARD_PLL_ODIV == 4
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2
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#elif BOARD_PLL_ODIV == 8
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2
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#elif BOARD_PLL_ODIV == 16
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2
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#elif BOARD_PLL_ODIV == 32
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2
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#elif BOARD_PLL_ODIV == 64
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2
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#elif BOARD_PLL_ODIV == 128
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV2
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#else
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# error "Unsupported BOARD_PLL_ODIV"
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#endif
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/* DEVCFG1 */
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#undef CONFIG_PIC32MX_PBDIV
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#if BOARD_PBDIV == 1
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# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV1
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#elif BOARD_PBDIV == 2
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# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV2
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#elif BOARD_PBDIV == 4
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# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV4
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#elif BOARD_PBDIV == 8
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# define CONFIG_PIC32MX_PBDIV DEVCFG1_FPBDIV_DIV8
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#else
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# error "Unsupported BOARD_PBDIV"
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#endif
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#undef CONFIG_PIC32MX_WDPS
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#if BOARD_WD_PRESCALER == 1
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1
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#elif BOARD_WD_PRESCALER == 2
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_2
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#elif BOARD_WD_PRESCALER == 4
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_4
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#elif BOARD_WD_PRESCALER == 8
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_8
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#elif BOARD_WD_PRESCALER == 16
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_16
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#elif BOARD_WD_PRESCALER == 32
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_32
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#elif BOARD_WD_PRESCALER == 64
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_64
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#elif BOARD_WD_PRESCALER == 128
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_128
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#elif BOARD_WD_PRESCALER == 256
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_256
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#elif BOARD_WD_PRESCALER == 512
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_512
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#elif BOARD_WD_PRESCALER == 1024
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1024
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#elif BOARD_WD_PRESCALER == 2048
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_2048
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#elif BOARD_WD_PRESCALER == 4096
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_4096
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#elif BOARD_WD_PRESCALER == 8192
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_8192
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#elif BOARD_WD_PRESCALER == 16384
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_16384
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#elif BOARD_WD_PRESCALER == 32768
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_32768
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#elif BOARD_WD_PRESCALER == 65536
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_65536
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#elif BOARD_WD_PRESCALER == 131072
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_131072
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#elif BOARD_WD_PRESCALER == 262144
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_262144
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#elif BOARD_WD_PRESCALER == 524288
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_524288
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#elif BOARD_WD_PRESCALER == 1048576
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1048576
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#else
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# error "Unsupported BOARD_WD_PRESCALER"
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#endif
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#undef CONFIG_PIC32MX_WDENABLE
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#if BOARD_WD_ENABLE
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# define CONFIG_PIC32MX_WDENABLE DEVCFG1_FWDTEN
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#else
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# define CONFIG_PIC32MX_WDENABLE 0
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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@ -122,7 +122,7 @@
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/* Device configuration word 1 */
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#define DEVCFG1_FNOSC_SHIFT (0) /* Bits 0-2: Oscillator xelection */
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#define DEVCFG1_FNOSC_SHIFT (0) /* Bits 0-2: Oscillator selection */
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#define DEVCFG1_FNOSC_MASK (7 << DEVCFG1_FNOSC_SHIFT)
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# define DEVCFG1_FNOSC_FRC (0 << DEVCFG1_FNOSC_SHIFT) /* FRC oscillator */
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# define DEVCFG1_FNOSC_FRCPLL (1 << DEVCFG1_FNOSC_SHIFT) /* FRC w/PLL module */
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@ -183,6 +183,8 @@
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#define DEVCFG0_DEBUG_SHIFT (0) /* Bits 0-1: Background debugger enable */
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#define DEVCFG0_DEBUG_MASK (3 << DEVCFG0_DEBUG_SHIFT)
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# define DEVCFG0_DEBUG_ENABLED (2 << DEVCFG0_DEBUG_SHIFT)
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# define DEVCFG0_DEBUG_DISABLED (3 << DEVCFG0_DEBUG_SHIFT)
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#define DEVCFG0_ICESEL (1 << 3) /* Bit 3: ICE/debugger channel select */
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#define DEVCFG0_PWP_SHIFT (12) /* Bits 12-19: Program flash write-protect */
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#define DEVCFG0_PWP_MASK (0xff << DEVCFG0_PWP_SHIFT)
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@ -42,6 +42,7 @@
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#include <arch/mips32/registers.h>
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#include <arch/pic32mx/cp0.h>
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#include "pic32mx-config.h"
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#include "excptmacros.h"
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/****************************************************************************
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@ -113,6 +114,7 @@
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.globl __reset
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.global __start
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.global halt
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.global devconfig
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#if CONFIG_ARCH_INTERRUPTSTACK > 3
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.global g_intstackbase
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.global g_nestlevel
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@ -519,6 +521,33 @@ halt:
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nop
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.end __start_nuttx
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/****************************************************************************
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* Device Configuration
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****************************************************************************/
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.section .devcfg, "a"
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.type devconfig, object
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devconfig:
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devconfig3:
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.long CONFIG_PIC32MX_USERID << DEVCFG3_USERID_SHIFT | \
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CONFIG_PIC32MX_SRSSEL << DEVCFG3_FSRSSEL_SHIFT | \
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CONFIG_PIC32MX_USBIDO << 30 | \
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CONFIG_PIC32MX_VBUSIO << 31
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devconfig2:
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.long CONFIG_PIC32MX_PLLIDIV | CONFIG_PIC32MX_PLLMULT | \
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CONFIG_PIC32MX_UPLLIDIV | DEVCFG2_FPLLODIV_DIV1
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devconfig1:
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.long DEVCFG1_FNOSC_POSCPLL | DEVCFG1_POSCMOD_XT | \
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CONFIG_PIC32MX_PBDIV | DEVCFG1_FCKSM_NONE | \
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CONFIG_PIC32MX_WDENABLE
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devconfig0:
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.long DEVCFG0_DEBUG_DISABLED | DEVCFG0_PWP_DISABLE
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.size devconfig, .-devconfig
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/****************************************************************************
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* Global Data
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****************************************************************************/
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@ -152,7 +152,7 @@ static void pic32mx_uartsetbaud(uintptr_t uart_base, uint32_t baudrate)
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* Subject to BRG <= 65536.
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*/
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tmp = BOARD_PERIPHERAL_CLOCK / baudrate;
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tmp = BOARD_PBCLOCK / baudrate;
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/* Try BRGH=1 first. This will select the 4x divisor and will produce the
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* larger BRG divisor, given all other things equal.
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@ -755,7 +755,9 @@ static bool up_txempty(struct uart_dev_s *dev)
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void up_earlyserialinit(void)
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{
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/* Disable all UARTS */
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/* Disable interrupts from all UARTS. The console is enabled in
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* pic32mx_consoleinit()
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*/
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up_disableuartint(TTYS0_DEV.priv, NULL);
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#ifdef TTYS1_DEV
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@ -63,24 +63,24 @@
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* register value givent the board's periperhal clock frequency and the
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* desired system timer frequency:
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*
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* TIMER1_MATCH = BOARD_PERIPHERAL_CLOCK / TIMER1_PRESCALE / CLOCKS_PER_SEC
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* TIMER1_MATCH = BOARD_PBCLOCK / TIMER1_PRESCALE / CLOCKS_PER_SEC
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*
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* We want the largest possible value for MATCH that is less than 65,535, the
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* maximum value for the 16-bit timer register:
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*
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* TIMER1_PRESCALE >= BOARD_PERIPHERAL_CLOCK / CLOCKS_PER_SEC / 65535
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* TIMER1_PRESCALE >= BOARD_PBCLOCK / CLOCKS_PER_SEC / 65535
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*
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* Timer 1 does not have very many options for the perscaler value. So we
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* can pick the best by brute force. Example:
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*
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* BOARD_PERIPHERAL_CLOCK = 40000000
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* BOARD_PBCLOCK = 40000000
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* CLOCKS_PER_SEC = 100
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* OPTIMAL_PRESCALE = 6
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* TIMER1_PRESCALE = 8
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* TIMER1_MATCH = 50,000
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*/
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#define OPTIMAL_PRESCALE (BOARD_PERIPHERAL_CLOCK / CLOCKS_PER_SEC / 65535)
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#define OPTIMAL_PRESCALE (BOARD_PBCLOCK / CLOCKS_PER_SEC / 65535)
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#if OPTIMAL_PRESCALE <= 1
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# define TIMER1_CON_TCKPS TIMER1_CON_TCKPS_1
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# define TIMER1_PRESCALE 1
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@ -97,7 +97,7 @@
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# error "This timer frequency cannot be represented"
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#endif
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#define TIMER1_MATCH (BOARD_PERIPHERAL_CLOCK / TIMER1_PRESCALE / CLOCKS_PER_SEC)
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#define TIMER1_MATCH (BOARD_PBCLOCK / TIMER1_PRESCALE / CLOCKS_PER_SEC)
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/****************************************************************************
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* Private Types
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