Add support fo SAM4S Xplained SRAM
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Gregory Nutt
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e02e6694b1
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134
configs/sam4s-xplained/src/sam_sram.c
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configs/sam4s-xplained/src/sam_sram.c
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/************************************************************************************
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* configs/sam4s-xplained/src/sam_sram.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <debug.h>
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#include "up_arch.h"
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#include "sam4s_periphclks.h"
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#include "chip/sam_smc.h"
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#include "sam4s-xplained.h"
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#ifdef CONFIG_ARCH_EXTSRAM0
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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#define NPINS (3+8+19+1)
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/************************************************************************************
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* Private Data
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************************************************************************************/
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static const gpio_pinset_t g_srampins[NPINS] =
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{
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GPIO_SMC_NCS0, GPIO_SMC_NRD, GPIO_SMC_NWE,
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GPIO_SMC_D0, GPIO_SMC_D1, GPIO_SMC_D2, GPIO_SMC_D3,
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GPIO_SMC_D4, GPIO_SMC_D5, GPIO_SMC_D6, GPIO_SMC_D7,
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GPIO_SMC_A0, GPIO_SMC_A1, GPIO_SMC_A2, GPIO_SMC_A3,
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GPIO_SMC_A4, GPIO_SMC_A5, GPIO_SMC_A6, GPIO_SMC_A7,
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GPIO_SMC_A8, GPIO_SMC_A9, GPIO_SMC_A10, GPIO_SMC_A11,
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GPIO_SMC_A12, GPIO_SMC_A13, GPIO_SMC_A14, GPIO_SMC_A15,
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GPIO_SMC_A16, GPIO_SMC_A17, GPIO_SMC_A18,
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GPIO_EBI_NLB
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};
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: sam_sram_initialize
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*
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* Description:
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* Configure and enable SRAM on board the SAM4S Xplained
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*
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************************************************************************************/
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void sam_sram_initialize(void)
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{
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int i;
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/* Configure GPIO pins (leaving SRAM in the disabled state) */
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for (i = 0; i < NPINS; i++)
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{
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sam_configgpio(g_srampins[i]);
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}
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/* Enable PMC clock to the SMC */
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sam_smc_enableclk();
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/* Configure SMC setup timing */
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putreg32(SMCCS_SETUP_NWESETUP(1) | SMCCS_SETUP_NCSWRSETUP(1) |
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SMCCS_SETUP_NRDSETUP(1) | SMCCS_SETUP_NCSRDSETUP(1),
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SAM_SMCCS0_SETUP);
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/* Configure the SMC pulse timing */
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putreg32(SMCCS_PULSE_NWEPULSE(6) | SMCCS_PULSE_NCSWRPULSE(6) |
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SMCCS_PULSE_NRDPULSE(6) | SMCCS_PULSE_NCSRDPULSE(6),
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SAM_SMCCS0_PULSE);
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/* Configure the SMC cycle timing */
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putreg32(SMCCS_CYCLE_NWECYCLE(7) | SMCCS_CYCLE_NRDCYCLE(7),
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SAM_SMCCS0_CYCLE);
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/* Configure the SMC mode */
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putreg32(SMCCS_MODE_READMODE | SMCCS_MODE_WRITEMODE, SAM_SMCCS0_MODE);
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/* Enable SRAM access (active low) */
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sam_gpiowrite(GPIO_EBI_NLB, false);
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}
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#endif /* CONFIG_ARCH_EXTSRAM0 */
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