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arch/arm64/src/imx9: Add config option to select TX clk direction

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TX clock or ref clock can be driven either from outside (PHY / oscilator) or by the ENET block.

Typical connection with RMII PHY is that the PHY drives the refclk.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
This commit is contained in:
Jukka Laitinen 2024-08-29 15:31:14 +03:00 committed by Xiang Xiao
parent 56c9cbd7af
commit 3f82050623
2 changed files with 20 additions and 1 deletions
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10
arch/arm64/src/imx9/Kconfig
View File

@ -959,6 +959,16 @@ config IMX9_ENET1_RGMII
endchoice
config IMX9_ENET1_TX_CLOCK_IS_INPUT
bool "ENET1 TX clock is input"
default y if IMX9_ENET1_RMII
default n if IMX9_ENET1_RGMII
---help---
The ethernet TX clock can be either driven by the PHY, in
which case it is input to the MAC. Or it can be driven by
the MAC, in which case it is output. Typical configuration is
input for RMII and output for RGMII.
config IMX9_ENET1_PHY_AUTONEG
bool "ENET1 PHY autonegotiation enable"
default y

11
arch/arm64/src/imx9/imx9_enet.c
View File

@ -64,6 +64,7 @@
#include "imx9_iomuxc.h"
#include "hardware/imx9_ccm.h"
#include "hardware/imx9_pinmux.h"
#include "hardware/imx9_blk_ctrl.h"
#ifdef CONFIG_IMX9_ENET
@ -423,7 +424,7 @@ static inline uint32_t imx9_enet_getreg32(struct imx9_driver_s *priv,
}
/****************************************************************************
* Name: imx9_enet_putreg32
* Name: imx9_enet_modifyreg32
*
* Description:
* Atomically modify the specified bits in a memory mapped register
@ -3092,6 +3093,14 @@ int imx9_netinitialize(int intf)
imx9_ccm_configure_root_clock(CCM_CR_ENETREFPHY, SYS_PLL1PFD0DIV2, 20);
/* Enet TX / ref clock direction */
#ifdef CONFIG_IMX9_ENET1_TX_CLOCK_IS_INPUT
modifyreg32(IMX9_WAKUPMIX_ENET_CLK_SEL, WAKEUPMIX_ENET1_TX_CLK_SEL, 0);
#else
modifyreg32(IMX9_WAKUPMIX_ENET_CLK_SEL, 0, WAKEUPMIX_ENET1_TX_CLK_SEL);
#endif
/* Enable the ENET clock */
imx9_ccm_gate_on(priv->clk_gate, true);