SAMA5: Cosmetic updates to comments and README files
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@ -667,6 +667,7 @@ Load NuttX with U-Boot on AT91 boards
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U-Boot> fatload mmc 0 0x22000000 uimage
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reading uimage
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97744 bytes read in 21 ms (4.4 MiB/s)
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U-Boot> bootm 0x22000000
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## Booting kernel from Legacy Image at 0x22000000 ...
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Image Name: nuttx
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@ -681,18 +682,21 @@ Load NuttX with U-Boot on AT91 boards
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This, however, appears to be a usable workaround:
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U-Boot> fatload mmc 0 0x20008000 nuttx.bin
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mci: setting clock 257812 Hz, block size 512
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mci: setting clock 257812 Hz, block size 512
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mci: setting clock 257812 Hz, block size 512
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gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Time Out
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mci: setting clock 257812 Hz, block size 512
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mci: setting clock 22000000 Hz, block size 512
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reading nuttx.bin
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108076 bytes read in 23 ms (4.5 MiB/s)
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U-Boot> go 0x20008040
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## Starting application at 0x20008040 ...
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os_start: Entry
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U-Boot> fatload mmc 0 0x20008000 nuttx.bin
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mci: setting clock 257812 Hz, block size 512
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mci: setting clock 257812 Hz, block size 512
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mci: setting clock 257812 Hz, block size 512
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gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Time Out
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mci: setting clock 257812 Hz, block size 512
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mci: setting clock 22000000 Hz, block size 512
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reading nuttx.bin
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108076 bytes read in 23 ms (4.5 MiB/s)
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U-Boot> go 0x20008040
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## Starting application at 0x20008040 ...
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NuttShell (NSH) NuttX-7.2
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nsh>
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Loading through network
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@ -828,8 +832,10 @@ Serial Consoles
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PB28 RXD1 PIO_USART1_RXD
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PB26 CTS1 PIO_USART1_CTS
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NOTE: Debug TX and RX pins also go to the ADM3312EARU, but I am
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uncertain of the functionality.
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NOTE: Debug TX (DTXD) and RX (DRXD) pins also are routed to the
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ADM3312EARU via non populated 0 Ohm resistors. Thus allowing one
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skilled with a soldering iron to choose which UART is level
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translated by the ADM3312EARU
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-------------------------------
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SAMA5 FUNCTION NUTTX PIO
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