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SR4 is the same as SR1-3

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This commit is contained in:
Gregory Nutt 2015-12-17 12:28:45 -06:00
parent add1754dcc
commit 3f964ab20c
1 changed files with 1 additions and 6 deletions
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7
arch/arm/src/tms570/chip/tms570_esm.h
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@ -131,7 +131,7 @@
#define ESM_ILCR1_INT(n) (1 << (n)) /* Bit n: Channel n interrupt level low (write) */
/* ESM Status Register for groups 1, 2, and 3 */
/* ESM Status Register for groups 1, 2, 3, and 4 */
#define ESM_SR_PENDING(n) (1 << (n)) /* Bit n: Channel n error interrupt pending (read) */
#define ESM_SR_CLEAR(n) (1 << (n)) /* Bit n: Channel n error interrupt clear (write) */
@ -192,9 +192,4 @@
#define ESM_ILCR4_CHAN(n) (1 << (n)) /* Bit n: Maps channel n low level interrupt */
/* ESM Status Register 4 */
#define ESM_SR4_PENDING(n) (1 << (n)) /* Bit n: Channel n error interrupt pending (read) */
#define ESM_SR4_CLEAR(n) (1 << (n)) /* Bit n: Channel n error interrupt clear (write) */
#endif /* __ARCH_ARM_SRC_TMS570_CHIP_TMS570_ESM_H */