From 3fdfae16b732055c76dbb5a78e082a57913c5ce9 Mon Sep 17 00:00:00 2001 From: Janne Rosberg Date: Fri, 10 Jul 2015 15:23:41 -0600 Subject: [PATCH] samdl/sam_usb.h: fix USBDEV_CTRLB_SPDCONF defines Datasheet 03-2015 and 06-2015 is wrong. These defines are correct verified with analyser and also same values are used on Atmel xdk-asf-3.24.2 sources. From Janne Rosberg. --- arch/arm/src/samdl/chip/saml_usb.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/samdl/chip/saml_usb.h b/arch/arm/src/samdl/chip/saml_usb.h index 12d0821845..190df37d9f 100644 --- a/arch/arm/src/samdl/chip/saml_usb.h +++ b/arch/arm/src/samdl/chip/saml_usb.h @@ -273,8 +273,10 @@ #define USBDEV_CTRLB_UPRSM (1 << 1) /* Bit 1: Upstream resume */ #define USBDEV_CTRLB_SPDCONF_SHIFT (2) /* Bits 2-3: Speed configuration */ #define USBDEV_CTRLB_SPDCONF_MASK (3 << USBDEV_CTRLB_SPDCONF_SHIFT) -# define USBDEV_CTRLB_SPDCONF_LOW (0 << USBDEV_CTRLB_SPDCONF_SHIFT) /* Low speed */ -# define USBDEV_CTRLB_SPDCONF_FULL (1 << USBDEV_CTRLB_SPDCONF_SHIFT) /* Full speed */ +# define USBDEV_CTRLB_SPDCONF_FULL (0 << USBDEV_CTRLB_SPDCONF_SHIFT) /* Full speed */ +# define USBDEV_CTRLB_SPDCONF_LOW (1 << USBDEV_CTRLB_SPDCONF_SHIFT) /* Low speed */ +# define USBDEV_CTRLB_SPDCONF_HIGH (2 << USBDEV_CTRLB_SPDCONF_SHIFT) /* High speed capable */ +# define USBDEV_CTRLB_SPDCONF_HIGH_TM (3 << USBDEV_CTRLB_SPDCONF_SHIFT) /* High speed Test Mode */ #define USBDEV_CTRLB_NREPLY (1 << 4) /* Bit 4: No reply except SETUP token */ #define USBDEV_CTRLB_GNAK (1 << 9) /* Bit 9: Global NAK */ #define USBDEV_CTRLB_LPMHDSK_SHIFT (10) /* Bits 10-11: Link power management handshake */