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arch: arm: cxd56xx: nxstyle fixes

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nxstyle fixes for cxd56xx

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea 2020-04-07 13:52:12 +02:00 committed by patacongo
parent 9029e4daee
commit 402fb16a77
36 changed files with 737 additions and 524 deletions
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2
arch/arm/src/cxd56xx/cxd56_irq.h
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@ -72,7 +72,7 @@ extern "C"
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
#undef EXTERN #undef EXTERN

10
arch/arm/src/cxd56xx/cxd56_pinconfig.c
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@ -131,7 +131,7 @@ static int get_mode_regaddr(uint32_t pin, uint32_t *addr, uint32_t *shift)
DEBUGASSERT(addr && shift); DEBUGASSERT(addr && shift);
if ((pin < PIN_I2C4_BCK) || (PIN_USB_VBUSINT < pin)) if ((pin < PIN_I2C4_BCK) || (PIN_USB_VBUSINT < pin))
return -EINVAL; return -EINVAL;
if (pin <= PIN_HIF_GPIO0) if (pin <= PIN_HIF_GPIO0)
{ {
@ -187,6 +187,7 @@ static int get_mode_regaddr(uint32_t pin, uint32_t *addr, uint32_t *shift)
{ {
*shift = GROUP_HIFEXT; *shift = GROUP_HIFEXT;
} }
*addr = CXD56_TOPREG_IOCSYS_IOMD0; *addr = CXD56_TOPREG_IOCSYS_IOMD0;
} }
else if (pin <= PIN_PWM3) else if (pin <= PIN_PWM3)
@ -223,6 +224,7 @@ static int get_mode_regaddr(uint32_t pin, uint32_t *addr, uint32_t *shift)
{ {
*shift = GROUP_PWMB; *shift = GROUP_PWMB;
} }
*addr = CXD56_TOPREG_IOCSYS_IOMD1; *addr = CXD56_TOPREG_IOCSYS_IOMD1;
} }
else else
@ -283,6 +285,7 @@ static int get_mode_regaddr(uint32_t pin, uint32_t *addr, uint32_t *shift)
{ {
*shift = GROUP_USBVBUS; *shift = GROUP_USBVBUS;
} }
*addr = CXD56_TOPREG_IOCAPP_IOMD; *addr = CXD56_TOPREG_IOCAPP_IOMD;
} }
@ -377,7 +380,9 @@ int cxd56_pin_configs(uint32_t pinconfs[], size_t n)
if (((PIN_SPI2_CS_X <= pin) && (pin <= latch_endpin)) && if (((PIN_SPI2_CS_X <= pin) && (pin <= latch_endpin)) &&
(PINCONF_MODE0 == mode)) (PINCONF_MODE0 == mode))
{ {
modifyreg32(CXD56_TOPREG_DBG_HOSTIF_SEL, LATCH_OFF_MASK, LATCH_OFF); modifyreg32(CXD56_TOPREG_DBG_HOSTIF_SEL,
LATCH_OFF_MASK,
LATCH_OFF);
} }
/* Set IO cell register */ /* Set IO cell register */
@ -406,6 +411,7 @@ int cxd56_pin_configs(uint32_t pinconfs[], size_t n)
modifyreg32(modereg, (0x3 << shift), (mode << shift)); modifyreg32(modereg, (0x3 << shift), (mode << shift));
} }
} }
return 0; return 0;
} }

2
arch/arm/src/cxd56xx/cxd56_pinconfig.h
View File

@ -168,7 +168,7 @@ extern "C"
#endif #endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************

30
arch/arm/src/cxd56xx/cxd56_pmic.c
View File

@ -109,9 +109,9 @@ enum pmic_cmd_type_e
/* Register CNT_USB2 [1:0] USB_CUR_LIM constants */ /* Register CNT_USB2 [1:0] USB_CUR_LIM constants */
#define PMIC_CUR_LIM_2_5mA 0 #define PMIC_CUR_LIM_2_5MA 0
#define PMIC_CUR_LIM_100mA 1 #define PMIC_CUR_LIM_100MA 1
#define PMIC_CUR_LIM_500mA 2 #define PMIC_CUR_LIM_500MA 2
/* Register CNT_CHG1 [6:5] VO_CHG_DET4 constants */ /* Register CNT_CHG1 [6:5] VO_CHG_DET4 constants */
@ -567,7 +567,8 @@ int cxd56_pmic_set_loadswitch(uint8_t chset, bool value)
* chset - LoadSwitch Channel number(s) * chset - LoadSwitch Channel number(s)
* *
* Returned Value: * Returned Value:
* Return true if all of the specified chset are on. Otherwise, return false * Return true if all of the specified chset are on.
* Otherwise, return false
* *
****************************************************************************/ ****************************************************************************/
@ -664,7 +665,8 @@ int cxd56_pmic_set_ddc_ldo(uint8_t chset, bool value)
* chset - DDC/LDO Channel number(s) * chset - DDC/LDO Channel number(s)
* *
* Returned Value: * Returned Value:
* Return true if all of the specified chset are on. Otherwise, return false * Return true if all of the specified chset are on.
* Otherwise, return false
* *
****************************************************************************/ ****************************************************************************/
@ -925,15 +927,15 @@ int cxd56_pmic_getchargecurrent(FAR int *current)
switch (val & 0x3) switch (val & 0x3)
{ {
case PMIC_CUR_LIM_2_5mA: case PMIC_CUR_LIM_2_5MA:
*current = 2; *current = 2;
break; break;
case PMIC_CUR_LIM_100mA: case PMIC_CUR_LIM_100MA:
*current = 100; *current = 100;
break; break;
case PMIC_CUR_LIM_500mA: case PMIC_CUR_LIM_500MA:
*current = 500; *current = 500;
break; break;
@ -968,15 +970,15 @@ int cxd56_pmic_setchargecurrent(int current)
switch (current) switch (current)
{ {
case 2: case 2:
val = PMIC_CUR_LIM_2_5mA; val = PMIC_CUR_LIM_2_5MA;
break; break;
case 100: case 100:
val = PMIC_CUR_LIM_100mA; val = PMIC_CUR_LIM_100MA;
break; break;
case 500: case 500:
val = PMIC_CUR_LIM_500mA; val = PMIC_CUR_LIM_500MA;
break; break;
default: default:
@ -1045,7 +1047,8 @@ int cxd56_pmic_getchargestate(uint8_t *state)
* Name: cxd56_pmic_setrechargevol * Name: cxd56_pmic_setrechargevol
* *
* Description: * Description:
* Set threshold voltage against full charge for automatic restart charging. * Set threshold voltage against full charge for automatic restart
* charging.
* *
* Input Parameter: * Input Parameter:
* mv - Available values are -400, -350, -300 and -250 (mv) * mv - Available values are -400, -350, -300 and -250 (mv)
@ -1090,7 +1093,8 @@ int cxd56_pmic_setrechargevol(int mv)
* Name: cxd56_pmic_getrechargevol * Name: cxd56_pmic_getrechargevol
* *
* Description: * Description:
* Get threshold voltage against full charge for automatic restart charging. * Get threshold voltage against full charge for automatic restart
* charging.
* *
* Input Parameter: * Input Parameter:
* mv - Possible values are -400, -350, -300 and -250 (mv) * mv - Possible values are -400, -350, -300 and -250 (mv)

14
arch/arm/src/cxd56xx/cxd56_pmic.h
View File

@ -205,7 +205,7 @@ extern "C"
#endif #endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
@ -361,7 +361,8 @@ int cxd56_pmic_set_loadswitch(uint8_t chset, bool value);
* chset - LoadSwitch Channel number(s) * chset - LoadSwitch Channel number(s)
* *
* Returned Value: * Returned Value:
* Return true if all of the specified chset are on. Otherwise, return false * Return true if all of the specified chset are on.
* Otherwise, return false
* *
****************************************************************************/ ****************************************************************************/
@ -420,7 +421,8 @@ int cxd56_pmic_set_ddc_ldo(uint8_t chset, bool value);
* chset - DDC/LDO Channel number(s) * chset - DDC/LDO Channel number(s)
* *
* Returned Value: * Returned Value:
* Return true if all of the specified chset are on. Otherwise, return false * Return true if all of the specified chset are on.
* Otherwise, return false
* *
****************************************************************************/ ****************************************************************************/
@ -609,7 +611,8 @@ int cxd56_pmic_getchargestate(FAR uint8_t *state);
* Name: cxd56_pmic_setrechargevol * Name: cxd56_pmic_setrechargevol
* *
* Description: * Description:
* Set threshold voltage against full charge for automatic restart charging. * Set threshold voltage against full charge for automatic restart
* charging.
* *
* Input Parameter: * Input Parameter:
* mV - Available values are -400, -350, -300 and -250 (mV) * mV - Available values are -400, -350, -300 and -250 (mV)
@ -625,7 +628,8 @@ int cxd56_pmic_setrechargevol(int mv);
* Name: cxd56_pmic_getrechargevol * Name: cxd56_pmic_getrechargevol
* *
* Description: * Description:
* Get threshold voltage against full charge for automatic restart charging. * Get threshold voltage against full charge for automatic restart
* charging.
* *
* Input Parameter: * Input Parameter:
* mV - Possible values are -400, -350, -300 and -250 (mV) * mV - Possible values are -400, -350, -300 and -250 (mV)

22
arch/arm/src/cxd56xx/cxd56_powermgr.c
View File

@ -33,6 +33,10 @@
* *
****************************************************************************/ ****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdlib.h> #include <stdlib.h>
#include <unistd.h> #include <unistd.h>
@ -56,6 +60,10 @@
#include "chip.h" #include "chip.h"
#include "hardware/cxd5602_backupmem.h" #include "hardware/cxd5602_backupmem.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define INTC_REG_INV(n) (CXD56_INTC_BASE + 0x20 + ((n) << 2)) #define INTC_REG_INV(n) (CXD56_INTC_BASE + 0x20 + ((n) << 2))
#define INTC_REG_EN(n) (CXD56_INTC_BASE + 0x10 + ((n) << 2)) #define INTC_REG_EN(n) (CXD56_INTC_BASE + 0x10 + ((n) << 2))
@ -180,6 +188,10 @@ static int cxd56_pm_semtake(FAR sem_t *id)
return nxsem_wait_uninterruptible(id); return nxsem_wait_uninterruptible(id);
} }
/****************************************************************************
* Public Functions
****************************************************************************/
static int cxd56_pm_needcallback(uint32_t target, static int cxd56_pm_needcallback(uint32_t target,
FAR struct cxd56_pm_target_id_s *table) FAR struct cxd56_pm_target_id_s *table)
{ {
@ -245,8 +257,8 @@ static int cxd56_pm_do_callback(uint8_t id,
} }
} }
/* If one of the callbacks has been failed, then recovery call to previously /* If one of the callbacks has been failed, then recovery call to
* called entries. * previously called entries.
*/ */
if (ret != 0) if (ret != 0)
@ -257,6 +269,7 @@ static int cxd56_pm_do_callback(uint8_t id,
{ {
id = CXD56_PM_CALLBACK_ID_CLK_CHG_END; id = CXD56_PM_CALLBACK_ID_CLK_CHG_END;
} }
if (id == CXD56_PM_CALLBACK_ID_HOT_SLEEP) if (id == CXD56_PM_CALLBACK_ID_HOT_SLEEP)
{ {
id = CXD56_PM_CALLBACK_ID_HOT_BOOT; id = CXD56_PM_CALLBACK_ID_HOT_BOOT;
@ -293,6 +306,7 @@ static void cxd56_pm_clkchange(struct cxd56_pm_message_s *message)
{ {
return; return;
} }
id = CXD56_PM_CALLBACK_ID_CLK_CHG_END; id = CXD56_PM_CALLBACK_ID_CLK_CHG_END;
mid = MSGID_CLK_CHG_END; mid = MSGID_CLK_CHG_END;
g_clockcange_start = 0; g_clockcange_start = 0;
@ -831,7 +845,8 @@ int cxd56_pm_initialize(void)
* *
* Description: * Description:
* Get the system boot cause. This boot cause indicates the cause why the * Get the system boot cause. This boot cause indicates the cause why the
* system is launched from the state of power-off, deep sleep or cold sleep. * system is launched from the state of power-off,
* deep sleep or cold sleep.
* Each boot cause is defined as PM_BOOT_XXX. * Each boot cause is defined as PM_BOOT_XXX.
* *
* Return: * Return:
@ -982,6 +997,7 @@ int up_pm_sleep(enum pm_sleepmode_e mode)
PM_ColdSleep(NULL); PM_ColdSleep(NULL);
break; break;
} }
__asm volatile ("dsb"); __asm volatile ("dsb");
for (; ; ); for (; ; );
} }

125
arch/arm/src/cxd56xx/cxd56_powermgr.h
View File

@ -77,82 +77,82 @@
/* Power DOMAIN */ /* Power DOMAIN */
#define PM_DOMAIN_SELF_CPU (0x00000000ul) #define PM_DOMAIN_SELF_CPU (0x00000000ul)
#define PM_DOMAIN_SYSIOP (0x20000000ul) #define PM_DOMAIN_SYSIOP (0x20000000ul)
#define PM_DOMAIN_HOSTIF (0x40000000ul) #define PM_DOMAIN_HOSTIF (0x40000000ul)
#define PM_DOMAIN_PMU (0x60000000ul) #define PM_DOMAIN_PMU (0x60000000ul)
#define PM_DOMAIN_SCU (0x80000000ul) #define PM_DOMAIN_SCU (0x80000000ul)
#define PM_DOMAIN_APP (0xA0000000ul) #define PM_DOMAIN_APP (0xA0000000ul)
#define PM_DOMAIN_GPS (0xC0000000ul) #define PM_DOMAIN_GPS (0xC0000000ul)
#define PM_DOMAIN_MASK (0xE0000000ul) #define PM_DOMAIN_MASK (0xE0000000ul)
#define PM_DOMAIN_PLUS (0x20000000ul) #define PM_DOMAIN_PLUS (0x20000000ul)
/* Clock Tree Bit Data */ /* Clock Tree Bit Data */
/* SYSIOP */ /* SYSIOP */
#define PM_CLOCK_SYS_CTRL_SEL_B (0x00010000ul) /**< 16*/ #define PM_CLOCK_SYS_CTRL_SEL_B (0x00010000ul) /* 16: */
#define PM_CLOCK_SYSPLL_DIV_B (0x00008000ul) /**< 15:CKSEL_ROOT.SWCTL_CLK_SEL_RFPLL1 */ #define PM_CLOCK_SYSPLL_DIV_B (0x00008000ul) /* 15: CKSEL_ROOT.SWCTL_CLK_SEL_RFPLL1 */
#define PM_CLOCK_SYS_CPU_SEL_B (0x00002000ul) /**< 13:CKSEL_ROOT.SWCTL_CLK_SEL */ #define PM_CLOCK_SYS_CPU_SEL_B (0x00002000ul) /* 13:CKSEL_ROOT.SWCTL_CLK_SEL */
#define PM_CLOCK_SYS_CPU_DIV_B (0x00001000ul) /**< 12:CKDIV_CPU_DSP_BUS.CK_M0 */ #define PM_CLOCK_SYS_CPU_DIV_B (0x00001000ul) /* 12:CKDIV_CPU_DSP_BUS.CK_M0 */
#define PM_CLOCK_SYS_AHB_DIV_B (0x00000800ul) /**< 11:CKDIV_CPU_DSP_BUS.CK_AHB */ #define PM_CLOCK_SYS_AHB_DIV_B (0x00000800ul) /* 11:CKDIV_CPU_DSP_BUS.CK_AHB */
#define PM_CLOCK_SYS_APB_DIV_B (0x00000400ul) /**< 10:CKDIV_CPU_DSP_BUS.CK_APB */ #define PM_CLOCK_SYS_APB_DIV_B (0x00000400ul) /* 10:CKDIV_CPU_DSP_BUS.CK_APB */
#define PM_CLOCK_SYS_COMIF_DIV_B (0x00000200ul) /**< 9;CKDIV_COM.CK_COM */ #define PM_CLOCK_SYS_COMIF_DIV_B (0x00000200ul) /* 9;CKDIV_COM.CK_COM */
#define PM_CLOCK_SYS_UART1_SEL_B (0x00000100ul) /**< 8:CKSEL_SYSIOP_SUB.SEL_UART1 */ #define PM_CLOCK_SYS_UART1_SEL_B (0x00000100ul) /* 8:CKSEL_SYSIOP_SUB.SEL_UART1 */
#define PM_CLOCK_SYS_SFC_DIV_B (0x00000080ul) /**< 7:CKDIV_CPU_DSP_BUS.SFC_HCLK_LOW */ #define PM_CLOCK_SYS_SFC_DIV_B (0x00000080ul) /* 7:CKDIV_CPU_DSP_BUS.SFC_HCLK_LOW */
#define PM_CLOCK_PMU_RTC_PCLK_SEL_B (0x00000040ul) /**< 6:CKSEL_PMU.SEL_RTC_PCLK */ #define PM_CLOCK_PMU_RTC_PCLK_SEL_B (0x00000040ul) /* 6:CKSEL_PMU.SEL_RTC_PCLK */
/* HOSTIF */ /* HOSTIF */
#define PM_CLOCK_HIF_SEL_B (0x00000040ul) /**< CKSEL_SYSIOP.SEL_HOST */ #define PM_CLOCK_HIF_SEL_B (0x00000040ul) /* CKSEL_SYSIOP.SEL_HOST */
#define PM_CLOCK_HIF_DIV_B (0x00000020ul) /**< CKDIV_HOSTIFC.CK_HOSTIFC */ #define PM_CLOCK_HIF_DIV_B (0x00000020ul) /* CKDIV_HOSTIFC.CK_HOSTIFC */
#define PM_CLOCK_HIF_SEL2_B (0x00000004ul) /**< CKSEL_SYSIOP.SEL_HOST2 */ #define PM_CLOCK_HIF_SEL2_B (0x00000004ul) /* CKSEL_SYSIOP.SEL_HOST2 */
#define PM_CLOCK_HIF_UART0_SEL_B (0x00000002ul) /**< CKSEL_SYSIOP.SEL_UART0 */ #define PM_CLOCK_HIF_UART0_SEL_B (0x00000002ul) /* CKSEL_SYSIOP.SEL_UART0 */
#define PM_CLOCK_HIF_I2C_SEL_B (0x00000001ul) /**< CKSEL_SYSIOP.SEL_I2CS */ #define PM_CLOCK_HIF_I2C_SEL_B (0x00000001ul) /* CKSEL_SYSIOP.SEL_I2CS */
/* SCU */ /* SCU */
#define PM_CLOCK_SCU_XOSC_DIV_B (0x00000010ul) /**< CKSEL_SCU.SEL_SCU_XTAL */ #define PM_CLOCK_SCU_XOSC_DIV_B (0x00000010ul) /* CKSEL_SCU.SEL_SCU_XTAL */
#define PM_CLOCK_SCU_SEL_B (0x00000004ul) /**< CKSEL_SCU.SEL_SCU */ #define PM_CLOCK_SCU_SEL_B (0x00000004ul) /* CKSEL_SCU.SEL_SCU */
#define PM_CLOCK_SCU_32K_SEL_B (0x00000008ul) /**< CKSEL_SCU.SEL_SCU_32K */ #define PM_CLOCK_SCU_32K_SEL_B (0x00000008ul) /* CKSEL_SCU.SEL_SCU_32K */
#define PM_CLOCK_SCU_HPADC_SEL_B (0x00000002ul) /**< CKDIV_SCU.SCU_U32KH */ #define PM_CLOCK_SCU_HPADC_SEL_B (0x00000002ul) /* CKDIV_SCU.SCU_U32KH */
#define PM_CLOCK_SCU_LPADC_DIV_B (0x00000001ul) /**< CKDIV_SCU.SCU_U32KL */ #define PM_CLOCK_SCU_LPADC_DIV_B (0x00000001ul) /* CKDIV_SCU.SCU_U32KL */
/* APP */ /* APP */
#define PM_CLOCK_APP_SYSPLL_DIV_B (0x00004000ul) /**< APP_CKSEL.SWCTL_CLK_SEL_SP */ #define PM_CLOCK_APP_SYSPLL_DIV_B (0x00004000ul) /* APP_CKSEL.SWCTL_CLK_SEL_SP */
#define PM_CLOCK_APP_CPU_SEL_B (0x00000400ul) /**< APP_CKSEL.SWCTL_CLK_SEL */ #define PM_CLOCK_APP_CPU_SEL_B (0x00000400ul) /* APP_CKSEL.SWCTL_CLK_SEL */
#define PM_CLOCK_APP_AUD_MCLK_DIV_B (0x00000200ul) /**< APP_DIV.AU_MCLK */ #define PM_CLOCK_APP_AUD_MCLK_DIV_B (0x00000200ul) /* APP_DIV.AU_MCLK */
#define PM_CLOCK_APP_AUD_MCLK_SEL_B (0x00000100ul) /**< APP_CKSEL.AU_MCLK */ #define PM_CLOCK_APP_AUD_MCLK_SEL_B (0x00000100ul) /* APP_CKSEL.AU_MCLK */
#define PM_CLOCK_APP_AHB_GEAR_B (0x00000080ul) /**< GEAR_AHB */ #define PM_CLOCK_APP_AHB_GEAR_B (0x00000080ul) /* GEAR_AHB */
#define PM_CLOCK_APP_UART_GEAR_B (0x00000040ul) /**< GEAR_IMG_UART */ #define PM_CLOCK_APP_UART_GEAR_B (0x00000040ul) /* GEAR_IMG_UART */
#define PM_CLOCK_APP_SPI_GEAR_B (0x00000020ul) /**< GEAR_IMG_SPI */ #define PM_CLOCK_APP_SPI_GEAR_B (0x00000020ul) /* GEAR_IMG_SPI */
#define PM_CLOCK_APP_WSPI_GEAR_B (0x00000008ul) /**< GEAR_IMG_WSPI */ #define PM_CLOCK_APP_WSPI_GEAR_B (0x00000008ul) /* GEAR_IMG_WSPI */
#define PM_CLOCK_APP_SDIO_GEAR_B (0x00000004ul) /**< GEAR_PER_SDIO */ #define PM_CLOCK_APP_SDIO_GEAR_B (0x00000004ul) /* GEAR_PER_SDIO */
#define PM_CLOCK_APP_USB_GEAR_B (0x00000002ul) /**< GEAR_PER_USB */ #define PM_CLOCK_APP_USB_GEAR_B (0x00000002ul) /* GEAR_PER_USB */
#define PM_CLOCK_APP_VSYNC_GEAR_B (0x00000001ul) /**< GEAR_M_IMG_VENB/GEAR_N_IMG_VENB */ #define PM_CLOCK_APP_VSYNC_GEAR_B (0x00000001ul) /* GEAR_M_IMG_VENB/GEAR_N_IMG_VENB */
#define PM_CLOCK_APP_VSYNC_GEAR_N (0x00020000ul) /**< GEAR_N_IMG_VENB */ #define PM_CLOCK_APP_VSYNC_GEAR_N (0x00020000ul) /* GEAR_N_IMG_VENB */
/* GPS */ /* GPS */
#define PM_CLOCK_GPS_PLL_SEL_B (0x00004000ul) /**< CKSEL_ROOT.SEL_RF_PLL_0 */ #define PM_CLOCK_GPS_PLL_SEL_B (0x00004000ul) /* CKSEL_ROOT.SEL_RF_PLL_0 */
#define PM_CLOCK_GPS_ACQ_SEL_B (0x00000200ul) /**< CKSEL_GNSS_BB.SEL_ACQ */ #define PM_CLOCK_GPS_ACQ_SEL_B (0x00000200ul) /* CKSEL_GNSS_BB.SEL_ACQ */
#define PM_CLOCK_GPS_ITP_TRK_SEL_B (0x00000080ul) /**< CKDIV_ITP.ITP_TRK */ #define PM_CLOCK_GPS_ITP_TRK_SEL_B (0x00000080ul) /* CKDIV_ITP.ITP_TRK */
#define PM_CLOCK_GPS_BB_MODE_SEL_B (0x00000400ul) /**< CKSEL_GNSS_BB.GNSS_MODE */ #define PM_CLOCK_GPS_BB_MODE_SEL_B (0x00000400ul) /* CKSEL_GNSS_BB.GNSS_MODE */
#define PM_CLOCK_GPS_LOGGER_SEL_B (0x00000040ul) /**< CKSEL_GNSS_BB.SEL_LOG */ #define PM_CLOCK_GPS_LOGGER_SEL_B (0x00000040ul) /* CKSEL_GNSS_BB.SEL_LOG */
#define PM_CLOCK_GPS_ITB_FFT_SEL_B (0x00000020ul) /**< CKSEL_GNSS_BB.SEL_ITB_FFT */ #define PM_CLOCK_GPS_ITB_FFT_SEL_B (0x00000020ul) /* CKSEL_GNSS_BB.SEL_ITB_FFT */
#define PM_CLOCK_GPS_BB_SEL_B (0x00000100ul) /**< CKSEL_GNSS_BB.SEL_GNSS_BB */ #define PM_CLOCK_GPS_BB_SEL_B (0x00000100ul) /* CKSEL_GNSS_BB.SEL_GNSS_BB */
#define PM_CLOCK_GPS_PPS_SEL_B (0x00000004ul) /**< CKSEL_GNSS_BB.SEL_PPS */ #define PM_CLOCK_GPS_PPS_SEL_B (0x00000004ul) /* CKSEL_GNSS_BB.SEL_PPS */
#define PM_CLOCK_GPS_CPU_DIV_B (0x00000002ul) /**< GNSS_DIV.CPU */ #define PM_CLOCK_GPS_CPU_DIV_B (0x00000002ul) /* GNSS_DIV.CPU */
#define PM_CLOCK_GPS_AHB_DIV_B (0x00000001ul) /**< GNSS_DIV.AHB */ #define PM_CLOCK_GPS_AHB_DIV_B (0x00000001ul) /* GNSS_DIV.AHB */
/* PMU */ /* PMU */
#define PM_CLOCK_PMU_SEL_B (0x00000004ul) /**< CKSEL_ROOT.PMU_SWCTL_CLK_SEL */ #define PM_CLOCK_PMU_SEL_B (0x00000004ul) /* CKSEL_ROOT.PMU_SWCTL_CLK_SEL */
#define PM_CLOCK_PMU_PWCTL_SEL_B (0x00000002ul) /**< CKSEL_ROOT.SWCTL_CLK_SEL_RO_RTC */ #define PM_CLOCK_PMU_PWCTL_SEL_B (0x00000002ul) /* CKSEL_ROOT.SWCTL_CLK_SEL_RO_RTC */
#define PM_CLOCK_PMU_PWCTL_DIV_B (0x00000001ul) /**< CKDIV_PMU.PMUA */ #define PM_CLOCK_PMU_PWCTL_DIV_B (0x00000001ul) /* CKDIV_PMU.PMUA */
#define PM_CLOCK_DOMAIN_MASK ( PM_CLOCK_SYS_CTRL_SEL_B | PM_CLOCK_SYSPLL_DIV_B |\ #define PM_CLOCK_DOMAIN_MASK ( PM_CLOCK_SYS_CTRL_SEL_B | PM_CLOCK_SYSPLL_DIV_B |\
PM_CLOCK_SYS_CPU_SEL_B | PM_CLOCK_SYS_CPU_DIV_B |\ PM_CLOCK_SYS_CPU_SEL_B | PM_CLOCK_SYS_CPU_DIV_B |\
PM_CLOCK_SYS_AHB_DIV_B) PM_CLOCK_SYS_AHB_DIV_B)
@ -160,13 +160,15 @@
/* Target_id bit field */ /* Target_id bit field */
/* |31|30|29|28|27|26|25|24|23|22|21|20|19|18|17|16|15|14|13|12|11|10|09|08|07|06|05|04|03|02|01|00| */ /* |31|30|29|28|27|26|25|24|23|22|21|20|19|18|17|16|15|14
* |13|12|11|10|09|08|07|06|05|04|03|02|01|00|
*/
/* | Domain | Domain another bit field | */ /* | Domain | Domain another bit field | */
/**************************************************************************** /****************************************************************************
* Base Define * Base Define
*****************************************************************************/ ****************************************************************************/
/* SYSIOP */ /* SYSIOP */
@ -233,7 +235,7 @@
/**************************************************************************** /****************************************************************************
* cxd56_pm_getclock & cxd56_pm_register_callback Interface Define * cxd56_pm_getclock & cxd56_pm_register_callback Interface Define
*****************************************************************************/ ****************************************************************************/
#define PM_CLOCK_SYS_CTRL PM_CLOCK_SYS_CTRL_SEL #define PM_CLOCK_SYS_CTRL PM_CLOCK_SYS_CTRL_SEL
#define PM_CLOCK_SYSPLL PM_CLOCK_SYSPLL_DIV #define PM_CLOCK_SYSPLL PM_CLOCK_SYSPLL_DIV
@ -329,10 +331,11 @@ extern "C"
typedef int (*cxd56_pm_callback)(uint8_t id); typedef int (*cxd56_pm_callback)(uint8_t id);
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
void *cxd56_pm_register_callback(uint32_t target, cxd56_pm_callback callback); void *cxd56_pm_register_callback(uint32_t target,
cxd56_pm_callback callback);
void cxd56_pm_unregister_callback(void *handle); void cxd56_pm_unregister_callback(void *handle);
int cxd56_pm_fifo_handlear(int cpuid, uint32_t data[2]); int cxd56_pm_fifo_handlear(int cpuid, uint32_t data[2]);
int cxd56_pm_main_task(int argc, FAR char *argv[]); int cxd56_pm_main_task(int argc, FAR char *argv[]);

79
arch/arm/src/cxd56xx/cxd56_powermgr_procfs.c
View File

@ -33,6 +33,10 @@
* *
****************************************************************************/ ****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include <nuttx/fs/procfs.h> #include <nuttx/fs/procfs.h>
#include <nuttx/fs/dirent.h> #include <nuttx/fs/dirent.h>
@ -91,19 +95,20 @@ struct cxd56_powermgr_procfs_dir_s
****************************************************************************/ ****************************************************************************/
static int cxd56_powermgr_procfs_open(FAR struct file *filep, static int cxd56_powermgr_procfs_open(FAR struct file *filep,
FAR const char *relpath, int oflags, mode_t mode); FAR const char *relpath,
int oflags, mode_t mode);
static int cxd56_powermgr_procfs_close(FAR struct file *filep); static int cxd56_powermgr_procfs_close(FAR struct file *filep);
static ssize_t cxd56_powermgr_procfs_read(FAR struct file *filep, static ssize_t cxd56_powermgr_procfs_read(FAR struct file *filep,
FAR char *buffer, size_t buflen); FAR char *buffer, size_t buflen);
static int cxd56_powermgr_procfs_dup(FAR const struct file *oldp, static int cxd56_powermgr_procfs_dup(FAR const struct file *oldp,
FAR struct file *newp); FAR struct file *newp);
static int cxd56_powermgr_procfs_opendir(FAR const char *relpath, static int cxd56_powermgr_procfs_opendir(FAR const char *relpath,
FAR struct fs_dirent_s *dir); FAR struct fs_dirent_s *dir);
static int cxd56_powermgr_procfs_closedir(FAR struct fs_dirent_s *dir); static int cxd56_powermgr_procfs_closedir(FAR struct fs_dirent_s *dir);
static int cxd56_powermgr_procfs_readdir(struct fs_dirent_s *dir); static int cxd56_powermgr_procfs_readdir(struct fs_dirent_s *dir);
static int cxd56_powermgr_procfs_rewinddir(struct fs_dirent_s *dir); static int cxd56_powermgr_procfs_rewinddir(struct fs_dirent_s *dir);
static int cxd56_powermgr_procfs_stat(FAR const char *relpath, static int cxd56_powermgr_procfs_stat(FAR const char *relpath,
FAR struct stat *buf); FAR struct stat *buf);
/**************************************************************************** /****************************************************************************
* Private Data * Private Data
@ -124,21 +129,41 @@ const struct procfs_operations cxd56_powermgr_procfs_operations =
}; };
static const struct procfs_entry_s g_powermgr_procfs1 = static const struct procfs_entry_s g_powermgr_procfs1 =
{"pm**", &cxd56_powermgr_procfs_operations}; {
"pm**", &cxd56_powermgr_procfs_operations
};
static const struct procfs_entry_s g_powermgr_procfs2 = static const struct procfs_entry_s g_powermgr_procfs2 =
{"pm/" , &cxd56_powermgr_procfs_operations}; {
"pm/" , &cxd56_powermgr_procfs_operations
};
static FAR char *g_powermg_procfs_buffer; static FAR char *g_powermg_procfs_buffer;
static size_t g_powermg_procfs_size; static size_t g_powermg_procfs_size;
static size_t g_powermg_procfs_len; static size_t g_powermg_procfs_len;
static const char* g_powermg_procfs_clock_source_name[] static const char *g_powermg_procfs_clock_source_name[] =
= {"RCOSC", "SYSPLL", "XOSC", "RTC"}; {
static const char* g_powermg_procfs_power_state[] "RCOSC",
= {"-", "o"}; "SYSPLL",
static const char* g_powermg_procfs_dir[] "XOSC",
= {"clock", "power"}; "RTC"
};
static const char *g_powermg_procfs_power_state[] =
{
"-",
"o"
};
static const char *g_powermg_procfs_dir[] =
{
"clock",
"power"
};
/**************************************************************************** /****************************************************************************
* Private Function * Private Function Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
@ -291,8 +316,10 @@ static void cxd56_powermgr_procfs_clock(void)
cxd56_get_sys_baseclock(), dsptabl[3], cxd56_get_sys_baseclock(), dsptabl[3],
cxd56_get_sys_ahb_baseclock(), dsptabl[4], cxd56_get_sys_ahb_baseclock(), dsptabl[4],
cxd56_get_sys_apb_baseclock(), dsptabl[5], cxd56_get_sys_apb_baseclock(), dsptabl[5],
cxd56_get_com_baseclock(), cxd56_get_img_uart_baseclock(), cxd56_get_com_baseclock(),
cxd56_get_sys_sfc_baseclock(), cxd56_get_img_spi_baseclock(), cxd56_get_img_uart_baseclock(),
cxd56_get_sys_sfc_baseclock(),
cxd56_get_img_spi_baseclock(),
scu, cxd56_get_img_wspi_baseclock(), scu, cxd56_get_img_wspi_baseclock(),
lpadc, cxd56_get_usb_baseclock(), lpadc, cxd56_get_usb_baseclock(),
hpadc, emmc, hpadc, emmc,
@ -385,7 +412,9 @@ static void cxd56_powermgr_procfs_power_state(void)
****************************************************************************/ ****************************************************************************/
static int cxd56_powermgr_procfs_check_dir(char *relpath, static int cxd56_powermgr_procfs_check_dir(char *relpath,
mode_t *mode, int *level, int *fileno) mode_t *mode,
int *level,
int *fileno)
{ {
char *temp; char *temp;
int ret = OK; int ret = OK;
@ -443,7 +472,9 @@ static int cxd56_powermgr_procfs_check_dir(char *relpath,
****************************************************************************/ ****************************************************************************/
static int cxd56_powermgr_procfs_open(FAR struct file *filep, static int cxd56_powermgr_procfs_open(FAR struct file *filep,
FAR const char *relpath, int oflags, mode_t mode) FAR const char *relpath,
int oflags,
mode_t mode)
{ {
FAR struct cxd56_powermgr_procfs_file_s *priv; FAR struct cxd56_powermgr_procfs_file_s *priv;
int ret; int ret;
@ -580,7 +611,7 @@ static ssize_t cxd56_powermgr_procfs_read(FAR struct file *filep,
****************************************************************************/ ****************************************************************************/
static int cxd56_powermgr_procfs_dup(FAR const struct file *oldp, static int cxd56_powermgr_procfs_dup(FAR const struct file *oldp,
FAR struct file *newp) FAR struct file *newp)
{ {
void *oldpriv; void *oldpriv;
void *newpriv; void *newpriv;
@ -621,7 +652,7 @@ static int cxd56_powermgr_procfs_dup(FAR const struct file *oldp,
****************************************************************************/ ****************************************************************************/
static int cxd56_powermgr_procfs_stat(FAR const char *relpath, static int cxd56_powermgr_procfs_stat(FAR const char *relpath,
FAR struct stat *buf) FAR struct stat *buf)
{ {
int ret; int ret;
mode_t mode; mode_t mode;
@ -652,7 +683,7 @@ static int cxd56_powermgr_procfs_stat(FAR const char *relpath,
****************************************************************************/ ****************************************************************************/
static int cxd56_powermgr_procfs_opendir(FAR const char *relpath, static int cxd56_powermgr_procfs_opendir(FAR const char *relpath,
FAR struct fs_dirent_s *dir) FAR struct fs_dirent_s *dir)
{ {
FAR struct cxd56_powermgr_procfs_dir_s *procfs; FAR struct cxd56_powermgr_procfs_dir_s *procfs;
int ret; int ret;
@ -770,7 +801,7 @@ static int cxd56_powermgr_procfs_rewinddir(struct fs_dirent_s *dir)
} }
/**************************************************************************** /****************************************************************************
* Public Function * Public Functions
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
@ -786,9 +817,9 @@ int cxd56_pm_initialize_procfs(void)
int ret; int ret;
ret = procfs_register(&g_powermgr_procfs1); ret = procfs_register(&g_powermgr_procfs1);
if (ret < 0) if (ret < 0)
return -EPERM; return -EPERM;
ret = procfs_register(&g_powermgr_procfs2); ret = procfs_register(&g_powermgr_procfs2);
if (ret < 0) if (ret < 0)
return -EPERM; return -EPERM;
return ret; return ret;
} }

2
arch/arm/src/cxd56xx/cxd56_pwm.c
View File

@ -265,6 +265,7 @@ static int convert_freq2period(uint32_t freq, ub16_t duty, uint32_t *param)
{ {
period = 0xffff; period = 0xffff;
} }
offperiod = ((0x10000 - duty) * (period + 1) + 0x8000) >> 16; offperiod = ((0x10000 - duty) * (period + 1) + 0x8000) >> 16;
if (offperiod == 0) if (offperiod == 0)
{ {
@ -274,6 +275,7 @@ static int convert_freq2period(uint32_t freq, ub16_t duty, uint32_t *param)
{ {
offperiod = period; offperiod = period;
} }
*param = (period & 0xffff) | *param = (period & 0xffff) |
((offperiod & 0xffff) << PWM_PARAM_OFFPERIOD_SHIFT); ((offperiod & 0xffff) << PWM_PARAM_OFFPERIOD_SHIFT);

2
arch/arm/src/cxd56xx/cxd56_pwm.h
View File

@ -74,7 +74,7 @@ extern "C"
#endif #endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************

16
arch/arm/src/cxd56xx/cxd56_rtc.h
View File

@ -93,7 +93,7 @@ extern "C"
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Name: cxd56_rtc_count * Name: cxd56_rtc_count
* *
* Description: * Description:
@ -102,11 +102,11 @@ extern "C"
* Returned Value: * Returned Value:
* 64bit counter value running at 32kHz * 64bit counter value running at 32kHz
* *
************************************************************************************/ ****************************************************************************/
uint64_t cxd56_rtc_count(void); uint64_t cxd56_rtc_count(void);
/************************************************************************************ /****************************************************************************
* Name: cxd56_rtc_almcount * Name: cxd56_rtc_almcount
* *
* Description: * Description:
@ -115,13 +115,13 @@ uint64_t cxd56_rtc_count(void);
* Returned Value: * Returned Value:
* 64bit alarm counter value running at 32kHz * 64bit alarm counter value running at 32kHz
* *
************************************************************************************/ ****************************************************************************/
#ifdef CONFIG_RTC_ALARM #ifdef CONFIG_RTC_ALARM
uint64_t cxd56_rtc_almcount(void); uint64_t cxd56_rtc_almcount(void);
#endif /* CONFIG_RTC_ALARM */ #endif /* CONFIG_RTC_ALARM */
/************************************************************************************ /****************************************************************************
* Name: cxd56_rtc_setalarm * Name: cxd56_rtc_setalarm
* *
* Description: * Description:
@ -133,13 +133,13 @@ uint64_t cxd56_rtc_almcount(void);
* Returned Value: * Returned Value:
* Zero (OK) on success; a negated errno on failure * Zero (OK) on success; a negated errno on failure
* *
************************************************************************************/ ****************************************************************************/
#ifdef CONFIG_RTC_ALARM #ifdef CONFIG_RTC_ALARM
int cxd56_rtc_setalarm(FAR struct alm_setalarm_s *alminfo); int cxd56_rtc_setalarm(FAR struct alm_setalarm_s *alminfo);
#endif /* CONFIG_RTC_ALARM */ #endif /* CONFIG_RTC_ALARM */
/************************************************************************************ /****************************************************************************
* Name: cxd56_rtc_cancelalarm * Name: cxd56_rtc_cancelalarm
* *
* Description: * Description:
@ -151,7 +151,7 @@ int cxd56_rtc_setalarm(FAR struct alm_setalarm_s *alminfo);
* Returned Value: * Returned Value:
* Zero (OK) on success; a negated errno on failure * Zero (OK) on success; a negated errno on failure
* *
************************************************************************************/ ****************************************************************************/
#ifdef CONFIG_RTC_ALARM #ifdef CONFIG_RTC_ALARM
int cxd56_rtc_cancelalarm(enum alm_id_e alarmid); int cxd56_rtc_cancelalarm(enum alm_id_e alarmid);

15
arch/arm/src/cxd56xx/cxd56_rtc_lowerhalf.c
View File

@ -96,6 +96,7 @@ struct cxd56_lowerhalf_s
/**************************************************************************** /****************************************************************************
* Private Function Prototypes * Private Function Prototypes
****************************************************************************/ ****************************************************************************/
/* Prototypes for static methods in struct rtc_ops_s */ /* Prototypes for static methods in struct rtc_ops_s */
static int cxd56_rdtime(FAR struct rtc_lowerhalf_s *lower, static int cxd56_rdtime(FAR struct rtc_lowerhalf_s *lower,
@ -107,7 +108,7 @@ static int cxd56_settime(FAR struct rtc_lowerhalf_s *lower,
static int cxd56_setalarm(FAR struct rtc_lowerhalf_s *lower, static int cxd56_setalarm(FAR struct rtc_lowerhalf_s *lower,
FAR const struct lower_setalarm_s *alarminfo); FAR const struct lower_setalarm_s *alarminfo);
static int cxd56_setrelative(FAR struct rtc_lowerhalf_s *lower, static int cxd56_setrelative(FAR struct rtc_lowerhalf_s *lower,
FAR const struct lower_setrelative_s *alarminfo); FAR const struct lower_setrelative_s *alarminfo);
static int cxd56_cancelalarm(FAR struct rtc_lowerhalf_s *lower, static int cxd56_cancelalarm(FAR struct rtc_lowerhalf_s *lower,
int alarmid); int alarmid);
#endif #endif
@ -115,6 +116,7 @@ static int cxd56_cancelalarm(FAR struct rtc_lowerhalf_s *lower,
/**************************************************************************** /****************************************************************************
* Private Data * Private Data
****************************************************************************/ ****************************************************************************/
/* CXD56 RTC driver operations */ /* CXD56 RTC driver operations */
static const struct rtc_ops_s g_rtc_ops = static const struct rtc_ops_s g_rtc_ops =
@ -317,7 +319,8 @@ static int cxd56_setalarm(FAR struct rtc_lowerhalf_s *lower,
int ret = -EINVAL; int ret = -EINVAL;
DEBUGASSERT(lower != NULL && alarminfo != NULL); DEBUGASSERT(lower != NULL && alarminfo != NULL);
DEBUGASSERT((RTC_ALARM0 == alarminfo->id) || (RTC_ALARM1 == alarminfo->id)); DEBUGASSERT((RTC_ALARM0 == alarminfo->id) ||
(RTC_ALARM1 == alarminfo->id));
priv = (FAR struct cxd56_lowerhalf_s *)lower; priv = (FAR struct cxd56_lowerhalf_s *)lower;
@ -384,10 +387,12 @@ static int cxd56_setrelative(FAR struct rtc_lowerhalf_s *lower,
int ret = -EINVAL; int ret = -EINVAL;
DEBUGASSERT(lower != NULL && alarminfo != NULL); DEBUGASSERT(lower != NULL && alarminfo != NULL);
DEBUGASSERT((RTC_ALARM0 <= alarminfo->id) && (alarminfo->id < RTC_ALARM_LAST)); DEBUGASSERT((RTC_ALARM0 <= alarminfo->id) &&
(alarminfo->id < RTC_ALARM_LAST));
if (((alarminfo->id == RTC_ALARM0) || (alarminfo->id == RTC_ALARM1)) && if (((alarminfo->id == RTC_ALARM0) ||
(alarminfo->reltime > 0)) (alarminfo->id == RTC_ALARM1)) &&
(alarminfo->reltime > 0))
{ {
/* Disable pre-emption while we do this so that we don't have to worry /* Disable pre-emption while we do this so that we don't have to worry
* about being suspended and working on an old time. * about being suspended and working on an old time.

27
arch/arm/src/cxd56xx/cxd56_scu.c
View File

@ -266,7 +266,8 @@ static void seq_setstartinterval(int sid, int interval);
static void seq_setstartphase(int sid, int phase); static void seq_setstartphase(int sid, int phase);
static void seq_startseq(int sid); static void seq_startseq(int sid);
static void seq_stopseq(int sid); static void seq_stopseq(int sid);
static int seq_setadjustment(FAR struct seq_s *seq, struct adjust_xyz_s *adj); static int seq_setadjustment(FAR struct seq_s *seq,
struct adjust_xyz_s *adj);
static int seq_setfilter(FAR struct scufifo_s *fifo, int pos, static int seq_setfilter(FAR struct scufifo_s *fifo, int pos,
struct iir_filter_s iir[2]); struct iir_filter_s iir[2]);
static int seq_seteventnotifier(FAR struct scufifo_s *fifo, static int seq_seteventnotifier(FAR struct scufifo_s *fifo,
@ -565,7 +566,8 @@ static inline void mathf_free(int8_t mid)
* Allocate sequencer * Allocate sequencer
* *
* Returned Value: * Returned Value:
* Allocated sequencer ID is returned on success. -1 is returned on failure. * Allocated sequencer ID is returned on success.
* -1 is returned on failure.
* *
****************************************************************************/ ****************************************************************************/
@ -807,7 +809,8 @@ static void seq_setbus(int sid, int bustype)
* *
****************************************************************************/ ****************************************************************************/
static void seq_setdataformat(int sid, int start, int bps, int swap, int elem) static void seq_setdataformat(int sid, int start,
int bps, int swap, int elem)
{ {
uint32_t val; uint32_t val;
val = start & 0xf; val = start & 0xf;
@ -1224,7 +1227,9 @@ static int seq_start(FAR struct seq_s *seq, int fifoid)
/* Calculate timestamp interval for ADC */ /* Calculate timestamp interval for ADC */
cxd56_adc_getinterval(seq->bustype, &fifo->interval, &fifo->adjust); cxd56_adc_getinterval(seq->bustype,
&fifo->interval,
&fifo->adjust);
/* Enable ADC */ /* Enable ADC */
@ -1478,7 +1483,8 @@ static void seq_sync(FAR struct seq_s *seq, int req)
* *
****************************************************************************/ ****************************************************************************/
static void seq_handlefifointr(FAR struct cxd56_scudev_s *priv, uint32_t intr) static void seq_handlefifointr(FAR struct cxd56_scudev_s *priv,
uint32_t intr)
{ {
uint32_t bit; uint32_t bit;
int i; int i;
@ -2112,7 +2118,8 @@ static void seq_fifofree(FAR struct scufifo_s *fifo)
* *
****************************************************************************/ ****************************************************************************/
static inline struct scufifo_s *seq_getfifo(FAR struct seq_s *seq, int fifoid) static inline struct scufifo_s *seq_getfifo(FAR struct seq_s *seq,
int fifoid)
{ {
DEBUGASSERT(fifoid >= 0 && fifoid < 3); DEBUGASSERT(fifoid >= 0 && fifoid < 3);
@ -2903,7 +2910,9 @@ static inline void seq_read8(uint32_t addr, FAR uint8_t *buffer, int length)
* Name: seq_read16 * Name: seq_read16
****************************************************************************/ ****************************************************************************/
static inline void seq_read16(uint32_t addr, FAR uint16_t *buffer, int length) static inline void seq_read16(uint32_t addr,
FAR uint16_t *buffer,
int length)
{ {
int i; int i;
@ -2917,7 +2926,9 @@ static inline void seq_read16(uint32_t addr, FAR uint16_t *buffer, int length)
* Name: seq_read32 * Name: seq_read32
****************************************************************************/ ****************************************************************************/
static inline void seq_read32(uint32_t addr, FAR uint32_t *buffer, int length) static inline void seq_read32(uint32_t addr,
FAR uint32_t *buffer,
int length)
{ {
int i; int i;

5
arch/arm/src/cxd56xx/cxd56_scufifo.c
View File

@ -34,7 +34,7 @@
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
* include files * Included Files
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
@ -88,6 +88,7 @@ struct fifomem g_fifomem;
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
* Name: fifomem_alloc * Name: fifomem_alloc
* *
@ -184,6 +185,7 @@ void scufifo_memfree(uint16_t start)
g_fifomem.freelist = c; g_fifomem.freelist = c;
break; break;
} }
prev = c; prev = c;
} }
} }
@ -210,5 +212,6 @@ void scufifo_initialize(void)
c->size = 0; c->size = 0;
c->next = &g_fifomem.chunk[i]; c->next = &g_fifomem.chunk[i];
} }
c->next = NULL; c->next = NULL;
} }

69
arch/arm/src/cxd56xx/cxd56_sdhci.h
View File

@ -62,28 +62,28 @@ extern "C"
/* Register Offsets *********************************************************/ /* Register Offsets *********************************************************/
#define CXD56_SDHCI_DSADDR_OFFSET (0x0000) /* DMA System Address Register */ #define CXD56_SDHCI_DSADDR_OFFSET (0x0000) /* DMA System Address Register */
#define CXD56_SDHCI_BLKATTR_OFFSET (0x0004) /* Block Attributes Register */ #define CXD56_SDHCI_BLKATTR_OFFSET (0x0004) /* Block Attributes Register */
#define CXD56_SDHCI_CMDARG_OFFSET (0x0008) /* Command Argument Register */ #define CXD56_SDHCI_CMDARG_OFFSET (0x0008) /* Command Argument Register */
#define CXD56_SDHCI_XFERTYP_OFFSET (0x000c) /* Transfer Type Register */ #define CXD56_SDHCI_XFERTYP_OFFSET (0x000c) /* Transfer Type Register */
#define CXD56_SDHCI_CMDRSP0_OFFSET (0x0010) /* Command Response 0 */ #define CXD56_SDHCI_CMDRSP0_OFFSET (0x0010) /* Command Response 0 */
#define CXD56_SDHCI_CMDRSP1_OFFSET (0x0014) /* Command Response 1 */ #define CXD56_SDHCI_CMDRSP1_OFFSET (0x0014) /* Command Response 1 */
#define CXD56_SDHCI_CMDRSP2_OFFSET (0x0018) /* Command Response 2 */ #define CXD56_SDHCI_CMDRSP2_OFFSET (0x0018) /* Command Response 2 */
#define CXD56_SDHCI_CMDRSP3_OFFSET (0x001c) /* Command Response 3 */ #define CXD56_SDHCI_CMDRSP3_OFFSET (0x001c) /* Command Response 3 */
#define CXD56_SDHCI_DATPORT_OFFSET (0x0020) /* Buffer Data Port Register */ #define CXD56_SDHCI_DATPORT_OFFSET (0x0020) /* Buffer Data Port Register */
#define CXD56_SDHCI_PRSSTAT_OFFSET (0x0024) /* Present State Register */ #define CXD56_SDHCI_PRSSTAT_OFFSET (0x0024) /* Present State Register */
#define CXD56_SDHCI_PROCTL_OFFSET (0x0028) /* Protocol Control Register */ #define CXD56_SDHCI_PROCTL_OFFSET (0x0028) /* Protocol Control Register */
#define CXD56_SDHCI_SYSCTL_OFFSET (0x002c) /* System Control Register */ #define CXD56_SDHCI_SYSCTL_OFFSET (0x002c) /* System Control Register */
#define CXD56_SDHCI_IRQSTAT_OFFSET (0x0030) /* Interrupt Status Register */ #define CXD56_SDHCI_IRQSTAT_OFFSET (0x0030) /* Interrupt Status Register */
#define CXD56_SDHCI_IRQSTATEN_OFFSET (0x0034) /* Interrupt Status Enable Register */ #define CXD56_SDHCI_IRQSTATEN_OFFSET (0x0034) /* Interrupt Status Enable Register */
#define CXD56_SDHCI_IRQSIGEN_OFFSET (0x0038) /* Interrupt Signal Enable Register */ #define CXD56_SDHCI_IRQSIGEN_OFFSET (0x0038) /* Interrupt Signal Enable Register */
#define CXD56_SDHCI_AC12ERR_OFFSET (0x003c) /* Auto CMD12 Error Status Register */ #define CXD56_SDHCI_AC12ERR_OFFSET (0x003c) /* Auto CMD12 Error Status Register */
#define CXD56_SDHCI_HTCAPBLT_OFFSET (0x0040) /* Host Controller Capabilities */ #define CXD56_SDHCI_HTCAPBLT_OFFSET (0x0040) /* Host Controller Capabilities */
#define CXD56_SDHCI_FEVT_OFFSET (0x0050) /* Force Event Register */ #define CXD56_SDHCI_FEVT_OFFSET (0x0050) /* Force Event Register */
#define CXD56_SDHCI_ADMAES_OFFSET (0x0054) /* ADMA Error Status Register */ #define CXD56_SDHCI_ADMAES_OFFSET (0x0054) /* ADMA Error Status Register */
#define CXD56_SDHCI_ADSADDR_OFFSET (0x0058) /* ADMA System Address Register */ #define CXD56_SDHCI_ADSADDR_OFFSET (0x0058) /* ADMA System Address Register */
#define CXD56_SDHCI_VENDSPEC_OFFSET (0x0110) /* Vendor Specific Control */ #define CXD56_SDHCI_VENDSPEC_OFFSET (0x0110) /* Vendor Specific Control */
#define CXD56_SDHCI_OTHERIOLL_OFFSET (0x021C) /* IO Pin Control */ #define CXD56_SDHCI_OTHERIOLL_OFFSET (0x021C) /* IO Pin Control */
#define CXD56_SDHCI_USERDEF1CTL_OFFSET (0x0270) /* User Define1 Control Register */ #define CXD56_SDHCI_USERDEF1CTL_OFFSET (0x0270) /* User Define1 Control Register */
#define CXD56_SDHCI_USERDEF2CTL_OFFSET (0x0274) /* User Define2 Control Register */ #define CXD56_SDHCI_USERDEF2CTL_OFFSET (0x0274) /* User Define2 Control Register */
@ -120,7 +120,7 @@ extern "C"
/* DMA System Address Register */ /* DMA System Address Register */
#define SDHCI_DSADDR_SHIFT (1) /* Bits 1-31: DMA System Address */ #define SDHCI_DSADDR_SHIFT (1) /* Bits 1-31: DMA System Address */
#define SDHCI_DSADDR_MASK (0xfffffffe) /* Bits 0-1: Reserved */ #define SDHCI_DSADDR_MASK (0xfffffffe) /* Bits 0-1: Reserved */
/* Block Attributes Register */ /* Block Attributes Register */
@ -151,17 +151,20 @@ extern "C"
#define SDHCI_XFERTYP_RSPTYP_LEN136 (1 << SDHCI_XFERTYP_RSPTYP_SHIFT) /* Response length 136 */ #define SDHCI_XFERTYP_RSPTYP_LEN136 (1 << SDHCI_XFERTYP_RSPTYP_SHIFT) /* Response length 136 */
#define SDHCI_XFERTYP_RSPTYP_LEN48 (2 << SDHCI_XFERTYP_RSPTYP_SHIFT) /* Response length 48 */ #define SDHCI_XFERTYP_RSPTYP_LEN48 (2 << SDHCI_XFERTYP_RSPTYP_SHIFT) /* Response length 48 */
#define SDHCI_XFERTYP_RSPTYP_LEN48BSY (3 << SDHCI_XFERTYP_RSPTYP_SHIFT) /* Response length 48, check busy */ #define SDHCI_XFERTYP_RSPTYP_LEN48BSY (3 << SDHCI_XFERTYP_RSPTYP_SHIFT) /* Response length 48, check busy */
/* Bit 18: Reserved */ /* Bit 18: Reserved */
#define SDHCI_XFERTYP_CCCEN (1 << 19) /* Bit 19: Command CRC Check Enable */ #define SDHCI_XFERTYP_CCCEN (1 << 19) /* Bit 19: Command CRC Check Enable */
#define SDHCI_XFERTYP_CICEN (1 << 20) /* Bit 20: Command Index Check Enable */ #define SDHCI_XFERTYP_CICEN (1 << 20) /* Bit 20: Command Index Check Enable */
#define SDHCI_XFERTYP_DPSEL (1 << 21) /* Bit 21: Data Present Select */ #define SDHCI_XFERTYP_DPSEL (1 << 21) /* Bit 21: Data Present Select */
#define SDHCI_XFERTYP_CMDTYP_SHIFT (22) /* Bits 22-23: Command Type */ #define SDHCI_XFERTYP_CMDTYP_SHIFT (22) /* Bits 22-23: Command Type */
#define SDHCI_XFERTYP_CMDTYP_MASK (3 << SDHCI_XFERTYP_CMDTYP_SHIFT) #define SDHCI_XFERTYP_CMDTYP_MASK (3 << SDHCI_XFERTYP_CMDTYP_SHIFT)
#define SDHCI_XFERTYP_CMDTYP_NORMAL (0 << SDHCI_XFERTYP_CMDTYP_SHIFT) /* Normal other commands */ #define SDHCI_XFERTYP_CMDTYP_NORMAL (0 << SDHCI_XFERTYP_CMDTYP_SHIFT) /* Normal other commands */
#define SDHCI_XFERTYP_CMDTYP_SUSPEND (1 << SDHCI_XFERTYP_CMDTYP_SHIFT) /* Suspend CMD52 for writing bus suspend in CCCR */ #define SDHCI_XFERTYP_CMDTYP_SUSPEND (1 << SDHCI_XFERTYP_CMDTYP_SHIFT) /* Suspend CMD52 for writing bus suspend in CCCR */
#define SDHCI_XFERTYP_CMDTYP_RESUME (2 << SDHCI_XFERTYP_CMDTYP_SHIFT) /* Resume CMD52 for writing function select in CCCR */ #define SDHCI_XFERTYP_CMDTYP_RESUME (2 << SDHCI_XFERTYP_CMDTYP_SHIFT) /* Resume CMD52 for writing function select in CCCR */
#define SDHCI_XFERTYP_CMDTYP_ABORT (3 << SDHCI_XFERTYP_CMDTYP_SHIFT) /* Abort CMD12, CMD52 for writing I/O abort in CCCR */ #define SDHCI_XFERTYP_CMDTYP_ABORT (3 << SDHCI_XFERTYP_CMDTYP_SHIFT) /* Abort CMD12, CMD52 for writing I/O abort in CCCR */
#define SDHCI_XFERTYP_CMDINX_SHIFT (24) /* Bits 24-29: Command Index */ #define SDHCI_XFERTYP_CMDINX_SHIFT (24) /* Bits 24-29: Command Index */
#define SDHCI_XFERTYP_CMDINX_MASK (63 << SDHCI_XFERTYP_CMDINX_SHIFT) #define SDHCI_XFERTYP_CMDINX_MASK (63 << SDHCI_XFERTYP_CMDINX_SHIFT)
/* Bits 30-31: Reserved */ /* Bits 30-31: Reserved */
@ -202,13 +205,17 @@ extern "C"
#define SDHCI_PROCTL_LCTL (1 << 0) /* Bit 0: LED Control */ #define SDHCI_PROCTL_LCTL (1 << 0) /* Bit 0: LED Control */
#define SDHCI_PROCTL_DTW_SHIFT (1) /* Bits 1-2: Data Transfer Width */ #define SDHCI_PROCTL_DTW_SHIFT (1) /* Bits 1-2: Data Transfer Width */
#define SDHCI_PROCTL_DTW_MASK (1 << SDHCI_PROCTL_DTW_SHIFT) #define SDHCI_PROCTL_DTW_MASK (1 << SDHCI_PROCTL_DTW_SHIFT)
#define SDHCI_PROCTL_DTW_1BIT (0 << SDHCI_PROCTL_DTW_SHIFT) /* 1-bit mode */ #define SDHCI_PROCTL_DTW_1BIT (0 << SDHCI_PROCTL_DTW_SHIFT) /* 1-bit mode */
#define SDHCI_PROCTL_DTW_4BIT (1 << SDHCI_PROCTL_DTW_SHIFT) /* 4-bit mode */ #define SDHCI_PROCTL_DTW_4BIT (1 << SDHCI_PROCTL_DTW_SHIFT) /* 4-bit mode */
#define SDHCI_PROCTL_DMAS_SHIFT (3) /* Bits 8-9: DMA Select */ #define SDHCI_PROCTL_DMAS_SHIFT (3) /* Bits 8-9: DMA Select */
#define SDHCI_PROCTL_DMAS_MASK (3 << SDHCI_PROCTL_DMAS_SHIFT) #define SDHCI_PROCTL_DMAS_MASK (3 << SDHCI_PROCTL_DMAS_SHIFT)
#define SDHCI_PROCTL_DMAS_NODMA (0 << SDHCI_PROCTL_DMAS_SHIFT) /* No DMA or simple DMA is selected */ #define SDHCI_PROCTL_DMAS_NODMA (0 << SDHCI_PROCTL_DMAS_SHIFT) /* No DMA or simple DMA is selected */
#define SDHCI_PROCTL_DMAS_ADMA2 (2 << SDHCI_PROCTL_DMAS_SHIFT) /* ADMA2 is selected */ #define SDHCI_PROCTL_DMAS_ADMA2 (2 << SDHCI_PROCTL_DMAS_SHIFT) /* ADMA2 is selected */
#define SDHCI_PROCTL_CDTL (1 << 6) /* Bit 6: Card Detect Test Level */ #define SDHCI_PROCTL_CDTL (1 << 6) /* Bit 6: Card Detect Test Level */
#define SDHCI_PROCTL_CDSS (1 << 7) /* Bit 7: Card Detect Signal Selection */ #define SDHCI_PROCTL_CDSS (1 << 7) /* Bit 7: Card Detect Signal Selection */
/* Bits 10-15: Reserved */ /* Bits 10-15: Reserved */
@ -237,13 +244,14 @@ extern "C"
#define SDHCI_SYSCTL_DTOCV_SHIFT (16) /* Bits 16-19: Data Timeout Counter Value */ #define SDHCI_SYSCTL_DTOCV_SHIFT (16) /* Bits 16-19: Data Timeout Counter Value */
#define SDHCI_SYSCTL_DTOCV_MASK (0xf << SDHCI_SYSCTL_DTOCV_SHIFT) #define SDHCI_SYSCTL_DTOCV_MASK (0xf << SDHCI_SYSCTL_DTOCV_SHIFT)
#define SDHCI_SYSCTL_DTOCV_MUL(n) (((n)-213) << SDHCI_SYSCTL_DTOCV_SHIFT) /* SDCLK x n, n=213..227 */ #define SDHCI_SYSCTL_DTOCV_MUL(n) (((n)-213) << SDHCI_SYSCTL_DTOCV_SHIFT) /* SDCLK x n, n=213..227 */
/* Bits 20-23: Reserved */ /* Bits 20-23: Reserved */
#define SDHCI_SYSCTL_RSTA (1 << 24) /* Bit 24: Software Reset For ALL */ #define SDHCI_SYSCTL_RSTA (1 << 24) /* Bit 24: Software Reset For ALL */
#define SDHCI_SYSCTL_RSTC (1 << 25) /* Bit 25: Software Reset For CMD Line */ #define SDHCI_SYSCTL_RSTC (1 << 25) /* Bit 25: Software Reset For CMD Line */
#define SDHCI_SYSCTL_RSTD (1 << 26) /* Bit 26: Software Reset For DAT Line */ #define SDHCI_SYSCTL_RSTD (1 << 26) /* Bit 26: Software Reset For DAT Line */
#define SDHCI_SYSCTL_INITA (1 << 27) /* Bit 27: Initialization Active */ #define SDHCI_SYSCTL_INITA (1 << 27) /* Bit 27: Initialization Active */
/* Bits 28-31: Reserved */ /* Bits 28-31: Reserved */
/* Interrupt Status Register, Interrupt Status Enable Register, /* Interrupt Status Register, Interrupt Status Enable Register,
* and Interrupt Signal Enable Register * and Interrupt Signal Enable Register
@ -294,8 +302,7 @@ extern "C"
/* Host Controller Capabilities */ /* Host Controller Capabilities */
/* Bits 0-15: Reserved */ /* Bits 0-15: Reserved */
#define SDHCI_HTCAPBLT_MBL_SHIFT (16) /* Bits 16-18: Max Block Length */ #define SDHCI_HTCAPBLT_MBL_SHIFT (16) /* Bits 16-18: Max Block Length */
#define SDHCI_HTCAPBLT_MBL_MASK (7 << SDHCI_HTCAPBLT_MBL_SHIFT) #define SDHCI_HTCAPBLT_MBL_MASK (7 << SDHCI_HTCAPBLT_MBL_SHIFT)
#define SDHCI_HTCAPBLT_MBL_512BYTES (0 << SDHCI_HTCAPBLT_MBL_SHIFT) #define SDHCI_HTCAPBLT_MBL_512BYTES (0 << SDHCI_HTCAPBLT_MBL_SHIFT)
@ -311,7 +318,7 @@ extern "C"
#define SDHCI_HTCAPBLT_VS33 (1 << 24) /* Bit 24: Voltage Support 3.3 V */ #define SDHCI_HTCAPBLT_VS33 (1 << 24) /* Bit 24: Voltage Support 3.3 V */
#define SDHCI_HTCAPBLT_VS30 (1 << 25) /* Bit 25: Voltage Support 3.0 V */ #define SDHCI_HTCAPBLT_VS30 (1 << 25) /* Bit 25: Voltage Support 3.0 V */
#define SDHCI_HTCAPBLT_VS18 (1 << 26) /* Bit 26: Voltage Support 1.8 */ #define SDHCI_HTCAPBLT_VS18 (1 << 26) /* Bit 26: Voltage Support 1.8 */
/* Bits 27-31: Reserved */ /* Bits 27-31: Reserved */
/* Force Event Register */ /* Force Event Register */
@ -350,6 +357,7 @@ extern "C"
#define SDHCI_ADMAES_FDS (1 << SDHCI_ADMAES_ADMAES_SHIFT) /* Fetch descriptor */ #define SDHCI_ADMAES_FDS (1 << SDHCI_ADMAES_ADMAES_SHIFT) /* Fetch descriptor */
#define SDHCI_ADMAES_CADR (2 << SDHCI_ADMAES_ADMAES_SHIFT) /* Change address */ #define SDHCI_ADMAES_CADR (2 << SDHCI_ADMAES_ADMAES_SHIFT) /* Change address */
#define SDHCI_ADMAES_TFR (3 << SDHCI_ADMAES_ADMAES_SHIFT) /* Transfer data */ #define SDHCI_ADMAES_TFR (3 << SDHCI_ADMAES_ADMAES_SHIFT) /* Transfer data */
#define SDHCI_ADMAES_LME (1 << 2) /* Bit 2: ADMA Length Mismatch Error */ #define SDHCI_ADMAES_LME (1 << 2) /* Bit 2: ADMA Length Mismatch Error */
#define SDHCI_ADMAES_DCE (1 << 3) /* Bit 3: ADMA Descriptor Error */ #define SDHCI_ADMAES_DCE (1 << 3) /* Bit 3: ADMA Descriptor Error */
/* Bits 4-31: Reserved */ /* Bits 4-31: Reserved */
@ -368,7 +376,7 @@ extern "C"
#define SDHCI_VENDOR_INTSTVAL_SHIFT (16) /* Bits 16-23: Internal State Value */ #define SDHCI_VENDOR_INTSTVAL_SHIFT (16) /* Bits 16-23: Internal State Value */
#define SDHCI_VENDOR_INTSTVAL_MASK (0xff << SDHCI_VENDOR_INTSTVAL_SHIFT) #define SDHCI_VENDOR_INTSTVAL_MASK (0xff << SDHCI_VENDOR_INTSTVAL_SHIFT)
/* Bits 24-31: Reserved */ /* Bits 24-31: Reserved */
/* User Define1 Control Register */ /* User Define1 Control Register */
@ -408,13 +416,14 @@ extern "C"
/**************************************************************************** /****************************************************************************
* Public Types * Public Types
****************************************************************************/ ****************************************************************************/
struct sdio_dev_s; struct sdio_dev_s;
/**************************************************************************** /****************************************************************************
* Public Data * Public Data
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
@ -466,6 +475,7 @@ FAR struct sdio_dev_s *cxd56_sdhci_finalize(int slotno);
* None * None
* *
****************************************************************************/ ****************************************************************************/
void cxd56_sdhci_mediachange(FAR struct sdio_dev_s *dev); void cxd56_sdhci_mediachange(FAR struct sdio_dev_s *dev);
/**************************************************************************** /****************************************************************************
@ -483,6 +493,7 @@ void cxd56_sdhci_mediachange(FAR struct sdio_dev_s *dev);
* None * None
* *
****************************************************************************/ ****************************************************************************/
void cxd56_sdhci_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect); void cxd56_sdhci_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect);
#undef EXTERN #undef EXTERN

19
arch/arm/src/cxd56xx/cxd56_serial.c
View File

@ -466,15 +466,16 @@ static void up_shutdown(FAR struct uart_dev_s *dev)
* Name: up_attach * Name: up_attach
* *
* Description: * Description:
* Configure the UART to operation in interrupt driven mode. This method is * Configure the UART to operation in interrupt driven mode.
* called when the serial port is opened. Normally, this is just after the * This method is called when the serial port is opened.
* the setup() method is called, however, the serial console may operate in * Normally, this is just after the the setup() method is called,
* a non-interrupt driven mode during the boot phase. * however, the serial console may operate in a non-interrupt driven mode
* during the boot phase.
* *
* RX and TX interrupts are not enabled when by the attach method (unless * RX and TX interrupts are not enabled when by the attach method (unless
* the hardware supports multiple levels of interrupt enabling). The RX and * the hardware supports multiple levels of interrupt enabling).
* TX interrupts are not enabled until the txint() and rxint() methods are * The RX and TX interrupts are not enabled until the txint() and rxint()
* called. * methods are called.
* *
****************************************************************************/ ****************************************************************************/
@ -503,8 +504,8 @@ static int up_attach(FAR struct uart_dev_s *dev)
* *
* Description: * Description:
* Detach UART interrupts. This method is called when the serial port is * Detach UART interrupts. This method is called when the serial port is
* closed normally just before the shutdown method is called. The exception * closed normally just before the shutdown method is called.
* is the serial console which is never shutdown. * The exception is the serial console which is never shutdown.
* *
****************************************************************************/ ****************************************************************************/

2
arch/arm/src/cxd56xx/cxd56_serial.h
View File

@ -60,7 +60,7 @@
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_CXD56_SERIAL_H */ #endif /* __ARCH_ARM_SRC_CXD56XX_CXD56_SERIAL_H */

32
arch/arm/src/cxd56xx/cxd56_sfc.c
View File

@ -33,6 +33,10 @@
* *
****************************************************************************/ ****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include <nuttx/arch.h> #include <nuttx/arch.h>
@ -49,6 +53,10 @@ int FM_RawVerifyWrite(uint32_t offset, const void *buf, uint32_t size);
int FM_RawRead(uint32_t offset, void *buf, uint32_t size); int FM_RawRead(uint32_t offset, void *buf, uint32_t size);
int FM_RawEraseSector(uint32_t sector); int FM_RawEraseSector(uint32_t sector);
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_CXD56_SPIFLASHSIZE #ifndef CONFIG_CXD56_SPIFLASHSIZE
# define CONFIG_CXD56_SPIFLASHSIZE (16 * 1024 * 1024) # define CONFIG_CXD56_SPIFLASHSIZE (16 * 1024 * 1024)
#endif #endif
@ -63,9 +71,8 @@ int FM_RawEraseSector(uint32_t sector);
#endif #endif
#define PAGE_SIZE (1 << PAGE_SHIFT) #define PAGE_SIZE (1 << PAGE_SHIFT)
/** /* Flash device information */
* Flash device information
*/
struct flash_controller_s struct flash_controller_s
{ {
struct mtd_dev_s mtd; /* MTD interface */ struct mtd_dev_s mtd; /* MTD interface */
@ -74,9 +81,14 @@ struct flash_controller_s
static struct flash_controller_s g_sfc; static struct flash_controller_s g_sfc;
/****************************************************************************
* Public Functions
****************************************************************************/
/**************************************************************************** /****************************************************************************
* Name: cxd56_erase * Name: cxd56_erase
****************************************************************************/ ****************************************************************************/
static int cxd56_erase(FAR struct mtd_dev_s *dev, off_t startblock, static int cxd56_erase(FAR struct mtd_dev_s *dev, off_t startblock,
size_t nblocks) size_t nblocks)
{ {
@ -94,6 +106,7 @@ static int cxd56_erase(FAR struct mtd_dev_s *dev, off_t startblock,
return ERROR; return ERROR;
} }
} }
return OK; return OK;
} }
@ -191,13 +204,14 @@ static int cxd56_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
finfo("cmd: GEOM\n"); finfo("cmd: GEOM\n");
if (geo) if (geo)
{ {
/* Populate the geometry structure with information need to know /* Populate the geometry structure with information need to
* the capacity and how to access the device. * know the capacity and how to access the device.
* *
* NOTE: that the device is treated as though it where just an * NOTE: that the device is treated as though it where just
* array of fixed size blocks. That is most likely not true, * an array of fixed size blocks.
* but the client will expect the device logic to do whatever is * That is most likely not true, but the client will expect
* necessary to make it appear so. * the device logic to do whatever is necessary to make it
* appear so.
*/ */
geo->blocksize = PAGE_SIZE; geo->blocksize = PAGE_SIZE;

6
arch/arm/src/cxd56xx/cxd56_sfc.h
View File

@ -37,7 +37,7 @@
#define __ARCH_ARM_SRC_CXD56XX_CXD56_SFC_H #define __ARCH_ARM_SRC_CXD56XX_CXD56_SFC_H
/**************************************************************************** /****************************************************************************
* include files * Included Files
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
@ -54,6 +54,10 @@ extern "C"
#define EXTERN extern #define EXTERN extern
#endif #endif
/****************************************************************************
* Public Functions Prototypes
****************************************************************************/
FAR struct mtd_dev_s *cxd56_sfc_initialize(void); FAR struct mtd_dev_s *cxd56_sfc_initialize(void);
#undef EXTERN #undef EXTERN

12
arch/arm/src/cxd56xx/cxd56_sph.h
View File

@ -36,8 +36,16 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_SPH_H #ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_SPH_H
#define __ARCH_ARM_SRC_CXD56XX_CXD56_SPH_H #define __ARCH_ARM_SRC_CXD56XX_CXD56_SPH_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <sys/ioctl.h> #include <sys/ioctl.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define _HSIOCVALID(c) (_IOC_TYPE(c)==0x7f00) #define _HSIOCVALID(c) (_IOC_TYPE(c)==0x7f00)
#define _HSIOC(nr) _IOC(0x7f00,nr) #define _HSIOC(nr) _IOC(0x7f00,nr)
@ -54,6 +62,10 @@ extern "C"
#define EXTERN extern #define EXTERN extern
#endif #endif
/****************************************************************************
* Public Function Protoypes
****************************************************************************/
int cxd56_sphinitialize(FAR const char *devname); int cxd56_sphinitialize(FAR const char *devname);
#undef EXTERN #undef EXTERN

30
arch/arm/src/cxd56xx/cxd56_spi.c
View File

@ -86,26 +86,26 @@
struct cxd56_spidev_s struct cxd56_spidev_s
{ {
struct spi_dev_s spidev; /* Externally visible part of the SPI interface */ struct spi_dev_s spidev; /* Externally visible part of the SPI interface */
uint32_t spibase; /* SPIn base address */ uint32_t spibase; /* SPIn base address */
uint32_t spibasefreq; uint32_t spibasefreq;
#ifdef CONFIG_CXD56_SPI_INTERRUPTS #ifdef CONFIG_CXD56_SPI_INTERRUPTS
uint8_t spiirq; /* SPI IRQ number */ uint8_t spiirq; /* SPI IRQ number */
#endif #endif
sem_t exclsem; /* Held while chip is selected for mutual exclusion */ sem_t exclsem; /* Held while chip is selected for mutual exclusion */
uint32_t frequency; /* Requested clock frequency */ uint32_t frequency; /* Requested clock frequency */
uint32_t actual; /* Actual clock frequency */ uint32_t actual; /* Actual clock frequency */
uint8_t nbits; /* Width of word in bits (4 to 16) */ uint8_t nbits; /* Width of word in bits (4 to 16) */
uint8_t mode; /* Mode 0,1,2,3 */ uint8_t mode; /* Mode 0,1,2,3 */
uint8_t port; /* Port number */ uint8_t port; /* Port number */
int initialized; /* Initialized flag */ int initialized; /* Initialized flag */
#ifdef CONFIG_CXD56_DMAC #ifdef CONFIG_CXD56_DMAC
bool dmaenable; /* Use DMA or not */ bool dmaenable; /* Use DMA or not */
DMA_HANDLE rxdmach; /* RX DMA channel handle */ DMA_HANDLE rxdmach; /* RX DMA channel handle */
DMA_HANDLE txdmach; /* TX DMA channel handle */ DMA_HANDLE txdmach; /* TX DMA channel handle */
sem_t dmasem; /* Wait for DMA to complete */ sem_t dmasem; /* Wait for DMA to complete */
dma_config_t rxconfig; /* RX DMA configuration */ dma_config_t rxconfig; /* RX DMA configuration */
dma_config_t txconfig; /* TX DMA configuration */ dma_config_t txconfig; /* TX DMA configuration */
#endif #endif
}; };

72
arch/arm/src/cxd56xx/cxd56_spi.h
View File

@ -58,7 +58,8 @@
/* This header file defines interfaces to common SPI logic. /* This header file defines interfaces to common SPI logic.
* To use this common SPI logic on your board: * To use this common SPI logic on your board:
* *
* 1. Provide logic in cxd56_boardinitialize() to configure SPI chip select pins. * 1. Provide logic in cxd56_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide cxd56_spi0/1select() and cxd56_spi0/1status() functions in your * 2. Provide cxd56_spi0/1select() and cxd56_spi0/1status() functions in your
* board-specific logic. These functions will perform chip selection * board-specific logic. These functions will perform chip selection
* and status operations using GPIOs in the way your board is configured. * and status operations using GPIOs in the way your board is configured.
@ -66,10 +67,12 @@
* cxd56_spi0/1cmddata() functions in your board-specific logic. These * cxd56_spi0/1cmddata() functions in your board-specific logic. These
* functions will perform cmd/data selection operations using GPIOs in the * functions will perform cmd/data selection operations using GPIOs in the
* way your board is configured. * way your board is configured.
* 4. Your low level board initialization logic should call cxd56_spibus_initialize. * 4. Your low level board initialization logic should call
* 5. The handle returned by cxd56_spibus_initialize() may then be used to bind the * cxd56_spibus_initialize.
* SPI driver to higher level logic (e.g., calling mmcsd_spislotinitialize(), * 5. The handle returned by cxd56_spibus_initialize() may then be used to
* for example, will bind the SPI driver to the SPI MMC/SD driver). * bind the SPI driver to higher level logic
* (e.g., calling mmcsd_spislotinitialize(), for example, will bind the
* SPI driver to the SPI MMC/SD driver).
*/ */
#define CXD56_SPI_DMAC_CHTYPE_TX (0) #define CXD56_SPI_DMAC_CHTYPE_TX (0)
@ -95,7 +98,7 @@ extern "C"
#endif #endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
@ -140,46 +143,67 @@ void cxd56_spi_dmaconfig(int port, int chtype, DMA_HANDLE handle,
* Name: cxd56_spiXselect, cxd56_spiXstatus, and cxd56_spiXcmddata * Name: cxd56_spiXselect, cxd56_spiXstatus, and cxd56_spiXcmddata
* *
* Description: * Description:
* These functions must be provided in your board-specific logic. The * These functions must be provided in your board-specific logic.
* cxd56_spi0/1select functions will perform chip selection and the * The cxd56_spi0/1select functions will perform chip selection and the
* cxd56_spi0/1status will perform status operations using GPIOs in the way your * cxd56_spi0/1status will perform status operations using GPIOs in
* board is configured. * the way your board is configured.
* *
* If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, then * If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, then
* cxd56_spi0/1cmddata must also be provided. This functions performs cmd/data * cxd56_spi0/1cmddata must also be provided.
* selection operations using GPIOs in the way your board is configured. * This functions performs cmd/data selection operations using GPIOs in
* the way your board is configured.
* *
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_CXD56_SPI0 #ifdef CONFIG_CXD56_SPI0
void cxd56_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected); void cxd56_spi0select(FAR struct spi_dev_s *dev,
uint8_t cxd56_spi0status(FAR struct spi_dev_s *dev, uint32_t devid); uint32_t devid,
bool selected);
uint8_t cxd56_spi0status(FAR struct spi_dev_s *dev,
uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA #ifdef CONFIG_SPI_CMDDATA
int cxd56_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); int cxd56_spi0cmddata(FAR struct spi_dev_s *dev,
uint32_t devid,
bool cmd);
#endif #endif
#endif #endif
#ifdef CONFIG_CXD56_SPI3 #ifdef CONFIG_CXD56_SPI3
void cxd56_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected); void cxd56_spi3select(FAR struct spi_dev_s *dev,
uint8_t cxd56_spi3status(FAR struct spi_dev_s *dev, uint32_t devid); uint32_t devid,
bool selected);
uint8_t cxd56_spi3status(FAR struct spi_dev_s *dev,
uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA #ifdef CONFIG_SPI_CMDDATA
int cxd56_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); int cxd56_spi3cmddata(FAR struct spi_dev_s *dev,
uint32_t devid,
bool cmd);
#endif #endif
#endif #endif
#ifdef CONFIG_CXD56_SPI4 #ifdef CONFIG_CXD56_SPI4
void cxd56_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected); void cxd56_spi4select(FAR struct spi_dev_s *dev,
uint8_t cxd56_spi4status(FAR struct spi_dev_s *dev, uint32_t devid); uint32_t devid,
bool selected);
uint8_t cxd56_spi4status(FAR struct spi_dev_s *dev,
uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA #ifdef CONFIG_SPI_CMDDATA
int cxd56_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); int cxd56_spi4cmddata(FAR struct spi_dev_s *dev,
uint32_t devid,
bool cmd);
#endif #endif
#endif #endif
#ifdef CONFIG_CXD56_SPI5 #ifdef CONFIG_CXD56_SPI5
void cxd56_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected); void cxd56_spi5select(FAR struct spi_dev_s *dev,
uint8_t cxd56_spi5status(FAR struct spi_dev_s *dev, uint32_t devid); uint32_t devid,
bool selected);
uint8_t cxd56_spi5status(FAR struct spi_dev_s *dev,
uint32_t devid);
#ifdef CONFIG_SPI_CMDDATA #ifdef CONFIG_SPI_CMDDATA
int cxd56_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); int cxd56_spi5cmddata(FAR struct spi_dev_s *dev,
uint32_t devid,
bool cmd);
#endif #endif
#endif #endif

11
arch/arm/src/cxd56xx/cxd56_start.c
View File

@ -44,11 +44,12 @@
* reset value of the shadow pointer is 0x1040:0000 so that on reset code in * reset value of the shadow pointer is 0x1040:0000 so that on reset code in
* the boot ROM is always executed first. * the boot ROM is always executed first.
* *
* The boot starts after reset is released. The IRC is selected as CPU clock * The boot starts after reset is released.
* and the Cortex-M4 starts the boot loader. By default the JTAG access to the * The IRC is selected as CPU clock and the Cortex-M4 starts the boot loader.
* chip is disabled at reset. The boot ROM determines the boot mode based on * By default the JTAG access to the chip is disabled at reset.
* the OTP BOOT_SRC value or reset state pins. For flash-based parts, * The boot ROM determines the boot mode based on the OTP BOOT_SRC value or
* the part boots from internal flash by default. * reset state pins.
* For flash-based parts, the part boots from internal flash by default.
* Otherwise, the boot ROM copies the image to internal SRAM at location * Otherwise, the boot ROM copies the image to internal SRAM at location
* 0x1000:0000, sets the ARM's shadow pointer to 0x1000:0000, * 0x1000:0000, sets the ARM's shadow pointer to 0x1000:0000,
* and jumps to that location. * and jumps to that location.

11
arch/arm/src/cxd56xx/cxd56_sysctl.h
View File

@ -138,17 +138,14 @@ typedef struct sysctl_unloadfwgp_s
} sysctl_unloadfwgp_t; } sysctl_unloadfwgp_t;
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**
* Initialize system control block /* Initialize system control block */
*/
void cxd56_sysctlinitialize(void); void cxd56_sysctlinitialize(void);
/** /* Send system control command */
* Send system control command
*/
int cxd56_sysctlcmd(uint8_t id, uint32_t data); int cxd56_sysctlcmd(uint8_t id, uint32_t data);

13
arch/arm/src/cxd56xx/cxd56_timer.c
View File

@ -90,6 +90,7 @@
/**************************************************************************** /****************************************************************************
* Private Types * Private Types
****************************************************************************/ ****************************************************************************/
/* This structure provides the private representation of the "lower-half" /* This structure provides the private representation of the "lower-half"
* driver state structure. This structure must be cast-compatible with the * driver state structure. This structure must be cast-compatible with the
* timer_lowerhalf_s structure. * timer_lowerhalf_s structure.
@ -217,8 +218,8 @@ static int cxd56_timer_interrupt(int irq, FAR void *context, FAR void *arg)
* Start the timer, resetting the time to the current timeout, * Start the timer, resetting the time to the current timeout,
* *
* Input Parameters: * Input Parameters:
* lower - A pointer the publicly visible representation of the "lower-half" * lower - A pointer the publicly visible representation of the
* driver state structure. * "lower-half" driver state structure.
* *
* Returned Values: * Returned Values:
* Zero on success; a negated errno value on failure. * Zero on success; a negated errno value on failure.
@ -267,8 +268,8 @@ static int cxd56_start(FAR struct timer_lowerhalf_s *lower)
* Stop the timer * Stop the timer
* *
* Input Parameters: * Input Parameters:
* lower - A pointer the publicly visible representation of the "lower-half" * lower - A pointer the publicly visible representation of the
* driver state structure. * "lower-half" driver state structure.
* *
* Returned Values: * Returned Values:
* Zero on success; a negated errno value on failure. * Zero on success; a negated errno value on failure.
@ -461,8 +462,8 @@ static void cxd56_setcallback(struct timer_lowerhalf_s *lower,
* are forwarded to the lower half driver through this method. * are forwarded to the lower half driver through this method.
* *
* Input Parameters: * Input Parameters:
* lower - A pointer the publicly visible representation of the "lower-half" * lower - A pointer the publicly visible representation of the
* driver state structure. * "lower-half" driver state structure.
* cmd - The ioctl command value * cmd - The ioctl command value
* arg - The optional argument that accompanies the 'cmd'. The * arg - The optional argument that accompanies the 'cmd'. The
* interpretation of this argument depends on the particular * interpretation of this argument depends on the particular

2
arch/arm/src/cxd56xx/cxd56_timer.h
View File

@ -64,7 +64,7 @@ extern "C"
#endif #endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************

41
arch/arm/src/cxd56xx/cxd56_timerisr.c
View File

@ -97,11 +97,12 @@ static int cxd56_changeclock(uint8_t id)
if (id == CXD56_PM_CALLBACK_ID_CLK_CHG_START) if (id == CXD56_PM_CALLBACK_ID_CLK_CHG_START)
{ {
flags = enter_critical_section(); flags = enter_critical_section();
{ {
systcsr = getreg32(NVIC_SYSTICK_CTRL); systcsr = getreg32(NVIC_SYSTICK_CTRL);
systcsr &= ~NVIC_SYSTICK_CTRL_ENABLE; systcsr &= ~NVIC_SYSTICK_CTRL_ENABLE;
putreg32(systcsr, NVIC_SYSTICK_CTRL); putreg32(systcsr, NVIC_SYSTICK_CTRL);
} }
leave_critical_section(flags); leave_critical_section(flags);
} }
else if ((id == CXD56_PM_CALLBACK_ID_CLK_CHG_END) || else if ((id == CXD56_PM_CALLBACK_ID_CLK_CHG_END) ||
@ -110,20 +111,22 @@ static int cxd56_changeclock(uint8_t id)
current = (cxd56_get_cpu_baseclk() / CLK_TCK) - 1; current = (cxd56_get_cpu_baseclk() / CLK_TCK) - 1;
flags = enter_critical_section(); flags = enter_critical_section();
{ {
if (g_systrvr != current) if (g_systrvr != current)
{ {
putreg32(current, NVIC_SYSTICK_RELOAD); putreg32(current, NVIC_SYSTICK_RELOAD);
g_systrvr = current; g_systrvr = current;
putreg32(0, NVIC_SYSTICK_CURRENT); putreg32(0, NVIC_SYSTICK_CURRENT);
} }
if (id == CXD56_PM_CALLBACK_ID_CLK_CHG_END)
{ if (id == CXD56_PM_CALLBACK_ID_CLK_CHG_END)
systcsr = getreg32(NVIC_SYSTICK_CTRL); {
systcsr |= NVIC_SYSTICK_CTRL_ENABLE; systcsr = getreg32(NVIC_SYSTICK_CTRL);
putreg32(systcsr, NVIC_SYSTICK_CTRL); systcsr |= NVIC_SYSTICK_CTRL_ENABLE;
} putreg32(systcsr, NVIC_SYSTICK_CTRL);
} }
}
leave_critical_section(flags); leave_critical_section(flags);
} }

2
arch/arm/src/cxd56xx/cxd56_timerisr.h
View File

@ -66,7 +66,7 @@ extern "C"
#endif #endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************

18
arch/arm/src/cxd56xx/cxd56_uart.c
View File

@ -307,6 +307,7 @@ static int cxd56_uart_clockchange(uint8_t id)
{ {
return -1; /* don't restart if processing data in rxfifo */ return -1; /* don't restart if processing data in rxfifo */
} }
cxd56_uart_stop(ch); cxd56_uart_stop(ch);
cxd56_uart_start(ch); cxd56_uart_start(ch);
break; break;
@ -314,6 +315,7 @@ static int cxd56_uart_clockchange(uint8_t id)
default: default:
break; break;
} }
#endif #endif
return 0; return 0;
} }
@ -387,14 +389,14 @@ void cxd56_lowsetup(void)
/* Configure the console (only) */ /* Configure the console (only) */
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
{ {
uint32_t val; uint32_t val;
val = getreg32(CONSOLE_BASE + CXD56_UART_CR); val = getreg32(CONSOLE_BASE + CXD56_UART_CR);
if (val & UART_CR_EN) if (val & UART_CR_EN)
{ {
return; return;
} }
} }
putreg32(CONSOLE_LCR_VALUE, CONSOLE_BASE + CXD56_UART_LCR_H); putreg32(CONSOLE_LCR_VALUE, CONSOLE_BASE + CXD56_UART_LCR_H);
cxd56_setbaud(CONSOLE_BASE, CONSOLE_BASEFREQ, CONSOLE_BAUD); cxd56_setbaud(CONSOLE_BASE, CONSOLE_BASEFREQ, CONSOLE_BAUD);

2
arch/arm/src/cxd56xx/cxd56_uart.h
View File

@ -70,7 +70,7 @@ extern "C"
#endif #endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************

1
arch/arm/src/cxd56xx/cxd56_uart0.c
View File

@ -278,6 +278,7 @@ static ssize_t uart0_write(FAR struct file *filep,
set_errno(-ret); set_errno(-ret);
ret = 0; ret = 0;
} }
return (ssize_t)ret; return (ssize_t)ret;
} }

22
arch/arm/src/cxd56xx/cxd56_udmac.h
View File

@ -38,6 +38,10 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_UDMAC_H #ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_UDMAC_H
#define __ARCH_ARM_SRC_CXD56XX_CXD56_UDMAC_H #define __ARCH_ARM_SRC_CXD56XX_CXD56_UDMAC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdint.h> #include <stdint.h>
#include "cxd56_dmac_common.h" #include "cxd56_dmac_common.h"
@ -56,17 +60,17 @@
* - Memory address is always incremented. * - Memory address is always incremented.
*/ */
#define CXD56_UDMA_XFERSIZE_SHIFT (10) /* Bits 10-11: Transfer size */ #define CXD56_UDMA_XFERSIZE_SHIFT (10) /* Bits 10-11: Transfer size */
#define CXD56_UDMA_XFERSIZE_MASK (3 << CXD56_UDMA_XFERSIZE_SHIFT) #define CXD56_UDMA_XFERSIZE_MASK (3 << CXD56_UDMA_XFERSIZE_SHIFT)
#define CXD56_UDMA_XFERSIZE_BYTE (0 << CXD56_UDMA_XFERSIZE_SHIFT) #define CXD56_UDMA_XFERSIZE_BYTE (0 << CXD56_UDMA_XFERSIZE_SHIFT)
#define CXD56_UDMA_XFERSIZE_HWORD (1 << CXD56_UDMA_XFERSIZE_SHIFT) #define CXD56_UDMA_XFERSIZE_HWORD (1 << CXD56_UDMA_XFERSIZE_SHIFT)
#define CXD56_UDMA_XFERSIZE_WORD (2 << CXD56_UDMA_XFERSIZE_SHIFT) #define CXD56_UDMA_XFERSIZE_WORD (2 << CXD56_UDMA_XFERSIZE_SHIFT)
#define CXD56_UDMA_SINGLE_MASK (1 << 12) /* Bit 12: Single or Buffer full request */ #define CXD56_UDMA_SINGLE_MASK (1 << 12) /* Bit 12: Single or Buffer full request */
#define CXD56_UDMA_SINGLE (1 << 12) /* 1=Buffer full request */ #define CXD56_UDMA_SINGLE (1 << 12) /* 1=Buffer full request */
#define CXD56_UDMA_BUFFER_FULL (0) /* 0=Buffer full request */ #define CXD56_UDMA_BUFFER_FULL (0) /* 0=Buffer full request */
#define CXD56_UDMA_MEMINCR_MASK (1 << 13) /* Bit 13: Increment memory address */ #define CXD56_UDMA_MEMINCR_MASK (1 << 13) /* Bit 13: Increment memory address */
#define CXD56_UDMA_MEMINCR (1 << 13) /* 1=Increment memory address */ #define CXD56_UDMA_MEMINCR (1 << 13) /* 1=Increment memory address */
#define CXD56_UDMA_NOINCR (0) /* 0=No memory address increment */ #define CXD56_UDMA_NOINCR (0) /* 0=No memory address increment */
@ -144,10 +148,12 @@ DMA_HANDLE cxd56_udmachannel(void);
* Name: cxd56_udmafree * Name: cxd56_udmafree
* *
* Description: * Description:
* Release a DMA channel. If another thread is waiting for this DMA * Release a DMA channel.
* channel in a call to cxd56_udmachannel, then this function will re-assign * If another thread is waiting for this DMA channel in a call to
* the DMA channel to that thread and wake it up. * cxd56_udmachannel, then this function will re-assign the DMA channel to
* NOTE: The 'handle' used in this argument must NEVER be used again until * that thread and wake it up.
* NOTE:
* The 'handle' used in this argument must NEVER be used again until
* cxd56_udmachannel() is called again to re-gain access to the channel. * cxd56_udmachannel() is called again to re-gain access to the channel.
* *
* Returned Value: * Returned Value:

2
arch/arm/src/cxd56xx/cxd56_uid.h
View File

@ -45,7 +45,7 @@
#include <stdint.h> #include <stdint.h>
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
void cxd56_get_uniqueid(uint8_t uniqueid[]); void cxd56_get_uniqueid(uint8_t uniqueid[]);

513
arch/arm/src/cxd56xx/cxd56_usbdev.c
View File

@ -115,7 +115,7 @@
# define __aligned(x) __attribute__((aligned(x))) # define __aligned(x) __attribute__((aligned(x)))
#endif #endif
/* Debug **********************************************************************/ /* Debug ********************************************************************/
/* Trace error codes */ /* Trace error codes */
@ -254,7 +254,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
}; };
#endif #endif
/* Hardware interface **********************************************************/ /* Hardware interface *******************************************************/
/* The CXD56 hardware supports 8 configurable endpoints EP1-4, IN and OUT /* The CXD56 hardware supports 8 configurable endpoints EP1-4, IN and OUT
* (in addition to EP0 IN and OUT). This driver, however, does not exploit * (in addition to EP0 IN and OUT). This driver, however, does not exploit
@ -282,7 +282,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
#define CXD56_EPBULKOUT1 5 /* Bulk EP for recv to host */ #define CXD56_EPBULKOUT1 5 /* Bulk EP for recv to host */
#define CXD56_EPINTRIN1 6 /* Intr EP for host poll */ #define CXD56_EPINTRIN1 6 /* Intr EP for host poll */
/* Request queue operations ****************************************************/ /* Request queue operations *************************************************/
#define cxd56_rqempty(ep) ((ep)->head == NULL) #define cxd56_rqempty(ep) ((ep)->head == NULL)
#define cxd56_rqpeek(ep) ((ep)->head) #define cxd56_rqpeek(ep) ((ep)->head)
@ -440,7 +440,8 @@ static struct pm_cpu_wakelock_s g_wake_lock =
/* Request queue operations *************************************************/ /* Request queue operations *************************************************/
static FAR struct cxd56_req_s *cxd56_rqdequeue(FAR struct cxd56_ep_s *privep); static FAR struct cxd56_req_s *cxd56_rqdequeue(
FAR struct cxd56_ep_s *privep);
static void cxd56_rqenqueue(FAR struct cxd56_ep_s *privep, static void cxd56_rqenqueue(FAR struct cxd56_ep_s *privep,
FAR struct cxd56_req_s *req); FAR struct cxd56_req_s *req);
@ -936,6 +937,7 @@ static int cxd56_wrrequest(FAR struct cxd56_ep_s *privep)
{ {
usbtrace(TRACE_DEVERROR(CXD56_TRACEERR_NULLPACKET), 0); usbtrace(TRACE_DEVERROR(CXD56_TRACEERR_NULLPACKET), 0);
} }
return OK; return OK;
} }
@ -1302,7 +1304,10 @@ static inline void cxd56_ep0setup(FAR struct cxd56_usbdev_s *priv)
{ {
case USB_REQ_GETSTATUS: case USB_REQ_GETSTATUS:
{ {
/* type: device-to-host; recipient = device, interface, endpoint /* type: device-to-host;
* recipient = device,
* interface,
* endpoint
* value: 0 * value: 0
* index: zero interface endpoint * index: zero interface endpoint
* len: 2; data = status * len: 2; data = status
@ -1323,13 +1328,15 @@ static inline void cxd56_ep0setup(FAR struct cxd56_usbdev_s *priv)
{ {
case USB_REQ_RECIPIENT_ENDPOINT: case USB_REQ_RECIPIENT_ENDPOINT:
{ {
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_GETENDPOINT), usbtrace(TRACE_INTDECODE(
CXD56_TRACEINTID_GETENDPOINT),
0); 0);
privep = cxd56_epfindbyaddr(priv, index); privep = cxd56_epfindbyaddr(priv, index);
if (!privep) if (!privep)
{ {
usbtrace( usbtrace(
TRACE_DEVERROR(CXD56_TRACEERR_STALLEDGETSTEP), TRACE_DEVERROR(
CXD56_TRACEERR_STALLEDGETSTEP),
priv->ctrl.type); priv->ctrl.type);
priv->stalled = 1; priv->stalled = 1;
} }
@ -1338,13 +1345,15 @@ static inline void cxd56_ep0setup(FAR struct cxd56_usbdev_s *priv)
case USB_REQ_RECIPIENT_DEVICE: case USB_REQ_RECIPIENT_DEVICE:
case USB_REQ_RECIPIENT_INTERFACE: case USB_REQ_RECIPIENT_INTERFACE:
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_GETIFDEV), usbtrace(TRACE_INTDECODE(
CXD56_TRACEINTID_GETIFDEV),
0); 0);
break; break;
default: default:
{ {
usbtrace(TRACE_DEVERROR(CXD56_TRACEERR_STALLEDGETSTRECIP), usbtrace(TRACE_DEVERROR(
CXD56_TRACEERR_STALLEDGETSTRECIP),
priv->ctrl.type); priv->ctrl.type);
priv->stalled = 1; priv->stalled = 1;
} }
@ -1356,7 +1365,9 @@ static inline void cxd56_ep0setup(FAR struct cxd56_usbdev_s *priv)
case USB_REQ_CLEARFEATURE: case USB_REQ_CLEARFEATURE:
{ {
/* type: host-to device; recipient = device, interface or endpoint /* type: host-to device;
* recipient = device,
* interface or endpoint
* value: feature selector * value: feature selector
* index: zero interface endpoint; * index: zero interface endpoint;
* len: zero, data = none * len: zero, data = none
@ -1389,7 +1400,10 @@ static inline void cxd56_ep0setup(FAR struct cxd56_usbdev_s *priv)
case USB_REQ_SETFEATURE: case USB_REQ_SETFEATURE:
{ {
/* type: host-to-device; recipient = device, interface, endpoint /* type: host-to-device;
* recipient = device,
* interface,
* endpoint
* value: feature selector * value: feature selector
* index: zero interface endpoint; * index: zero interface endpoint;
* len: 0; data = none * len: 0; data = none
@ -1399,7 +1413,8 @@ static inline void cxd56_ep0setup(FAR struct cxd56_usbdev_s *priv)
if (priv->ctrl.type == USB_REQ_RECIPIENT_DEVICE && if (priv->ctrl.type == USB_REQ_RECIPIENT_DEVICE &&
value == USB_FEATURE_TESTMODE) value == USB_FEATURE_TESTMODE)
{ {
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TESTMODE), index); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TESTMODE),
index);
} }
else if (priv->ctrl.type != USB_REQ_RECIPIENT_ENDPOINT) else if (priv->ctrl.type != USB_REQ_RECIPIENT_ENDPOINT)
{ {
@ -1438,16 +1453,19 @@ static inline void cxd56_ep0setup(FAR struct cxd56_usbdev_s *priv)
* index: 0 or language ID; * index: 0 or language ID;
* len: descriptor len; data = descriptor * len: descriptor len; data = descriptor
*/ */
case USB_REQ_SETDESCRIPTOR: case USB_REQ_SETDESCRIPTOR:
/* type: host-to-device; recipient = device /* type: host-to-device; recipient = device
* value: descriptor type and index * value: descriptor type and index
* index: 0 or language ID; * index: 0 or language ID;
* len: descriptor len; data = descriptor * len: descriptor len; data = descriptor
*/ */
{ {
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_GETSETDESC), 0); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_GETSETDESC), 0);
cxd56_dispatchrequest(priv); cxd56_dispatchrequest(priv);
} }
break; break;
case USB_REQ_GETCONFIGURATION: case USB_REQ_GETCONFIGURATION:
@ -1456,28 +1474,33 @@ static inline void cxd56_ep0setup(FAR struct cxd56_usbdev_s *priv)
* index: 0; * index: 0;
* len: 1; data = configuration value * len: 1; data = configuration value
*/ */
case USB_REQ_SETCONFIGURATION: case USB_REQ_SETCONFIGURATION:
/* type: host-to-device; recipient = device /* type: host-to-device; recipient = device
* value: configuration value * value: configuration value
* index: 0; * index: 0;
* len: 0; data = none * len: 0; data = none
*/ */
case USB_REQ_GETINTERFACE: case USB_REQ_GETINTERFACE:
/* type: device-to-host; recipient = interface /* type: device-to-host; recipient = interface
* value: 0 * value: 0
* index: interface; * index: interface;
* len: 1; data = alt interface * len: 1; data = alt interface
*/ */
case USB_REQ_SETINTERFACE: case USB_REQ_SETINTERFACE:
/* type: host-to-device; recipient = interface /* type: host-to-device; recipient = interface
* value: alternate setting * value: alternate setting
* index: interface; * index: interface;
* len: 0; data = none * len: 0; data = none
*/ */
{ {
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_GETSETIFCONFIG), 0); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_GETSETIFCONFIG), 0);
cxd56_dispatchrequest(priv); cxd56_dispatchrequest(priv);
} }
break; break;
case USB_REQ_SYNCHFRAME: case USB_REQ_SYNCHFRAME:
@ -1532,263 +1555,271 @@ static int cxd56_epinterrupt(int irq, FAR void *context)
int n; int n;
eps = getreg32(CXD56_USB_DEV_EP_INTR); eps = getreg32(CXD56_USB_DEV_EP_INTR);
{ {
for (n = 0; n < CXD56_NENDPOINTS; n++) for (n = 0; n < CXD56_NENDPOINTS; n++)
{ {
/* Determine IN endpoint interrupts */ /* Determine IN endpoint interrupts */
privep = &priv->eplist[n]; privep = &priv->eplist[n];
if (eps & (1 << n)) if (eps & (1 << n))
{ {
stat = getreg32(CXD56_USB_IN_EP_STATUS(n)); stat = getreg32(CXD56_USB_IN_EP_STATUS(n));
if (stat & USB_INT_RCS) if (stat & USB_INT_RCS)
{ {
/* Handle Clear_Feature */ /* Handle Clear_Feature */
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_CLEARFEATURE), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_CLEARFEATURE),
ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(n)); n);
putreg32(ctrl | USB_F, CXD56_USB_IN_EP_CONTROL(n)); ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(n));
putreg32(ctrl | USB_CNAK, CXD56_USB_IN_EP_CONTROL(n)); putreg32(ctrl | USB_F, CXD56_USB_IN_EP_CONTROL(n));
ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(n)); putreg32(ctrl | USB_CNAK, CXD56_USB_IN_EP_CONTROL(n));
putreg32(USB_INT_RCS, CXD56_USB_IN_EP_STATUS(n)); ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(n));
putreg32(USB_INT_RCS, CXD56_USB_IN_EP_STATUS(n));
privep->stalled = 0; privep->stalled = 0;
privep->halted = 0; privep->halted = 0;
} }
if (stat & USB_INT_RSS) if (stat & USB_INT_RSS)
{ {
/* Handle Set_Feature */ /* Handle Set_Feature */
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_SETFEATURE), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_SETFEATURE), n);
putreg32(USB_INT_RSS, CXD56_USB_IN_EP_STATUS(n)); putreg32(USB_INT_RSS, CXD56_USB_IN_EP_STATUS(n));
privep->halted = 1; privep->halted = 1;
} }
if (stat & USB_INT_TXEMPTY) if (stat & USB_INT_TXEMPTY)
{ {
/* Transmit FIFO Empty detected */ /* Transmit FIFO Empty detected */
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TXEMPTY), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TXEMPTY), n);
putreg32(USB_INT_TXEMPTY, CXD56_USB_IN_EP_STATUS(n)); putreg32(USB_INT_TXEMPTY, CXD56_USB_IN_EP_STATUS(n));
} }
if (stat & USB_INT_TDC) if (stat & USB_INT_TDC)
{ {
/* DMA Transmit complete for TxFIFO */ /* DMA Transmit complete for TxFIFO */
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TDC), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TDC), n);
putreg32(USB_INT_TDC, CXD56_USB_IN_EP_STATUS(n)); putreg32(USB_INT_TDC, CXD56_USB_IN_EP_STATUS(n));
} }
if (stat & USB_INT_XFERDONE) if (stat & USB_INT_XFERDONE)
{ {
/* Transfer Done/Transmit FIFO Empty */ /* Transfer Done/Transmit FIFO Empty */
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_XFERDONE), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_XFERDONE), n);
/* Set NAK during processing IN request completion */ /* Set NAK during processing IN request completion */
ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(n)); ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(n));
putreg32(ctrl | USB_SNAK, CXD56_USB_IN_EP_CONTROL(n)); putreg32(ctrl | USB_SNAK, CXD56_USB_IN_EP_CONTROL(n));
putreg32(USB_INT_XFERDONE, CXD56_USB_IN_EP_STATUS(n)); putreg32(USB_INT_XFERDONE, CXD56_USB_IN_EP_STATUS(n));
cxd56_txdmacomplete(privep); cxd56_txdmacomplete(privep);
/* Clear NAK to raise IN interrupt for send next IN packets */ /* Clear NAK to raise IN interrupt for send next IN packets */
putreg32(ctrl | USB_CNAK, CXD56_USB_IN_EP_CONTROL(n)); putreg32(ctrl | USB_CNAK, CXD56_USB_IN_EP_CONTROL(n));
} }
if (stat & USB_INT_IN) if (stat & USB_INT_IN)
{ {
/* Reply NAK for IN token when TxFIFO empty */ /* Reply NAK for IN token when TxFIFO empty */
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_IN), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_IN), n);
ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(n)); ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(n));
putreg32(ctrl | USB_SNAK, CXD56_USB_IN_EP_CONTROL(n)); putreg32(ctrl | USB_SNAK, CXD56_USB_IN_EP_CONTROL(n));
/* If IN request is ready, then send it. */ /* If IN request is ready, then send it. */
if (!cxd56_rqempty(privep)) if (!cxd56_rqempty(privep))
{ {
cxd56_wrrequest(privep); cxd56_wrrequest(privep);
} }
else else
{ {
privep->txwait = 1; privep->txwait = 1;
} }
putreg32(USB_INT_IN, CXD56_USB_IN_EP_STATUS(n)); putreg32(USB_INT_IN, CXD56_USB_IN_EP_STATUS(n));
} }
if (stat & USB_INT_HE) if (stat & USB_INT_HE)
{ {
/* Detect AHB Bus error */ /* Detect AHB Bus error */
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TXDMAERROR), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TXDMAERROR), n);
putreg32(USB_INT_HE, CXD56_USB_IN_EP_STATUS(n)); putreg32(USB_INT_HE, CXD56_USB_IN_EP_STATUS(n));
} }
if (stat & USB_INT_BNA) if (stat & USB_INT_BNA)
{ {
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TXBNA), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_TXBNA), n);
putreg32(USB_INT_BNA, CXD56_USB_IN_EP_STATUS(n)); putreg32(USB_INT_BNA, CXD56_USB_IN_EP_STATUS(n));
} }
putreg32(1 << n, CXD56_USB_DEV_EP_INTR);
}
/* Determine OUT endpoint interrupts */ putreg32(1 << n, CXD56_USB_DEV_EP_INTR);
}
if (eps & (1 << (n + 16))) /* Determine OUT endpoint interrupts */
{
stat = getreg32(CXD56_USB_OUT_EP_STATUS(n));
if (USB_INT_OUT(stat) == USB_INT_OUT_SETUP) if (eps & (1 << (n + 16)))
{ {
putreg32(USB_INT_OUT_SETUP, CXD56_USB_OUT_EP_STATUS(n)); stat = getreg32(CXD56_USB_OUT_EP_STATUS(n));
if (n == 0)
{
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_OUTSETUP), 0);
ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(0)); if (USB_INT_OUT(stat) == USB_INT_OUT_SETUP)
putreg32(ctrl | USB_SNAK, CXD56_USB_OUT_EP_CONTROL(0)); {
putreg32(USB_INT_OUT_SETUP, CXD56_USB_OUT_EP_STATUS(n));
if (n == 0)
{
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_OUTSETUP),
0);
cxd56_ep0setup(priv); ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(0));
putreg32(ctrl | USB_SNAK, CXD56_USB_OUT_EP_CONTROL(0));
putreg32(ctrl | USB_CNAK | USB_RRDY, cxd56_ep0setup(priv);
CXD56_USB_OUT_EP_CONTROL(0));
ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(0)); putreg32(ctrl | USB_CNAK | USB_RRDY,
putreg32(ctrl | USB_CNAK, CXD56_USB_IN_EP_CONTROL(0)); CXD56_USB_OUT_EP_CONTROL(0));
}
}
if (USB_INT_OUT(stat) == USB_INT_OUT_DATA) ctrl = getreg32(CXD56_USB_IN_EP_CONTROL(0));
{ putreg32(ctrl | USB_CNAK, CXD56_USB_IN_EP_CONTROL(0));
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_OUTDATA), n); }
putreg32(USB_INT_OUT_DATA, CXD56_USB_OUT_EP_STATUS(n)); }
if (n == 0)
{
len = g_ep0out.status & DESC_SIZE_MASK;
/* Reset DMA descriptor for next packet */ if (USB_INT_OUT(stat) == USB_INT_OUT_DATA)
{
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_OUTDATA), n);
putreg32(USB_INT_OUT_DATA, CXD56_USB_OUT_EP_STATUS(n));
if (n == 0)
{
len = g_ep0out.status & DESC_SIZE_MASK;
g_ep0out.status = privep->ep.maxpacket | DESC_LAST; /* Reset DMA descriptor for next packet */
if (0 < len) g_ep0out.status = privep->ep.maxpacket | DESC_LAST;
{
ASSERT(priv->ep0datlen + len <= sizeof(priv->ep0data));
memcpy(priv->ep0data + priv->ep0datlen, if (0 < len)
(const void *)g_ep0out.buf, {
len); ASSERT(priv->ep0datlen + len <=
sizeof(priv->ep0data));
priv->ep0datlen += len; memcpy(priv->ep0data + priv->ep0datlen,
} (const void *)g_ep0out.buf,
len);
/* Dispatch to cxd56_ep0setup if received all OUT data */ priv->ep0datlen += len;
}
if (priv->ep0datlen == priv->ep0reqlen) /* Dispatch to cxd56_ep0setup if received all OUT data */
{
if (((priv->ctrl.type & USB_REQ_TYPE_MASK) !=
USB_REQ_TYPE_STANDARD) &&
USB_REQ_ISOUT(priv->ctrl.type))
{
/* Ready to receive the next setup packet */
ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(0)); if (priv->ep0datlen == priv->ep0reqlen)
putreg32(ctrl | USB_SNAK | USB_RRDY, {
CXD56_USB_OUT_EP_CONTROL(0)); if (((priv->ctrl.type & USB_REQ_TYPE_MASK) !=
USB_REQ_TYPE_STANDARD) &&
USB_REQ_ISOUT(priv->ctrl.type))
{
/* Ready to receive the next setup packet */
cxd56_ep0setup(priv); ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(0));
priv->ep0datlen = 0; putreg32(ctrl | USB_SNAK | USB_RRDY,
} CXD56_USB_OUT_EP_CONTROL(0));
}
else
{
/* Ready to receive the next OUT packet */
ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(0)); cxd56_ep0setup(priv);
putreg32(ctrl | USB_CNAK | USB_RRDY, priv->ep0datlen = 0;
CXD56_USB_OUT_EP_CONTROL(0)); }
} }
} else
else {
{ /* Ready to receive the next OUT packet */
cxd56_rxdmacomplete(privep);
}
}
if (stat & USB_INT_CDC_CLEAR) ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(0));
{ putreg32(ctrl | USB_CNAK | USB_RRDY,
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_CDCCLEAR), n); CXD56_USB_OUT_EP_CONTROL(0));
putreg32(USB_INT_CDC_CLEAR, CXD56_USB_OUT_EP_STATUS(n)); }
} }
else
{
cxd56_rxdmacomplete(privep);
}
}
if (stat & USB_INT_RSS) if (stat & USB_INT_CDC_CLEAR)
{ {
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_SETFEATURE), n); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_CDCCLEAR), n);
ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(0)); putreg32(USB_INT_CDC_CLEAR, CXD56_USB_OUT_EP_STATUS(n));
putreg32(USB_INT_RSS, CXD56_USB_OUT_EP_STATUS(n)); }
privep->halted = 1;
}
if (stat & USB_INT_RCS) if (stat & USB_INT_RSS)
{ {
uint32_t status; usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_SETFEATURE), n);
ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(0));
putreg32(USB_INT_RSS, CXD56_USB_OUT_EP_STATUS(n));
privep->halted = 1;
}
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_CLEARFEATURE), n); if (stat & USB_INT_RCS)
{
uint32_t status;
ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(n)); usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_CLEARFEATURE),
n);
/* Make sure that want the DMA transfer stopped. */ ctrl = getreg32(CXD56_USB_OUT_EP_CONTROL(n));
/* The S bit needs to be clear by hand */ /* Make sure that want the DMA transfer stopped. */
ctrl &= ~USB_STALL; /* The S bit needs to be clear by hand */
putreg32(ctrl | USB_CLOSEDESC, CXD56_USB_OUT_EP_CONTROL(n)); ctrl &= ~USB_STALL;
do
{
status = getreg32(CXD56_USB_OUT_EP_STATUS(n));
}
while (!(status & USB_INT_CDC_CLEAR));
putreg32(USB_INT_CDC_CLEAR, CXD56_USB_OUT_EP_STATUS(n));
if (!(stat & USB_INT_MRXFIFOEMPTY)) putreg32(ctrl | USB_CLOSEDESC,
{ CXD56_USB_OUT_EP_CONTROL(n));
/* Flush Receive FIFO and clear NAK to finish status stage */ do
{
status = getreg32(CXD56_USB_OUT_EP_STATUS(n));
}
while (!(status & USB_INT_CDC_CLEAR));
putreg32(USB_INT_CDC_CLEAR, CXD56_USB_OUT_EP_STATUS(n));
putreg32(ctrl | USB_MRXFLUSH, CXD56_USB_OUT_EP_CONTROL(n)); if (!(stat & USB_INT_MRXFIFOEMPTY))
} {
putreg32(ctrl | USB_CNAK, CXD56_USB_OUT_EP_CONTROL(n)); /* Flush Receive FIFO and clear NAK to finish status stage */
putreg32(USB_INT_RCS, CXD56_USB_OUT_EP_STATUS(n));
privep->stalled = 0;
privep->halted = 0;
}
if (stat & USB_INT_HE) putreg32(ctrl | USB_MRXFLUSH,
{ CXD56_USB_OUT_EP_CONTROL(n));
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_RXDMAERROR), n); }
putreg32(USB_INT_HE, CXD56_USB_OUT_EP_STATUS(n));
}
if (stat & USB_INT_BNA) putreg32(ctrl | USB_CNAK, CXD56_USB_OUT_EP_CONTROL(n));
{ putreg32(USB_INT_RCS, CXD56_USB_OUT_EP_STATUS(n));
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_RXBNA), n); privep->stalled = 0;
cxd56_rdrequest(privep); privep->halted = 0;
putreg32(USB_INT_BNA, CXD56_USB_OUT_EP_STATUS(n)); }
}
putreg32(1 << (n + 16), CXD56_USB_DEV_EP_INTR); if (stat & USB_INT_HE)
} {
} usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_RXDMAERROR), n);
} putreg32(USB_INT_HE, CXD56_USB_OUT_EP_STATUS(n));
}
if (stat & USB_INT_BNA)
{
usbtrace(TRACE_INTDECODE(CXD56_TRACEINTID_RXBNA), n);
cxd56_rdrequest(privep);
putreg32(USB_INT_BNA, CXD56_USB_OUT_EP_STATUS(n));
}
putreg32(1 << (n + 16), CXD56_USB_DEV_EP_INTR);
}
}
}
return OK; return OK;
} }
@ -1848,6 +1879,7 @@ static int cxd56_usbinterrupt(int irq, FAR void *context, FAR void *arg)
priv->usbdev.speed = USB_SPEED_FULL; priv->usbdev.speed = USB_SPEED_FULL;
config |= USB_CONFIG_FS; config |= USB_CONFIG_FS;
} }
putreg32(config, CXD56_USB_DEV_CONFIG); putreg32(config, CXD56_USB_DEV_CONFIG);
} }
@ -1914,6 +1946,7 @@ static int cxd56_usbinterrupt(int irq, FAR void *context, FAR void *arg)
USB_REQ_SETINTERFACE); USB_REQ_SETINTERFACE);
g_usbdev.stalled = 1; g_usbdev.stalled = 1;
} }
putreg32(getreg32(CXD56_USB_DEV_CONTROL) | USB_CTRL_CSR_DONE, putreg32(getreg32(CXD56_USB_DEV_CONTROL) | USB_CTRL_CSR_DONE,
CXD56_USB_DEV_CONTROL); CXD56_USB_DEV_CONTROL);
} }
@ -1935,6 +1968,7 @@ static int cxd56_usbinterrupt(int irq, FAR void *context, FAR void *arg)
USB_REQ_SETCONFIGURATION); USB_REQ_SETCONFIGURATION);
g_usbdev.stalled = 1; g_usbdev.stalled = 1;
} }
putreg32(getreg32(CXD56_USB_DEV_CONTROL) | USB_CTRL_CSR_DONE, putreg32(getreg32(CXD56_USB_DEV_CONTROL) | USB_CTRL_CSR_DONE,
CXD56_USB_DEV_CONTROL); CXD56_USB_DEV_CONTROL);
} }
@ -2079,6 +2113,7 @@ static void cxd56_usbdevreset(FAR struct cxd56_usbdev_s *priv)
uinfo("usb reset timeout.\n"); uinfo("usb reset timeout.\n");
break; break;
} }
up_mdelay(1); up_mdelay(1);
} }
@ -2095,6 +2130,7 @@ static void cxd56_usbdevreset(FAR struct cxd56_usbdev_s *priv)
uinfo("intr mask register timeout.\n"); uinfo("intr mask register timeout.\n");
break; break;
} }
up_mdelay(1); up_mdelay(1);
} }
@ -2128,7 +2164,8 @@ static void cxd56_usbdevreset(FAR struct cxd56_usbdev_s *priv)
putreg32(stat, CXD56_USB_OUT_EP_STATUS(i)); putreg32(stat, CXD56_USB_OUT_EP_STATUS(i));
putreg32(info->maxpacket | ((info->bufsize / 4) << 16), putreg32(info->maxpacket | ((info->bufsize / 4) << 16),
CXD56_USB_OUT_EP_BUFSIZE(i)); CXD56_USB_OUT_EP_BUFSIZE(i));
putreg32(USB_ET(info->attr) | USB_SNAK, CXD56_USB_OUT_EP_CONTROL(i)); putreg32(USB_ET(info->attr) | USB_SNAK,
CXD56_USB_OUT_EP_CONTROL(i));
} }
} }
@ -2255,6 +2292,7 @@ static int cxd56_epdisable(FAR struct usbdev_ep_s *ep)
usbtrace(TRACE_DEVERROR(CXD56_TRACEERR_INVALIDPARMS), 0); usbtrace(TRACE_DEVERROR(CXD56_TRACEERR_INVALIDPARMS), 0);
return -EINVAL; return -EINVAL;
} }
#endif #endif
usbtrace(TRACE_EPDISABLE, privep->epphy); usbtrace(TRACE_EPDISABLE, privep->epphy);
uinfo("EP%d\n", ((FAR struct cxd56_ep_s *)ep)->epphy); uinfo("EP%d\n", ((FAR struct cxd56_ep_s *)ep)->epphy);
@ -2285,6 +2323,7 @@ static FAR struct usbdev_req_s *cxd56_epallocreq(FAR struct usbdev_ep_s *ep)
{ {
return NULL; return NULL;
} }
#endif #endif
usbtrace(TRACE_EPALLOCREQ, ((FAR struct cxd56_ep_s *)ep)->epphy); usbtrace(TRACE_EPALLOCREQ, ((FAR struct cxd56_ep_s *)ep)->epphy);
@ -2333,7 +2372,8 @@ static void cxd56_epfreereq(FAR struct usbdev_ep_s *ep,
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_USBDEV_DMA #ifdef CONFIG_USBDEV_DMA
static FAR void *cxd56_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16_t bytes) static FAR void *cxd56_epallocbuffer(FAR struct usbdev_ep_s *ep,
uint16_t bytes)
{ {
FAR struct cxd56_ep_s *privep = (FAR struct cxd56_ep_s *)ep; FAR struct cxd56_ep_s *privep = (FAR struct cxd56_ep_s *)ep;
@ -2388,6 +2428,7 @@ static int cxd56_epsubmit(FAR struct usbdev_ep_s *ep,
usbtrace(TRACE_DEVERROR(CXD56_TRACEERR_INVALIDPARMS), 0); usbtrace(TRACE_DEVERROR(CXD56_TRACEERR_INVALIDPARMS), 0);
return -EINVAL; return -EINVAL;
} }
#endif #endif
usbtrace(TRACE_EPSUBMIT, privep->epphy); usbtrace(TRACE_EPSUBMIT, privep->epphy);
priv = privep->dev; priv = privep->dev;
@ -2418,9 +2459,9 @@ static int cxd56_epsubmit(FAR struct usbdev_ep_s *ep,
{ {
cxd56_rqenqueue(privep, privreq); cxd56_rqenqueue(privep, privreq);
/* SetConfiguration and SetInterface are handled by hardware, USB device IP /* SetConfiguration and SetInterface are handled by hardware,
* a utomatically returns NULL packet to host, so I drop this request and * USB device IP automatically returns NULL packet to host, so I drop
* indicate complete to upper driver. * this request and indicate complete to upper driver.
*/ */
if (priv->ctrl.req == USB_REQ_SETCONFIGURATION || if (priv->ctrl.req == USB_REQ_SETCONFIGURATION ||
@ -2602,6 +2643,7 @@ static int cxd56_allocepbuffer(FAR struct cxd56_ep_s *privep)
putreg32((uint32_t)(uintptr_t)privep->desc, putreg32((uint32_t)(uintptr_t)privep->desc,
CXD56_USB_OUT_EP_DATADESC(privep->epphy)); CXD56_USB_OUT_EP_DATADESC(privep->epphy));
} }
return 0; return 0;
} }
@ -2638,12 +2680,15 @@ static void cxd56_freeepbuffer(FAR struct cxd56_ep_s *privep)
* Allocate an endpoint matching the parameters * Allocate an endpoint matching the parameters
* *
* Input Parameters: * Input Parameters:
* eplog - 7-bit logical endpoint number (direction bit ignored). Zero means * eplog - 7-bit logical endpoint number (direction bit ignored).
* that any endpoint matching the other requirements will suffice. The * Zero means that any endpoint matching the other requirements
* assigned endpoint can be found in the eplog field. * will suffice. The assigned endpoint can be found in the eplog
* field.
* in - true: IN (device-to-host) endpoint requested * in - true: IN (device-to-host) endpoint requested
* eptype - Endpoint type. One of {USB_EP_ATTR_XFER_ISOC, USB_EP_ATTR_XFER_BULK, * eptype - Endpoint type.
* USB_EP_ATTR_XFER_INT} * One of {USB_EP_ATTR_XFER_ISOC,
* USB_EP_ATTR_XFER_BULK,
* USB_EP_ATTR_XFER_INT}
* *
****************************************************************************/ ****************************************************************************/
@ -2731,7 +2776,8 @@ static FAR struct usbdev_ep_s *cxd56_allocep(FAR struct usbdev_s *dev,
* *
****************************************************************************/ ****************************************************************************/
static void cxd56_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) static void cxd56_freeep(FAR struct usbdev_s *dev,
FAR struct usbdev_ep_s *ep)
{ {
FAR struct cxd56_ep_s *privep = (FAR struct cxd56_ep_s *)ep; FAR struct cxd56_ep_s *privep = (FAR struct cxd56_ep_s *)ep;
FAR struct cxd56_usbdev_s *pdev = privep->dev; FAR struct cxd56_usbdev_s *pdev = privep->dev;
@ -3143,14 +3189,14 @@ void up_usbuninitialize(void)
priv->pid = 0; priv->pid = 0;
} }
/************************************************************************************ /****************************************************************************
* Name: usbdevclass_register * Name: usbdevclass_register
* *
* Description: * Description:
* Register a USB device class driver. The class driver's bind() method will be * Register a USB device class driver. The class driver's bind() method
* called to bind it to a USB device driver. * will be called to bind it to a USB device driver.
* *
************************************************************************************/ ****************************************************************************/
int usbdev_register(FAR struct usbdevclass_driver_s *driver) int usbdev_register(FAR struct usbdevclass_driver_s *driver)
{ {
@ -3199,15 +3245,16 @@ int usbdev_register(FAR struct usbdevclass_driver_s *driver)
return OK; return OK;
} }
/************************************************************************************ /****************************************************************************
* Name: usbdev_unregister * Name: usbdev_unregister
* *
* Description: * Description:
* Un-register usbdev class driver.If the USB device is connected to a USB * Un-register usbdev class driver.If the USB device is connected to a USB
* host, it will first disconnect(). The driver is also requested to unbind() * host, it will first disconnect(). The driver is also requested to
* and clean up any device state, before this procedure finally returns. * unbind() and clean up any device state, before this procedure finally
* returns.
* *
************************************************************************************/ ****************************************************************************/
int usbdev_unregister(FAR struct usbdevclass_driver_s *driver) int usbdev_unregister(FAR struct usbdevclass_driver_s *driver)
{ {
@ -3256,14 +3303,14 @@ int usbdev_unregister(FAR struct usbdevclass_driver_s *driver)
return OK; return OK;
} }
/************************************************************************************ /****************************************************************************
* Name: cxd56_usbreset * Name: cxd56_usbreset
* *
* Description: * Description:
* Reinitialize the endpoint and restore the EP configuration * Reinitialize the endpoint and restore the EP configuration
* before disconnecting the host. Then start the Configuration again. * before disconnecting the host. Then start the Configuration again.
* *
************************************************************************************/ ****************************************************************************/
static void cxd56_usbreset(FAR struct cxd56_usbdev_s *priv) static void cxd56_usbreset(FAR struct cxd56_usbdev_s *priv)
{ {
@ -3445,7 +3492,8 @@ static ssize_t cxd56_usbdev_read(FAR struct file *filep, FAR char *buffer,
/* Transfer the system up time to user receive buffer */ /* Transfer the system up time to user receive buffer */
offset = filep->f_pos; offset = filep->f_pos;
ret = procfs_memcpy(attr->line, attr->linesize, buffer, buflen, &offset); ret = procfs_memcpy(attr->line, attr->linesize,
buffer, buflen, &offset);
/* Update the file offset */ /* Update the file offset */
@ -3461,7 +3509,8 @@ static ssize_t cxd56_usbdev_read(FAR struct file *filep, FAR char *buffer,
* Name: cxd56_usbdev_dup * Name: cxd56_usbdev_dup
****************************************************************************/ ****************************************************************************/
static int cxd56_usbdev_dup(FAR const struct file *oldp, FAR struct file *newp) static int cxd56_usbdev_dup(FAR const struct file *oldp,
FAR struct file *newp)
{ {
FAR struct cxd56_usbdev_file_s *oldattr; FAR struct cxd56_usbdev_file_s *oldattr;
FAR struct cxd56_usbdev_file_s *newattr; FAR struct cxd56_usbdev_file_s *newattr;

28
arch/arm/src/cxd56xx/cxd56_wdt.c
View File

@ -76,6 +76,7 @@
/**************************************************************************** /****************************************************************************
* Private Types * Private Types
****************************************************************************/ ****************************************************************************/
/* This structure provides the private representation of the "lower-half" /* This structure provides the private representation of the "lower-half"
* driver state structure. This structure must be cast-compatible with the * driver state structure. This structure must be cast-compatible with the
* well-known watchdog_lowerhalf_s structure. * well-known watchdog_lowerhalf_s structure.
@ -175,8 +176,8 @@ static uint32_t cxd56_getreg(uintptr_t regaddr)
uint32_t regval = getreg32(regaddr); uint32_t regval = getreg32(regaddr);
/* Is this the same value that we read from the same register last time? Are /* Is this the same value that we read from the same register last time?
* we polling the register? If so, suppress some of the output. * Are we polling the register? If so, suppress some of the output.
*/ */
if (regaddr == prevaddr && regval == preval) if (regaddr == prevaddr && regval == preval)
@ -282,8 +283,8 @@ static int cxd56_wdtinterrupt(int irq, FAR void *context, FAR void *arg)
* Start the watchdog timer, resetting the time to the current timeout, * Start the watchdog timer, resetting the time to the current timeout,
* *
* Input Parameters: * Input Parameters:
* lower - A pointer the publicly visible representation of the "lower-half" * lower - A pointer the publicly visible representation of the
* driver state structure. * "lower-half" driver state structure.
* *
* Returned Values: * Returned Values:
* Zero on success; a negated errno value on failure. * Zero on success; a negated errno value on failure.
@ -311,8 +312,8 @@ static int cxd56_start(FAR struct watchdog_lowerhalf_s *lower)
* Stop the watchdog timer * Stop the watchdog timer
* *
* Input Parameters: * Input Parameters:
* lower - A pointer the publicly visible representation of the "lower-half" * lower - A pointer the publicly visible representation of the
* driver state structure. * "lower-half" driver state structure.
* *
* Returned Values: * Returned Values:
* Zero on success; a negated errno value on failure. * Zero on success; a negated errno value on failure.
@ -339,8 +340,8 @@ static int cxd56_stop(FAR struct watchdog_lowerhalf_s *lower)
* the atchdog timer or "petting the dog". * the atchdog timer or "petting the dog".
* *
* Input Parameters: * Input Parameters:
* lower - A pointer the publicly visible representation of the "lower-half" * lower - A pointer the publicly visible representation of the
* driver state structure. * "lower-half" driver state structure.
* *
* Returned Values: * Returned Values:
* Zero on success; a negated errno value on failure. * Zero on success; a negated errno value on failure.
@ -568,8 +569,8 @@ static xcpt_t cxd56_capture(FAR struct watchdog_lowerhalf_s *lower,
* are forwarded to the lower half driver through this method. * are forwarded to the lower half driver through this method.
* *
* Input Parameters: * Input Parameters:
* lower - A pointer the publicly visible representation of the "lower-half" * lower - A pointer the publicly visible representation of the
* driver state structure. * "lower-half" driver state structure.
* cmd - The ioctol command value * cmd - The ioctol command value
* arg - The optional argument that accompanies the 'cmd'. The * arg - The optional argument that accompanies the 'cmd'. The
* interpretation of this argument depends on the particular * interpretation of this argument depends on the particular
@ -619,9 +620,9 @@ static int cxd56_pm_event(uint8_t id)
case CXD56_PM_CALLBACK_ID_CLK_CHG_END: case CXD56_PM_CALLBACK_ID_CLK_CHG_END:
case CXD56_PM_CALLBACK_ID_HOT_BOOT: case CXD56_PM_CALLBACK_ID_HOT_BOOT:
/* If watchdog has been already running before the clock is changed or /* If watchdog has been already running before the clock is changed
* entering in hot sleep , re-start the watchdog timer with a timeout * or entering in hot sleep, re-start the watchdog timer with a
* value based on the new watchdog timer clock. * timeout value based on the new watchdog timer clock.
*/ */
if (priv->started) if (priv->started)
@ -634,6 +635,7 @@ static int cxd56_pm_event(uint8_t id)
default: default:
break; break;
} }
return 0; return 0;
} }

2
arch/arm/src/cxd56xx/cxd56_wdt.h
View File

@ -61,7 +61,7 @@ extern "C"
#endif #endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************