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arch/arm/src/stm32/stm32_dfumode.c: Will work only for STM32 F2 and F4.

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This commit is contained in:
Gregory Nutt 2019-03-21 14:41:03 -06:00
parent 65bd5472c5
commit 4049f690af
2 changed files with 9 additions and 3 deletions
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10
arch/arm/src/stm32/stm32_dfumode.c
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@ -58,14 +58,17 @@
* *
* https://community.st.com/s/question/0D50X00009XkhAzSAJ/calling-stm32429ieval-bootloader * https://community.st.com/s/question/0D50X00009XkhAzSAJ/calling-stm32429ieval-bootloader
* *
* REVISIT: STM32_SYSMEM_BASE is not 0x1fff000 for all STM32's. Fof F3's * REVISIT: STM32_SYSMEM_BASE is not 0x1fff000 for all STM32's. For F3's
* The SYSMEM base is at 0x1fffd800 * The SYSMEM base is at 0x1fffd800
* *
* REVISIT: RCC_APB2ENR_SYSCFGEN is not bit bit 14 for all STM32's. For * REVISIT: RCC_APB2ENR_SYSCFGEN is not bit 14 for all STM32's. For F3's
* F3's and L15's, it is bit 0. * and L15's, it is bit 0.
*
* REVISIT: STM32 F3's do not support the SYSCFG_MEMRMP register.
* *
****************************************************************************/ ****************************************************************************/
#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
void stm32_dfumode(void) void stm32_dfumode(void)
{ {
#ifdef CONFIG_DEBUG_WARN #ifdef CONFIG_DEBUG_WARN
@ -86,3 +89,4 @@ void stm32_dfumode(void)
__builtin_unreachable(); /* Tell compiler we will not return */ __builtin_unreachable(); /* Tell compiler we will not return */
} }
#endif /* CONFIG_STM32_STM32F20XX || CONFIG_STM32_STM32F4XXX */

2
arch/arm/src/stm32/stm32_dfumode.h
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@ -56,6 +56,8 @@
* *
****************************************************************************/ ****************************************************************************/
#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
void stm32_dfumode(void) noreturn_function; void stm32_dfumode(void) noreturn_function;
#endif
#endif /* __ARCH_ARM_SRC_STM32_DFUMODE_H */ #endif /* __ARCH_ARM_SRC_STM32_DFUMODE_H */