STM32L4 DAC: Added basic support for low level operations
This commit is contained in:
Daniel P. Carvalho
Xiang Xiao
parent
7e6b4f6e07
commit
40e6c8dca4
@ -5473,6 +5473,12 @@ config STM32L4_DAC2_OUTPUT_ADC
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---help---
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Route DAC2 output to ADC input instead of external pin.
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config STM32L4_DAC_LL_OPS
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bool "DAC low-level operations"
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default n
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---help---
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Enable low-level DAC ops.
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endmenu
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menu "DFSDM Configuration"
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@ -305,6 +305,9 @@ struct stm32_dac_s
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struct stm32_chan_s
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{
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#ifdef CONFIG_STM32L4_DAC_LL_OPS
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const struct stm32_dac_ops_s *llops; /* Low-level DAC ops */
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#endif
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uint8_t inuse : 1; /* True, the driver is in use and not available */
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#ifdef HAVE_DMA
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uint8_t hasdma : 1; /* True, this channel supports DMA */
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@ -333,6 +336,9 @@ struct stm32_chan_s
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/* DAC Register access */
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static uint32_t dac_getreg(struct stm32_chan_s *priv, int offset);
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static void dac_dumpregs(struct stm32_chan_s *priv);
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#ifdef HAVE_DMA
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static inline void tim_putreg(struct stm32_chan_s *chan, int offset,
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uint32_t value);
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@ -357,6 +363,16 @@ static int dac_timinit(struct stm32_chan_s *chan);
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static int dac_chaninit(struct stm32_chan_s *chan);
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static void dac_blockinit(void);
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#ifdef CONFIG_STM32L4_DAC_LL_OPS
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static void dac_llops_enable(struct stm32_dac_dev_s *dev, bool enabled);
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static void dac_llops_writedro(struct stm32_dac_dev_s *dev, uint16_t data);
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#ifdef HAVE_DMA
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static void dac_llops_startdma(struct stm32_dac_dev_s *dev);
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static void dac_llops_stopdma(struct stm32_dac_dev_s *dev);
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#endif
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static void dac_llops_dumpregs(struct stm32_dac_dev_s *dev);
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#endif /* CONFIG_STM32L4_DAC_LL_OPS */
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/****************************************************************************
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* Private Data
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****************************************************************************/
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@ -371,6 +387,21 @@ static const struct dac_ops_s g_dacops =
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.ao_ioctl = dac_ioctl,
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};
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/* Publicly visible DAC lower-half operations */
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#ifdef CONFIG_STM32L4_DAC_LL_OPS
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static const struct stm32_dac_ops_s g_dac_llops =
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{
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.enable = dac_llops_enable,
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.write_dro = dac_llops_writedro,
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#ifdef HAVE_DMA
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.start_dma = dac_llops_startdma,
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.stop_dma = dac_llops_stopdma,
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#endif
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.dump_regs = dac_llops_dumpregs
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};
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#endif /* CONFIG_STM32L4_DAC_LL_OPS */
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#ifdef CONFIG_STM32L4_DAC1
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/* Channel 1 */
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@ -380,6 +411,9 @@ uint16_t stm32l4_dac1_dmabuffer[CONFIG_STM32L4_DAC1_DMA_BUFFER_SIZE];
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static struct stm32_chan_s g_dac1priv =
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{
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#ifdef CONFIG_STM32L4_DAC_LL_OPS
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.llops = &g_dac_llops,
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#endif
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.intf = 0,
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#ifdef CONFIG_STM32L4_DAC1_OUTPUT_ADC
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.pin = 0xffffffffu,
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@ -417,6 +451,9 @@ uint16_t stm32l4_dac2_dmabuffer[CONFIG_STM32L4_DAC2_DMA_BUFFER_SIZE];
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static struct stm32_chan_s g_dac2priv =
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{
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#ifdef CONFIG_STM32L4_DAC_LL_OPS
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.llops = &g_dac_llops,
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#endif
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.intf = 1,
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#ifdef CONFIG_STM32L4_DAC2_OUTPUT_ADC
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.pin = 0xffffffffu,
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@ -451,6 +488,26 @@ static struct stm32_dac_s g_dacblock;
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: dac_getreg
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*
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* Description:
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* Read the value of an DAC register.
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*
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* Input Parameters:
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* priv - A reference to the DAC block status
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* offset - The offset to the register to read
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*
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* Returned Value:
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* The current contents of the specified register
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*
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****************************************************************************/
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static uint32_t dac_getreg(struct stm32_chan_s *priv, int offset)
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{
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return getreg32(STM32L4_DAC_BASE + offset);
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}
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/****************************************************************************
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* Name: stm32l4_dac_modify_cr
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*
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@ -519,6 +576,22 @@ static inline void stm32l4_dac_modify_mcr(struct stm32_chan_s *chan,
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modifyreg32(STM32L4_DAC_MCR, clearbits << shift, setbits << shift);
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}
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/****************************************************************************
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* Name: dac_dumpregs
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****************************************************************************/
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static void dac_dumpregs(struct stm32_chan_s *priv)
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{
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UNUSED(priv);
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ainfo("CR: 0x%08" PRIx32 " SWTRGR: 0x%08" PRIx32
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"SR: 0x%08" PRIx32 " MCR: 0x%08" PRIx32 "\n",
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dac_getreg(priv, STM32L4_DAC_CR_OFFSET),
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dac_getreg(priv, STM32L4_DAC_SWTRIGR_OFFSET),
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dac_getreg(priv, STM32L4_DAC_SR_OFFSET),
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dac_getreg(priv, STM32L4_DAC_MCR_OFFSET));
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}
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/****************************************************************************
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* Name: tim_putreg
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*
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@ -1140,6 +1213,112 @@ static void dac_blockinit(void)
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g_dacblock.init = 1;
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}
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#ifdef CONFIG_STM32L4_DAC_LL_OPS
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/****************************************************************************
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* Name: dac_llops_enable
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****************************************************************************/
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static void dac_llops_enable(struct stm32_dac_dev_s *dev, bool enabled)
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{
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struct stm32_chan_s *priv = (struct stm32_chan_s *)dev;
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/* Enable/disable DAC Channel */
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if (enabled)
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{
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stm32l4_dac_modify_cr(priv, 0, DAC_CR_EN);
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}
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else
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{
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stm32l4_dac_modify_cr(priv, DAC_CR_EN, 0);
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}
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}
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/****************************************************************************
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* Name: dac_llops_writedro
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****************************************************************************/
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static void dac_llops_writedro(struct stm32_dac_dev_s *dev, uint16_t data)
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{
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struct stm32_chan_s *priv = (struct stm32_chan_s *)dev;
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putreg16(data, priv->dro);
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}
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/****************************************************************************
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* Name: dac_llops_startdma
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****************************************************************************/
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#ifdef HAVE_DMA
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static void dac_llops_startdma(struct stm32_dac_dev_s *dev)
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{
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struct stm32_chan_s *priv = (struct stm32_chan_s *)dev;
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/* Configure the DMA stream/channel.
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*
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* - Channel number
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* - Peripheral address
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* - Direction: Memory to peripheral
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* - Disable peripheral address increment
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* - Enable memory address increment
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* - Peripheral data size: half word
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* - Mode: circular???
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* - Priority: ?
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* - FIFO mode: disable
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* - FIFO threshold: half full
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* - Memory Burst: single
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* - Peripheral Burst: single
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*/
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stm32l4_dmasetup(priv->dma, priv->dro, (uint32_t)priv->dmabuffer,
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priv->buffer_len, DAC_DMA_CONTROL_WORD);
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/* Start the DMA */
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priv->result = -EBUSY;
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stm32l4_dmastart(priv->dma, dac_dmatxcallback, priv, false);
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/* Enable DMA for DAC Channel */
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stm32l4_dac_modify_cr(priv, 0, DAC_CR_DMAEN);
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/* Reset counters (generate an update) */
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tim_modifyreg(priv, STM32L4_GTIM_EGR_OFFSET, 0, GTIM_EGR_UG);
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}
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/****************************************************************************
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* Name: dac_llops_stopdma
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****************************************************************************/
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static void dac_llops_stopdma(struct stm32_dac_dev_s *dev)
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{
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struct stm32_chan_s *priv = (struct stm32_chan_s *)dev;
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/* Stop the DMA */
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priv->result = -EBUSY;
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stm32l4_dmastop(priv->dma);
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/* Enable DMA for DAC Channel */
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stm32l4_dac_modify_cr(priv, 0, DAC_CR_DMAEN);
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}
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#endif
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/****************************************************************************
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* Name: adc_llops_dumpregs
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****************************************************************************/
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static void dac_llops_dumpregs(struct stm32_dac_dev_s *dev)
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{
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struct stm32_chan_s *priv = (struct stm32_chan_s *)dev;
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dac_dumpregs(priv);
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}
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#endif /* CONFIG_STM32L4_DAC_LL_OPS */
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -78,6 +78,65 @@
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# undef CONFIG_STM32L4_TIM17_DAC
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#endif
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/* Low-level ops helpers ****************************************************/
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#define DAC_ENABLE(dac,d) \
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(dac)->llops->enable(dac,d)
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#define DAC_WRITE_DRO(dac,d) \
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(dac)->llops->write_dro(dac,d)
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#define DAC_START_DMA(dac) \
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(dac)->llops->start_dma(dac)
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#define DAC_STOP_DMA(dac) \
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(dac)->llops->stop_dma(dac)
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#define DAC_DUMP_REGS(dac) \
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(dac)->llops->dump_regs(dac)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifdef CONFIG_STM32L4_DAC_LL_OPS
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/* This structure provides the publicly visible representation of the
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* "lower-half" DAC driver structure.
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*/
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struct stm32_dac_dev_s
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{
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/* Publicly visible portion of the "lower-half" ADC driver structure */
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const struct stm32_dac_ops_s *llops;
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/* Require cast-compatibility with private "lower-half" ADC structure */
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};
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/* Low-level operations for DAC */
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struct stm32_dac_ops_s
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{
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/* Enable / Disable DAC */
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void (*enable)(struct stm32_dac_dev_s *dev, bool enabled);
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/* Write DRO */
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void (*write_dro)(struct stm32_dac_dev_s *dev, uint16_t data);
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/* Start DMA */
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void (*start_dma)(struct stm32_dac_dev_s *dev);
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/* Stop DMA */
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void (*stop_dma)(struct stm32_dac_dev_s *dev);
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/* Dump DAC regs */
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void (*dump_regs)(struct stm32_dac_dev_s *dev);
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};
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#endif /* CONFIG_STM32L4_DAC_LL_OPS */
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/****************************************************************************
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* Public Data
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****************************************************************************/
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