Trivial updates assocaited with USB host mass storage and SAMA5 EHCI
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@ -2415,9 +2415,33 @@ static int sam_qh_ioccheck(struct sam_qh_s *qh, uint32_t **bp, void *arg)
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{
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/* An error occurred */
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udbg("ERROR: EP%d TOKEN=%08x", epinfo->epno, token);
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epinfo->status = (token & QH_TOKEN_STATUS_MASK) >> QH_TOKEN_STATUS_SHIFT;
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epinfo->result = -EIO;
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/* The HALT condition is set on a variety of conditions: babble, error
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* counter countdown to zero, or a STALL. If we can rule out babble
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* (babble bit not set) and if the error counter is non-zero, then we can
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* assume a STALL. In this case, we return -PERM to inform the class
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* driver of the stall condition.
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*/
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if ((token & (QH_TOKEN_BABBLE | QH_TOKEN_HALTED)) == QH_TOKEN_HALTED &&
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(token & QH_TOKEN_CERR_MASK) != 0)
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{
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/* It is a stall, Note the that the data toggle is reset
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* after the stall.
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*/
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udbg("EP%d Stalled: TOKEN=%08x\n", epinfo->epno, token);
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epinfo->result = -EPERM;
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epinfo->toggle = 0;
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}
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else
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{
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/* Otherwise, it is some kind of data transfer error */
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udbg("ERROR: EP%d TOKEN=%08x\n", epinfo->epno, token);
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epinfo->result = -EIO;
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}
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}
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/* Is there a thread waiting for this transfer to complete? */
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@ -3921,7 +3945,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
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{
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irqstate_t flags;
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uint32_t regval;
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#ifdef CONFIG_DEBUG_USB
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#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
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uint16_t regval16;
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unsigned int nports;
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#endif
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@ -4152,7 +4176,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
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sam_putreg(ECHI_INT_ALLINTS, &HCOR->usbsts);
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#ifdef CONFIG_DEBUG
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#if defined(CONFIG_DEBUG_USB) && defined(CONFIG_DEBUG_VERBOSE)
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/* Show the ECHI version */
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regval16 = sam_swap16(HCCR->hciversion);
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@ -102,8 +102,9 @@
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#define USBHOST_BOUTFOUND 0x04
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#define USBHOST_ALLFOUND 0x07
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#define USBHOST_MAX_RETRIES 100
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#define USBHOST_MAX_CREFS 0x7fff
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#define USBHOST_RETRY_USEC (50*1000) /* Retry each 50 milliseconds */
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#define USBHOST_MAX_RETRIES 100 /* Give up after 5 seconds */
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#define USBHOST_MAX_CREFS INT16_MAX /* Max cref count before signed overflow */
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/****************************************************************************
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* Private Types
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@ -700,6 +701,7 @@ static inline int usbhost_maxlunreq(FAR struct usbhost_state_s *priv)
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*(priv->tbuffer) = 0;
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}
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return OK;
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}
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@ -1218,9 +1220,12 @@ static inline int usbhost_initvolume(FAR struct usbhost_state_s *priv)
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/* Wait just a bit */
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usleep(50*1000);
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usleep(USBHOST_RETRY_USEC);
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/* Send TESTUNITREADY to see if the unit is ready */
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/* Send TESTUNITREADY to see if the unit is ready. The most likely error
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* error that can occur here is a a stall which simply means that the
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* the device is not yet able to respond.
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*/
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ret = usbhost_testunitready(priv);
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if (ret == OK)
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@ -579,7 +579,7 @@
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# define QTD_TOKEN_DBERR (1 << 5) /* Bit 5 Data Buffer Error */
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# define QTD_TOKEN_HALTED (1 << 6) /* Bit 6 Halted */
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# define QTD_TOKEN_ACTIVE (1 << 7) /* Bit 7 Active */
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# define QTD_TOKEN_ERRORS (0x7c << QTD_TOKEN_STATUS_SHIFT)
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# define QTD_TOKEN_ERRORS (0x78 << QTD_TOKEN_STATUS_SHIFT)
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#define QTD_TOKEN_PID_SHIFT (8) /* Bits 8-9: PID Code */
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#define QTD_TOKEN_PID_MASK (3 << QTD_TOKEN_PID_SHIFT)
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# define QTD_TOKEN_PID_OUT (0 << QTD_TOKEN_PID_SHIFT) /* OUT Token generates token (E1H) */
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@ -700,7 +700,7 @@
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# define QH_TOKEN_DBERR (1 << 5) /* Bit 5 Data Buffer Error */
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# define QH_TOKEN_HALTED (1 << 6) /* Bit 6 Halted */
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# define QH_TOKEN_ACTIVE (1 << 7) /* Bit 7 Active */
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# define QH_TOKEN_ERRORS (0x7c << QH_TOKEN_STATUS_SHIFT)
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# define QH_TOKEN_ERRORS (0x78 << QH_TOKEN_STATUS_SHIFT)
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#define QH_TOKEN_PID_SHIFT (8) /* Bits 8-9: PID Code */
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#define QH_TOKEN_PID_MASK (3 << QH_TOKEN_PID_SHIFT)
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# define QH_TOKEN_PID_OUT (0 << QH_TOKEN_PID_SHIFT) /* OUT Token generates token (E1H) */
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