From 411cf0ba1f064f13e88a45d3bf972928143f1142 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Sun, 13 Mar 2016 07:16:26 -0600
Subject: [PATCH] SMP: Add per-CPU initialization logic

---
 arch/arm/src/imx6/Make.defs     |  4 ++
 arch/arm/src/imx6/imx_cpuinit.c | 76 +++++++++++++++++++++++++++++++++
 arch/arm/src/imx6/imx_irq.c     |  2 +-
 arch/sim/src/up_smphook.c       | 23 ++++++++++
 4 files changed, 104 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/src/imx6/imx_cpuinit.c

diff --git a/arch/arm/src/imx6/Make.defs b/arch/arm/src/imx6/Make.defs
index 7b5947fb53..d1dde7eadb 100644
--- a/arch/arm/src/imx6/Make.defs
+++ b/arch/arm/src/imx6/Make.defs
@@ -139,3 +139,7 @@ CHIP_ASRCS  =
 CHIP_CSRCS  = imx_boot.c imx_memorymap.c imx_clockconfig.c imx_irq.c
 CHIP_CSRCS += imx_timerisr.c imx_gpio.c imx_iomuxc.c
 CHIP_CSRCS += imx_serial.c imx_lowputc.c
+
+ifeq ($(CONFIG_SMP),y)
+CHIP_CSRCS += imx_cpuinit.c
+endif
diff --git a/arch/arm/src/imx6/imx_cpuinit.c b/arch/arm/src/imx6/imx_cpuinit.c
new file mode 100644
index 0000000000..3c5f76114c
--- /dev/null
+++ b/arch/arm/src/imx6/imx_cpuinit.c
@@ -0,0 +1,76 @@
+/****************************************************************************
+ * arch/arm/src/imx6/imx_clockconfig.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/arch.h>
+
+#include "gic.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_initialize
+ *
+ * Description:
+ *   After the CPU has been started (via up_cpu_start()) the system will
+ *   call back into the architecture-specific code with this function on the
+ *   thread of execution of the newly started CPU.  This gives the
+ *   architecture-specific a chance to perform ny initial, CPU-specific
+ *   initialize on that thread.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int up_cpu_initialize(void)
+{
+  /* Initialize the Generic Interrupt Controller (GIC) for CPU0 */
+
+  arm_gic_initialize();
+  return OK;
+}
diff --git a/arch/arm/src/imx6/imx_irq.c b/arch/arm/src/imx6/imx_irq.c
index cd2a3ed283..0098419cb7 100644
--- a/arch/arm/src/imx6/imx_irq.c
+++ b/arch/arm/src/imx6/imx_irq.c
@@ -103,7 +103,7 @@ void up_irqinitialize(void)
   }
 #endif
 
-  /* Initialize the Generic Interrupt Controller (GIC) for this CPU */
+  /* Initialize the Generic Interrupt Controller (GIC) for CPU0 */
 
   arm_gic_initialize();
 
diff --git a/arch/sim/src/up_smphook.c b/arch/sim/src/up_smphook.c
index e871c42f0f..7c008a7d3d 100644
--- a/arch/sim/src/up_smphook.c
+++ b/arch/sim/src/up_smphook.c
@@ -51,6 +51,29 @@
  * Public Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: up_cpu_initialize
+ *
+ * Description:
+ *   After the CPU has been started (via up_cpu_start()) the system will
+ *   call back into the architecture-specific code with this function on the
+ *   thread of execution of the newly started CPU.  This gives the
+ *   architecture-specific a chance to perform ny initial, CPU-specific
+ *   initialize on that thread.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int up_cpu_initialize(void)
+{
+  return OK;
+}
+
 /****************************************************************************
  * Name: sim_smp_hook
  *