Merged in paulpatience/nuttx (pull request #25)
SSD1351 driver: add 8-bit parallel interface
This commit is contained in:
Gregory Nutt
commit
413ebde3b3
@ -378,6 +378,11 @@ choice
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prompt "Interface"
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default SSD1351_SPI4WIRE
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config SSD1351_PARALLEL8BIT
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bool "8-bit Parallel Interface"
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---help---
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Enables support for the 8-bit parallel interface.
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config SSD1351_SPI3WIRE
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bool "3-wire SPI Interface"
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select SPI
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@ -393,6 +398,8 @@ config SSD1351_SPI4WIRE
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endchoice
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if SSD1351_SPI3WIRE || SSD1351_SPI4WIRE
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config SSD1351_SPIMODE
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int "SPI Mode"
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default 0
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@ -406,6 +413,8 @@ config SSD1351_SPIFREQ
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---help---
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Specifies the SPI frequency.
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endif
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config SSD1351_NINTERFACES
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int "Number of SSD1351 Devices"
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default 1
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@ -1,6 +1,6 @@
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/****************************************************************************
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* drivers/lcd/ssd1351.c
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* LCD driver for the Solomon Systech SSD1351 LCD controller
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* LCD driver for the Solomon Systech SSD1351 OLED controller
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*
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* Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
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* Author: Paul Alexander Patience <paul-a.patience@polymtl.ca>
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@ -61,6 +61,7 @@
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/* Configuration ************************************************************/
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/* SSD1351 configuration settings:
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* CONFIG_SSD1351_PARALLEL8BIT - 8-bit parallel interface
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* CONFIG_SSD1351_SPI3WIRE - 3-wire SPI interface
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* CONFIG_SSD1351_SPI4WIRE - 4-wire SPI interface
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* CONFIG_SSD1351_SPIMODE - SPI mode
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@ -106,28 +107,6 @@
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/* Verify that all configuration requirements have been met */
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/* Interface to use */
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#if !defined(CONFIG_SSD1351_SPI3WIRE) && !defined(CONFIG_SSD1351_SPI4WIRE)
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# error "Choose an interface to use"
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#endif
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#if defined(CONFIG_SSD1351_SPI3WIRE) && defined(CONFIG_SSD1351_SPI4WIRE)
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# error "Cannot choose more than one interface"
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#endif
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/* SPI */
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#ifndef CONFIG_SPI
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# error "Requires support for SPI"
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#endif
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/* Cmd/data selection */
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#if defined(CONFIG_SSD1351_SPI4WIRE) && !defined(CONFIG_SPI_CMDDATA)
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# error "4-wire SPI interface requires support for SPI_CMDDATA"
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#endif
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/* Number of bits per pixel */
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#ifdef CONFIG_NX_DISABLE_16BPP
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@ -136,127 +115,18 @@
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/* Max power */
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#ifndef CONFIG_LCD_MAXPOWER
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# define CONFIG_LCD_MAXPOWER 1
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#endif
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#if CONFIG_LCD_MAXPOWER != 1
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# error "CONFIG_LCD_MAXPOWER should be 1"
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#endif
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/* SPI mode */
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#ifndef CONFIG_SSD1351_SPIMODE
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# define CONFIG_SSD1351_SPIMODE SPIDEV_MODE0
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#endif
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/* SPI frequency */
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#ifndef CONFIG_SSD1351_SPIFREQ
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# define CONFIG_SSD1351_SPIFREQ 1000000
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#endif
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/* The number of physical interfaces that will be supported */
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#ifndef CONFIG_SSD1351_NINTERFACES
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# define CONFIG_SSD1351_NINTERFACES 1
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#endif
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#if CONFIG_SSD1351_NINTERFACES != 1
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# error "This implementation supports only a single LCD device"
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#endif
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/* X resolution */
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#ifndef CONFIG_SSD1351_XRES
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# define CONFIG_SSD1351_XRES 128
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#endif
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#if CONFIG_SSD1351_XRES < 0 || CONFIG_SSD1351_XRES > 128
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# error "Invalid X resolution"
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#endif
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/* Y resolution */
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#ifndef CONFIG_SSD1351_YRES
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# define CONFIG_SSD1351_YRES 128
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#endif
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#if CONFIG_SSD1351_YRES < 0 || CONFIG_SSD1351_YRES > 128
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# error "Invalid Y resolution"
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#endif
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/* Reset period */
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#ifndef CONFIG_SSD1351_TRST
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# define CONFIG_SSD1351_TRST 5
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#endif
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/* First pre-charge period */
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#ifndef CONFIG_SSD1351_TPRECHG1
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# define CONFIG_SSD1351_TPRECHG1 8
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#endif
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/* Clock divider */
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#ifndef CONFIG_SSD1351_CLKDIV
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# define CONFIG_SSD1351_CLKDIV 0
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#endif
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/* Oscillator frequency */
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#ifndef CONFIG_SSD1351_OSCFREQ
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# define CONFIG_SSD1351_OSCFREQ 15
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#endif
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/* Second pre-charge period */
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#ifndef CONFIG_SSD1351_TPRECHG2
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# define CONFIG_SSD1351_TPRECHG2 8
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#endif
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/* Pre-charge voltage level */
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#ifndef CONFIG_SSD1351_VPRECHG
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# define CONFIG_SSD1351_VPRECHG 50
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#endif
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/* COM deselect voltage level */
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#ifndef CONFIG_SSD1351_VCOMH
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# define CONFIG_SSD1351_VCOMH 82
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#endif
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/* Color A contrast */
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#ifndef CONFIG_SSD1351_CONTRASTA
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# define CONFIG_SSD1351_CONTRASTA 138
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#endif
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/* Color B contrast */
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#ifndef CONFIG_SSD1351_CONTRASTB
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# define CONFIG_SSD1351_CONTRASTB 81
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#endif
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/* Color C contrast */
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#ifndef CONFIG_SSD1351_CONTRASTC
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# define CONFIG_SSD1351_CONTRASTC 138
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#endif
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/* Master contrast ratio */
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#ifndef CONFIG_SSD1351_MSTRCONTRAST
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# define CONFIG_SSD1351_MSTRCONTRAST 16
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#endif
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/* 9-bit SPI */
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#ifdef CONFIG_SSD1351_SPI3WIRE
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# define SSD1351_SPICMD 0
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# define SSD1351_SPIDATA (1 << 8)
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# define SSD1351_SPIBITS 9
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#else
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# define SSD1351_SPIBITS 8
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#endif
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/* Macro Helpers ************************************************************/
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@ -503,12 +373,16 @@ struct ssd1351_dev_s
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{
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/* Publically visible device structure */
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struct lcd_dev_s dev;
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struct lcd_dev_s dev;
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/* Private LCD-specific information follows */
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FAR struct spi_dev_s *spi; /* Contained SPI driver instance */
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uint8_t power; /* Current power (backlight) setting */
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#ifdef CONFIG_SSD1351_PARALLEL8BIT
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FAR struct ssd1351_lcd_s *lcd; /* Contained platform-specific interface */
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#elif defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
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FAR struct spi_dev_s *spi; /* Contained SPI driver instance */
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#endif
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uint8_t power; /* Current power (backlight) setting */
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/* This is working memory allocated by the LCD driver for each LCD device
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* and for each color plane. This memory will hold one raster line of
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@ -522,7 +396,7 @@ struct ssd1351_dev_s
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* buffers.
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*/
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uint16_t runbuffer[SSD1351_XRES];
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uint16_t runbuffer[SSD1351_XRES];
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/* This is another buffer, but used internally by the LCD driver in order
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* to expand the pixel data into 9-bit data needed by the LCD. There are
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@ -533,7 +407,7 @@ struct ssd1351_dev_s
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*/
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#ifdef CONFIG_SSD1351_SPI3WIRE
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uint16_t rowbuffer[SSD1351_STRIDE+1];
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uint16_t rowbuffer[SSD1351_STRIDE+1];
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#endif
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};
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@ -541,18 +415,22 @@ struct ssd1351_dev_s
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* Private Function Prototypes
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****************************************************************************/
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/* SPI Helpers */
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/* Helpers */
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static inline void ssd1351_configspi(FAR struct spi_dev_s *spi);
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#ifdef CONFIG_SPI_OWNBUS
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static inline void ssd1351_select(FAR struct spi_dev_s *spi);
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static inline void ssd1351_deselect(FAR struct spi_dev_s *spi);
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#else
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static void ssd1351_select(FAR struct spi_dev_s *spi);
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static void ssd1351_deselect(FAR struct spi_dev_s *spi);
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#ifdef CONFIG_SSD1351_PARALLEL8BIT
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#define ssd1351_select(priv)
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#define ssd1351_deselect(priv)
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#elif defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
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static void ssd1351_select(FAR struct ssd1351_dev_s *priv);
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static void ssd1351_deselect(FAR struct ssd1351_dev_s *priv);
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#endif
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static void ssd1351_cmddata(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR const uint8_t *data, size_t datlen);
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#if defined(CONFIG_SSD1351_PARALLEL8BIT) && !defined(CONFIG_LCD_NOGETRUN)
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static void ssd1351_read(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR uint8_t *data, size_t datlen);
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#endif
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static void ssd1351_write(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR const uint8_t *data, size_t datlen);
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/* LCD Data Transfer Methods */
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@ -604,25 +482,6 @@ static struct ssd1351_dev_s g_lcddev;
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: ssd1351_configspi
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*
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* Description:
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* Configure the SPI.
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*
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****************************************************************************/
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static inline void ssd1351_configspi(FAR struct spi_dev_s *spi)
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{
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SPI_SETMODE(spi, CONFIG_SSD1351_SPIMODE);
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#ifdef CONFIG_SSD1351_SPI3WIRE
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SPI_SETBITS(spi, 9);
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#else
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SPI_SETBITS(spi, 8);
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#endif
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SPI_SETFREQUENCY(spi, CONFIG_SSD1351_SPIFREQ);
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}
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/****************************************************************************
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* Name: ssd1351_select
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*
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@ -631,17 +490,11 @@ static inline void ssd1351_configspi(FAR struct spi_dev_s *spi)
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_OWNBUS
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static inline void ssd1351_select(FAR struct spi_dev_s *spi)
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#if defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
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static void ssd1351_select(FAR struct ssd1351_dev_s *priv)
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{
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/* We own the SPI bus, so just select the chip */
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FAR struct spi_dev_s *spi = priv->spi;
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gdbg("SELECTED\n");
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SPI_SELECT(spi, SPIDEV_DISPLAY, true);
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}
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#else
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static void ssd1351_select(FAR struct spi_dev_s *spi)
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{
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/* Select the chip, locking the SPI bus in case there are multiple devices
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* competing for the SPI bus
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*/
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@ -654,7 +507,11 @@ static void ssd1351_select(FAR struct spi_dev_s *spi)
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* have gotten configured for a different device while unlocked)
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*/
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ssd1351_configspi(spi);
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#ifndef CONFIG_SPI_OWNBUS
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SPI_SETMODE(spi, CONFIG_SSD1351_SPIMODE);
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SPI_SETBITS(spi, SSD1351_SPIBITS);
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SPI_SETFREQUENCY(spi, CONFIG_SSD1351_SPIFREQ);
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#endif
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}
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#endif
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@ -666,17 +523,11 @@ static void ssd1351_select(FAR struct spi_dev_s *spi)
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_OWNBUS
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static inline void ssd1351_deselect(FAR struct spi_dev_s *spi)
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#if defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
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static void ssd1351_deselect(FAR struct ssd1351_dev_s *priv)
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{
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/* We own the SPI bus, so just de-select the chip */
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FAR struct spi_dev_s *spi = priv->spi;
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gdbg("DE-SELECTED\n");
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SPI_SELECT(spi, SPIDEV_DISPLAY, false);
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}
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#else
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static void ssd1351_deselect(FAR struct spi_dev_s *spi)
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{
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/* De-select the chip and relinquish the SPI bus */
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gdbg("DE-SELECTED\n");
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@ -686,16 +537,79 @@ static void ssd1351_deselect(FAR struct spi_dev_s *spi)
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#endif
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/****************************************************************************
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* Name: ssd1351_cmddata
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* Name: ssd1351_read
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*
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* Description:
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* Send a 1-byte command and read datlen data bytes.
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*
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****************************************************************************/
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#if defined(CONFIG_SSD1351_PARALLEL8BIT) && !defined(CONFIG_LCD_NOGETRUN)
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static void ssd1351_read(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR uint8_t *data, size_t datlen)
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{
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FAR struct ssd1351_lcd_s *lcd = priv->lcd;
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size_t i;
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/* Sanity check */
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DEBUGASSERT(priv != NULL);
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DEBUGASSERT((data == NULL && datlen == 0) || (data != NULL && datlen > 0));
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/* Send the command */
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lcd->cmd(lcd, cmd);
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/* Discard the first data read if reading from the display */
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if (cmd == SSD1351_CMD_RAMREAD)
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{
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(void)lcd->read(lcd);
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}
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/* Read all of the data */
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for (i = 0; i < datlen; i++)
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{
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data[i] = lcd->read(lcd);
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}
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}
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#endif
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/****************************************************************************
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* Name: ssd1351_write
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*
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* Description:
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* Send a 1-byte command followed by datlen data bytes.
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*
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****************************************************************************/
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#ifdef CONFIG_SSD1351_SPI3WIRE
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static void ssd1351_cmddata(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR const uint8_t *data, size_t datlen)
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#ifdef CONFIG_SSD1351_PARALLEL8BIT
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static void ssd1351_write(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR const uint8_t *data, size_t datlen)
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{
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FAR struct ssd1351_lcd_s *lcd = priv->lcd;
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size_t i;
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/* Sanity check */
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DEBUGASSERT(priv != NULL);
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DEBUGASSERT((data == NULL && datlen == 0) || (data != NULL && datlen > 0));
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/* Send the command */
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lcd->cmd(lcd, cmd);
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/* Write all of the data */
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for (i = 0; i < datlen; i++)
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{
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lcd->write(lcd, data[i]);
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}
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}
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#elif defined(CONFIG_SSD1351_SPI3WIRE)
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static void ssd1351_write(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR const uint8_t *data, size_t datlen)
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{
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size_t i;
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@ -720,10 +634,12 @@ static void ssd1351_cmddata(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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(void)SPI_SNDBLOCK(priv->spi, priv->rowbuffer, datlen+1);
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}
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#else
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static void ssd1351_cmddata(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR const uint8_t *data, size_t datlen)
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#elif defined(CONFIG_SSD1351_SPI4WIRE)
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static void ssd1351_write(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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FAR const uint8_t *data, size_t datlen)
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{
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FAR struct spi_dev_s *spi = priv->spi;
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/* Sanity check */
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DEBUGASSERT(priv != NULL);
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@ -731,11 +647,11 @@ static void ssd1351_cmddata(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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/* Select command transfer */
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(void)SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, true);
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(void)SPI_CMDDATA(spi, SPIDEV_DISPLAY, true);
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/* Send the command */
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(void)SPI_SEND(priv->spi, cmd);
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(void)SPI_SEND(spi, cmd);
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/* Do we have any data to send? */
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@ -743,11 +659,11 @@ static void ssd1351_cmddata(FAR struct ssd1351_dev_s *priv, uint8_t cmd,
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{
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/* Yes, select data transfer */
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(void)SPI_CMDDATA(priv->spi, SPIDEV_DISPLAY, false);
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(void)SPI_CMDDATA(spi, SPIDEV_DISPLAY, false);
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/* Transfer all of the data */
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(void)SPI_SNDBLOCK(priv->spi, data, datlen);
|
||||
(void)SPI_SNDBLOCK(spi, data, datlen);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
@ -770,25 +686,25 @@ static void ssd1351_setcursor(FAR struct ssd1351_dev_s *priv, uint8_t col,
|
||||
|
||||
buf[0] = col;
|
||||
buf[1] = SSD1351_XRES - 1;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_COLADDR, buf, 2);
|
||||
ssd1351_write(priv, SSD1351_CMD_COLADDR, buf, 2);
|
||||
|
||||
/* Set the row address to the row */
|
||||
|
||||
buf[0] = row;
|
||||
buf[1] = SSD1351_YRES - 1;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_ROWADDR, buf, 2);
|
||||
#else
|
||||
ssd1351_write(priv, SSD1351_CMD_ROWADDR, buf, 2);
|
||||
#elif defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT)
|
||||
/* Set the column address to the row */
|
||||
|
||||
buf[0] = row;
|
||||
buf[1] = SSD1351_YRES - 1;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_COLADDR, buf, 2);
|
||||
ssd1351_write(priv, SSD1351_CMD_COLADDR, buf, 2);
|
||||
|
||||
/* Set the row address to the column */
|
||||
|
||||
buf[0] = col;
|
||||
buf[1] = SSD1351_XRES - 1;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_ROWADDR, buf, 2);
|
||||
ssd1351_write(priv, SSD1351_CMD_ROWADDR, buf, 2);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -820,20 +736,20 @@ static int ssd1351_putrun(fb_coord_t row, fb_coord_t col,
|
||||
|
||||
/* Select and lock the device */
|
||||
|
||||
ssd1351_select(priv->spi);
|
||||
ssd1351_select(priv);
|
||||
|
||||
/* Set the starting position for the run */
|
||||
|
||||
ssd1351_setcursor(priv, col, row);
|
||||
|
||||
/* Transfer all of the data */
|
||||
/* Write all of the data */
|
||||
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_RAMWRITE, buffer,
|
||||
SSD1351_PIX2BYTES(npixels));
|
||||
ssd1351_write(priv, SSD1351_CMD_RAMWRITE, buffer,
|
||||
SSD1351_PIX2BYTES(npixels));
|
||||
|
||||
/* Unlock and de-select the device */
|
||||
|
||||
ssd1351_deselect(priv->spi);
|
||||
ssd1351_deselect(priv);
|
||||
|
||||
return OK;
|
||||
}
|
||||
@ -856,7 +772,36 @@ static int ssd1351_putrun(fb_coord_t row, fb_coord_t col,
|
||||
static int ssd1351_getrun(fb_coord_t row, fb_coord_t col,
|
||||
FAR uint8_t *buffer, size_t npixels)
|
||||
{
|
||||
#if defined(CONFIG_SSD1351_PARALLEL8BIT) && !defined(CONFIG_LCD_NOGETRUN)
|
||||
FAR struct ssd1351_dev_s *priv = &g_lcddev;
|
||||
|
||||
/* Sanity check */
|
||||
|
||||
DEBUGASSERT(buffer != NULL && ((uintptr_t)buffer & 1) == 0 &&
|
||||
col >= 0 && col+npixels <= SSD1351_XRES &&
|
||||
row >= 0 && row < SSD1351_YRES);
|
||||
|
||||
/* Select and lock the device */
|
||||
|
||||
ssd1351_select(priv);
|
||||
|
||||
/* Set the starting position for the run */
|
||||
|
||||
ssd1351_setcursor(priv, col, row);
|
||||
|
||||
/* Read all of the data */
|
||||
|
||||
ssd1351_read(priv, SSD1351_CMD_RAMREAD, buffer,
|
||||
SSD1351_PIX2BYTES(npixels));
|
||||
|
||||
/* Unlock and de-select the device */
|
||||
|
||||
ssd1351_deselect(priv);
|
||||
|
||||
return OK;
|
||||
#else
|
||||
return -ENOSYS;
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -945,31 +890,31 @@ static int ssd1351_setpower(FAR struct lcd_dev_s *dev, int power)
|
||||
|
||||
/* Sanity check */
|
||||
|
||||
DEBUGASSERT(priv != NULL && (unsigned int)power <= CONFIG_LCD_MAXPOWER);
|
||||
DEBUGASSERT(priv != NULL && (unsigned int)power <= LCD_FULL_ON);
|
||||
gvdbg("power: %d\n", power);
|
||||
|
||||
/* Select and lock the device */
|
||||
|
||||
ssd1351_select(priv->spi);
|
||||
ssd1351_select(priv);
|
||||
|
||||
if (power > 0)
|
||||
if (power > LCD_FULL_OFF)
|
||||
{
|
||||
/* Turn the display on */
|
||||
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_DISPON, NULL, 0);
|
||||
priv->power = CONFIG_LCD_MAXPOWER;
|
||||
ssd1351_write(priv, SSD1351_CMD_DISPON, NULL, 0);
|
||||
priv->power = LCD_FULL_ON;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Turn the display off */
|
||||
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_DISPOFF, NULL, 0);
|
||||
priv->power = 0;
|
||||
ssd1351_write(priv, SSD1351_CMD_DISPOFF, NULL, 0);
|
||||
priv->power = LCD_FULL_OFF;
|
||||
}
|
||||
|
||||
/* Unlock and de-select the device */
|
||||
|
||||
ssd1351_deselect(priv->spi);
|
||||
ssd1351_deselect(priv);
|
||||
|
||||
return OK;
|
||||
}
|
||||
@ -1016,21 +961,21 @@ static inline void ssd1351_hwinitialize(FAR struct ssd1351_dev_s *priv)
|
||||
|
||||
/* Select and lock the device */
|
||||
|
||||
ssd1351_select(priv->spi);
|
||||
ssd1351_select(priv);
|
||||
|
||||
/* Unlock most commands */
|
||||
|
||||
buf[0] = SSD1351_UNLOCK;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_LOCK, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_LOCK, buf, 1);
|
||||
|
||||
/* Unlock the rest of the commands */
|
||||
|
||||
buf[0] = SSD1351_ACCESSIBLE;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_LOCK, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_LOCK, buf, 1);
|
||||
|
||||
/* Turn the display off */
|
||||
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_DISPOFF, NULL, 0);
|
||||
ssd1351_write(priv, SSD1351_CMD_DISPOFF, NULL, 0);
|
||||
|
||||
/* Set the address increment, the column address mapping, the color
|
||||
* sequence, the scan direction, the COM split, and the color depth
|
||||
@ -1058,7 +1003,7 @@ static inline void ssd1351_hwinitialize(FAR struct ssd1351_dev_s *priv)
|
||||
#else
|
||||
buf[0] |= SSD1351_SCANFROMCOM0;
|
||||
#endif
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_ORIENTATION, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_ORIENTATION, buf, 1);
|
||||
|
||||
/* Set the vertical scroll by RAM */
|
||||
|
||||
@ -1070,19 +1015,19 @@ static inline void ssd1351_hwinitialize(FAR struct ssd1351_dev_s *priv)
|
||||
#else
|
||||
buf[0] = SSD1351_STARTLINE(0);
|
||||
#endif
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_STARTLINE, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_STARTLINE, buf, 1);
|
||||
|
||||
/* Set the vertical scroll by row */
|
||||
|
||||
buf[0] = SSD1351_OFFSET(0);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_OFFSET, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_OFFSET, buf, 1);
|
||||
|
||||
/* Set the display to normal or inverse */
|
||||
|
||||
#ifdef CONFIG_SSD1351_INVERT
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_INVERSE, NULL, 0);
|
||||
ssd1351_write(priv, SSD1351_CMD_INVERSE, NULL, 0);
|
||||
#else
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_NORMAL, NULL, 0);
|
||||
ssd1351_write(priv, SSD1351_CMD_NORMAL, NULL, 0);
|
||||
#endif
|
||||
|
||||
/* Set the VDD and the interface */
|
||||
@ -1093,13 +1038,13 @@ static inline void ssd1351_hwinitialize(FAR struct ssd1351_dev_s *priv)
|
||||
buf[0] = SSD1351_VDDINT;
|
||||
#endif
|
||||
buf[0] |= SSD1351_IFACE8BIT;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_VDDIFACE, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_VDDIFACE, buf, 1);
|
||||
|
||||
/* Set the reset period and the first pre-charge period */
|
||||
|
||||
buf[0] = SSD1351_TRST(CONFIG_SSD1351_TRST) |
|
||||
SSD1351_TPRECHG1(CONFIG_SSD1351_TPRECHG1);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_TRSTTPRECHG1, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_TRSTTPRECHG1, buf, 1);
|
||||
|
||||
/* Set the display performance */
|
||||
|
||||
@ -1110,66 +1055,66 @@ static inline void ssd1351_hwinitialize(FAR struct ssd1351_dev_s *priv)
|
||||
#endif
|
||||
buf[1] = SSD1351_PERFDATA2;
|
||||
buf[2] = SSD1351_PERFDATA3;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_PERF, buf, 3);
|
||||
ssd1351_write(priv, SSD1351_CMD_PERF, buf, 3);
|
||||
|
||||
/* Set the clock divider and the oscillator frequency */
|
||||
|
||||
buf[0] = SSD1351_CLKDIV(CONFIG_SSD1351_CLKDIV) |
|
||||
SSD1351_OSCFREQ(CONFIG_SSD1351_OSCFREQ);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_DIVFREQ, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_DIVFREQ, buf, 1);
|
||||
|
||||
/* Set the segment low voltage */
|
||||
|
||||
buf[0] = SSD1351_VSLEXT;
|
||||
buf[1] = SSD1351_VSLDATA2;
|
||||
buf[2] = SSD1351_VSLDATA3;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_VSL, buf, 3);
|
||||
ssd1351_write(priv, SSD1351_CMD_VSL, buf, 3);
|
||||
|
||||
/* Set the GPIO pins */
|
||||
|
||||
buf[0] = SSD1351_GPIO0(SSD1351_GPIOLOW) | SSD1351_GPIO1(SSD1351_GPIOLOW);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_GPIO, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_GPIO, buf, 1);
|
||||
|
||||
/* Set the second pre-charge period */
|
||||
|
||||
buf[0] = SSD1351_TPRECHG2(CONFIG_SSD1351_TPRECHG2);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_TPRECHG2, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_TPRECHG2, buf, 1);
|
||||
|
||||
/* Use the built-in linear lookup table */
|
||||
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_LINEARLUT, NULL, 0);
|
||||
ssd1351_write(priv, SSD1351_CMD_LINEARLUT, NULL, 0);
|
||||
|
||||
/* Set the pre-charge voltage level */
|
||||
|
||||
buf[0] = SSD1351_VPRECHG(CONFIG_SSD1351_VPRECHG);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_VPRECHG, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_VPRECHG, buf, 1);
|
||||
|
||||
/* Set the COM deselect voltage level */
|
||||
|
||||
buf[0] = SSD1351_VCOMH(CONFIG_SSD1351_VCOMH);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_VCOMH, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_VCOMH, buf, 1);
|
||||
|
||||
/* Set the contrast */
|
||||
|
||||
buf[0] = SSD1351_CONTRAST(CONFIG_SSD1351_CONTRASTA);
|
||||
buf[1] = SSD1351_CONTRAST(CONFIG_SSD1351_CONTRASTB);
|
||||
buf[2] = SSD1351_CONTRAST(CONFIG_SSD1351_CONTRASTC);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_CONTRAST, buf, 3);
|
||||
ssd1351_write(priv, SSD1351_CMD_CONTRAST, buf, 3);
|
||||
|
||||
/* Set the master contrast ratio */
|
||||
|
||||
buf[0] = SSD1351_MSTRCONTRAST(CONFIG_SSD1351_MSTRCONTRAST);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_MSTRCONTRAST, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_MSTRCONTRAST, buf, 1);
|
||||
|
||||
/* Set the multiplex ratio */
|
||||
|
||||
buf[0] = SSD1351_MUXRATIO(128);
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_MUXRATIO, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_MUXRATIO, buf, 1);
|
||||
|
||||
/* Lock some of the commands */
|
||||
|
||||
buf[0] = SSD1351_INACCESSIBLE;
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_LOCK, buf, 1);
|
||||
ssd1351_write(priv, SSD1351_CMD_LOCK, buf, 1);
|
||||
|
||||
/* Set the cursor position */
|
||||
|
||||
@ -1181,12 +1126,12 @@ static inline void ssd1351_hwinitialize(FAR struct ssd1351_dev_s *priv)
|
||||
buf[1] = 0;
|
||||
for (i = 0; i < SSD1351_XRES * SSD1351_YRES; i++)
|
||||
{
|
||||
ssd1351_cmddata(priv, SSD1351_CMD_RAMWRITE, buf, 2);
|
||||
ssd1351_write(priv, SSD1351_CMD_RAMWRITE, buf, 2);
|
||||
}
|
||||
|
||||
/* Unlock and de-select the device */
|
||||
|
||||
ssd1351_deselect(priv->spi);
|
||||
ssd1351_deselect(priv);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -1198,6 +1143,7 @@ static inline void ssd1351_hwinitialize(FAR struct ssd1351_dev_s *priv)
|
||||
* but with the power setting at 0 (full off == sleep mode).
|
||||
*
|
||||
* Input Parameters:
|
||||
* lcd - A reference to the platform-specific interface.
|
||||
* spi - A reference to the SPI driver instance.
|
||||
* devno - A value in the range of 0 through CONFIG_SSD1351_NINTERFACES-1.
|
||||
* This allows support for multiple devices.
|
||||
@ -1208,16 +1154,24 @@ static inline void ssd1351_hwinitialize(FAR struct ssd1351_dev_s *priv)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SSD1351_PARALLEL8BIT
|
||||
FAR struct lcd_dev_s *ssd1351_initialize(FAR struct ssd1351_lcd_s *lcd,
|
||||
unsigned int devno)
|
||||
#elif defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
|
||||
FAR struct lcd_dev_s *ssd1351_initialize(FAR struct spi_dev_s *spi,
|
||||
unsigned int devno)
|
||||
#endif
|
||||
{
|
||||
FAR struct ssd1351_dev_s *priv = &g_lcddev;
|
||||
size_t i;
|
||||
uint16_t buf[SSD1351_XRES/2];
|
||||
|
||||
/* Sanity check */
|
||||
|
||||
DEBUGASSERT(spi != NULL && devno == 0);
|
||||
#ifdef CONFIG_SSD1351_PARALLEL8BIT
|
||||
DEBUGASSERT(lcd != NULL);
|
||||
#elif defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
|
||||
DEBUGASSERT(spi != NULL);
|
||||
#endif
|
||||
DEBUGASSERT(devno == 0);
|
||||
|
||||
/* Initialize the driver data structure */
|
||||
|
||||
@ -1227,29 +1181,29 @@ FAR struct lcd_dev_s *ssd1351_initialize(FAR struct spi_dev_s *spi,
|
||||
priv->dev.setpower = ssd1351_setpower;
|
||||
priv->dev.getcontrast = ssd1351_getcontrast;
|
||||
priv->dev.setcontrast = ssd1351_setcontrast;
|
||||
#ifdef CONFIG_SSD1351_PARALLEL8BIT
|
||||
priv->lcd = lcd;
|
||||
#elif defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
|
||||
priv->spi = spi;
|
||||
priv->power = 0;
|
||||
#endif
|
||||
priv->power = LCD_FULL_OFF;
|
||||
|
||||
/* Configure the SPI bus if we own it. Otherwise, don't bother because
|
||||
* it might change.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
|
||||
#ifdef CONFIG_SPI_OWNBUS
|
||||
ssd1351_configspi(spi);
|
||||
SPI_SETMODE(spi, CONFIG_SSD1351_SPIMODE);
|
||||
SPI_SETBITS(spi, SSD1351_SPIBITS);
|
||||
SPI_SETFREQUENCY(spi, CONFIG_SSD1351_SPIFREQ);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Configure the device */
|
||||
|
||||
ssd1351_hwinitialize(priv);
|
||||
|
||||
ssd1351_setpower(&priv->dev, 1);
|
||||
|
||||
memset(buf, 0xff, sizeof(buf));
|
||||
for (i = 0; i < SSD1351_YRES / 4; i++)
|
||||
{
|
||||
ssd1351_putrun(i, 0, (const uint8_t *)buf, SSD1351_XRES/2);
|
||||
}
|
||||
|
||||
return &priv->dev;
|
||||
}
|
||||
|
||||
|
||||
@ -51,6 +51,7 @@
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
/* SSD1351 configuration settings:
|
||||
* CONFIG_SSD1351_PARALLEL8BIT - 8-bit parallel interface
|
||||
* CONFIG_SSD1351_SPI3WIRE - 3-wire SPI interface
|
||||
* CONFIG_SSD1351_SPI4WIRE - 4-wire SPI interface
|
||||
* CONFIG_SSD1351_SPIMODE - SPI mode
|
||||
@ -98,7 +99,18 @@
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SSD1351_PARALLEL8BIT
|
||||
struct ssd1351_lcd_s
|
||||
{
|
||||
void (*cmd)(FAR struct ssd1351_lcd_s *lcd, uint8_t cmd);
|
||||
#ifndef CONFIG_LCD_NOGETRUN
|
||||
uint8_t (*read)(FAR struct ssd1351_lcd_s *lcd);
|
||||
#endif
|
||||
void (*write)(FAR struct ssd1351_lcd_s *lcd, uint8_t data);
|
||||
};
|
||||
#elif defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
|
||||
struct spi_dev_s;
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
@ -118,6 +130,7 @@ extern "C"
|
||||
* but with the power setting at 0 (full off == sleep mode).
|
||||
*
|
||||
* Input Parameters:
|
||||
* lcd - A reference to the platform-specific interface.
|
||||
* spi - A reference to the SPI driver instance.
|
||||
* devno - A value in the range of 0 through CONFIG_SSD1351_NINTERFACES-1.
|
||||
* This allows support for multiple devices.
|
||||
@ -128,8 +141,13 @@ extern "C"
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SSD1351_PARALLEL8BIT
|
||||
FAR struct lcd_dev_s *ssd1351_initialize(FAR struct ssd1351_lcd_s *lcd,
|
||||
unsigned int devno);
|
||||
#elif defined(CONFIG_SSD1351_SPI3WIRE) || defined(CONFIG_SSD1351_SPI4WIRE)
|
||||
FAR struct lcd_dev_s *ssd1351_initialize(FAR struct spi_dev_s *spi,
|
||||
unsigned int devno);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user