Change notation of PCH and PCL registers into PC0 and PC1
This is for forthcoming Atmega2560 support. The Atmega2560 has 24-bit PC thus, PCH and PCL would become PCH, PCM and PCL (M for Middle). The problem that in this notation PCM is equivalent to former PCH. This makes compatable porting kind of difficult, at least for my taste. Instead PCH becomes PC0 and PCL becomes PC1 (think of the index as order of bytes pushed to stack when call is performed, PC0 as MSB goes first, PC1 goes to stack second, and for 24-bit PC, PC2 as LDB goes last).
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@ -91,8 +91,8 @@
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/* The program counter is automatically pushed when the interrupt occurs */
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#define REG_PCH 35 /* PC */
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#define REG_PCL 36
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#define REG_PC0 35 /* PC */
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#define REG_PC1 36
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/****************************************************************************
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* Public Types
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@ -112,8 +112,8 @@ struct xcptcontext
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/* These are saved copies of PC and SR used during signal processing.*/
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uint8_t saved_pcl;
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uint8_t saved_pch;
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uint8_t saved_pc1;
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uint8_t saved_pc0;
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uint8_t saved_sreg;
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#endif
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@ -112,8 +112,8 @@
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* On Entry:
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* The return PC and the saved r24 is on the stack, r24 now contains the IRQ number
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*
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* PCL
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* PCH
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* PC1
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* PC0
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* R0
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* --- <- SP
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*
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@ -201,8 +201,8 @@
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* On Entry:
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* The return PC and the saved r24 is on the stack, r24 now contains the IRQ number
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*
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* PCL
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* PCH
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* PC1
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* PC0
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* R0
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* --- <- SP
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*
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@ -99,16 +99,16 @@
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* sp - Points to the top of the stack. The PC is already on the stack.
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* Only the stack is available for storage
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*
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* PCL
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* PCH
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* PC1
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* PC0
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* --- <- SP
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*
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* At completion:
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* Stack pointer is incremented by one, the saved r24 is on the stack, r24 now contains the
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* IRQ number
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*
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* PCL
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* PCH
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* PC1
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* PC0
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* R0
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* --- <- SP
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*
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@ -134,8 +134,8 @@
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* sp - Points to the top of the stack
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* Only the stack is available for storage
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*
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* PCL
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* PCH
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* PC1
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* PC0
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* R24
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* --- <- SP
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*
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@ -333,10 +333,10 @@
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.macro USER_SAVE
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/* Pop the return address from the stack (PCH then PCL). R18:19 are Call-used */
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/* Pop the return address from the stack (PC0 then PC1). R18:19 are Call-used */
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pop r19 /* r19=PCH */
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pop r18 /* r18=PCL */
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pop r19 /* r19=PC0 */
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pop r18 /* r18=PC1 */
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/* Save the current stack pointer as it would be after the return(SPH then SPL). */
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@ -399,8 +399,8 @@
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/* Save the return address that we have saved in r18:19*/
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st x+, r19 /* r19=PCH */
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st x+, r18 /* r18=PCL */
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st x+, r19 /* r19=PC0 */
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st x+, r18 /* r18=PC1 */
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.endm
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/********************************************************************************************
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@ -428,8 +428,8 @@
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* Y [r28:29]
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*/
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movw r28, r26 /* Get a pointer to the PCH/PCL storage location */
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adiw r28, REG_PCH
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movw r28, r26 /* Get a pointer to the PC0/PC1 storage location */
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adiw r28, REG_PC0
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/* Fetch and set the new stack pointer */
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@ -441,21 +441,21 @@
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/* Fetch the return address and save it at the bottom of the new stack so
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* that we can iret to switch contexts. The new stack is now:
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*
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* PCL
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* PCH
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* PC1
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* PC0
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* --- <- SP
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*/
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ld r25, y+ /* Load PCH (r25) then PCL (r24) */
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ld r25, y+ /* Load PC0 (r25) then PC1 (r24) */
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ld r24, y+
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push r24 /* Push PCH and PCL on the stack (PCL then PCH) */
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push r24 /* Push PC0 and PC1 on the stack (PC1 then PC0) */
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push r25
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/* Then get value of X [r26:r27]. Save X on the new stack where we can
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* recover it later. The new stack is now:
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*
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* PCL
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* PCH
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* PC1
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* PC0
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* R26
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* R27
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* --- <- SP
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@ -152,7 +152,7 @@ static inline void up_registerdump(void)
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current_regs[REG_R30], current_regs[REG_R31]);
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lldbg("PC: %02x%02x SP: %02x%02x SREG: %02x\n",
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current_regs[REG_PCH], current_regs[REG_PCL],
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current_regs[REG_PC0], current_regs[REG_PC1],
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current_regs[REG_SPH], current_regs[REG_SPL],
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current_regs[REG_SREG]);
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}
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@ -96,8 +96,8 @@ void up_initial_state(struct tcb_s *tcb)
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/* Save the task entry point */
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xcp->regs[REG_PCH] = (uint8_t)((uint16_t)tcb->start >> 8);
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xcp->regs[REG_PCL] = (uint8_t)((uint16_t)tcb->start & 0xff);
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xcp->regs[REG_PC0] = (uint8_t)((uint16_t)tcb->start >> 8);
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xcp->regs[REG_PC1] = (uint8_t)((uint16_t)tcb->start & 0xff);
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/* Enable or disable interrupts, based on user configuration */
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@ -154,16 +154,16 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
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*/
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tcb->xcp.sigdeliver = sigdeliver;
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tcb->xcp.saved_pcl = current_regs[REG_PCL];
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tcb->xcp.saved_pch = current_regs[REG_PCH];
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tcb->xcp.saved_pc1 = current_regs[REG_PCL];
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tcb->xcp.saved_pc0 = current_regs[REG_PCH];
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tcb->xcp.saved_sreg = current_regs[REG_SREG];
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/* Then set up to vector to the trampoline with interrupts
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* disabled
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*/
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current_regs[REG_PCL] = (uint16_t)up_sigdeliver & 0xff;
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current_regs[REG_PCH] = (uint16_t)up_sigdeliver >> 8;
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current_regs[REG_PC1] = (uint16_t)up_sigdeliver & 0xff;
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current_regs[REG_PC0] = (uint16_t)up_sigdeliver >> 8;
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current_regs[REG_SREG] &= ~(1 << SREG_I);
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/* And make sure that the saved context in the TCB
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@ -188,16 +188,16 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
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*/
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tcb->xcp.sigdeliver = sigdeliver;
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tcb->xcp.saved_pcl = tcb->xcp.regs[REG_PCL];
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tcb->xcp.saved_pch = tcb->xcp.regs[REG_PCH];
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tcb->xcp.saved_pc1 = tcb->xcp.regs[REG_PCL];
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tcb->xcp.saved_pc0 = tcb->xcp.regs[REG_PCH];
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tcb->xcp.saved_sreg = tcb->xcp.regs[REG_SREG];
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/* Then set up to vector to the trampoline with interrupts
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* disabled
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*/
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tcb->xcp.regs[REG_PCL] = (uint16_t)up_sigdeliver & 0xff;
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tcb->xcp.regs[REG_PCH] = (uint16_t)up_sigdeliver >> 8;
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tcb->xcp.regs[REG_PC1] = (uint16_t)up_sigdeliver & 0xff;
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tcb->xcp.regs[REG_PC0] = (uint16_t)up_sigdeliver >> 8;
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tcb->xcp.regs[REG_SREG] &= ~(1 << SREG_I);
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}
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}
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@ -101,8 +101,8 @@ void up_sigdeliver(void)
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/* Save the real return state on the stack. */
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up_copystate(regs, rtcb->xcp.regs);
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regs[REG_PCL] = rtcb->xcp.saved_pcl;
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regs[REG_PCH] = rtcb->xcp.saved_pch;
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regs[REG_PC1] = rtcb->xcp.saved_pcl;
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regs[REG_PC0] = rtcb->xcp.saved_pch;
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regs[REG_SREG] = rtcb->xcp.saved_sreg;
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/* Get a local copy of the sigdeliver function pointer. We do this so that
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