drivers/can/mcp2515.c and boards/arm/stm32/nucleo-f4x1re: MCP2525 SPI STD-EXT ID fixes. Verified on MCP2525 tested on nucleo-f4x1re.

boards/arm/stm32/nucleo-f4x1re/configs/f411-mcp2515-extid/defconfig

@@ -0,0 +1,69 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_FPU is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_NSH_CMDPARMS is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_PS is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-f4x1re"
+CONFIG_ARCH_BOARD_NUCLEO_F411RE=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32F411RE=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LATE_INITIALIZE=y
+CONFIG_BOARD_LOOPSPERMSEC=8499
+CONFIG_BUILTIN=y
+CONFIG_CAN=y
+CONFIG_CANUTILS_CANLIB=y
+CONFIG_CAN_EXTID=y
+CONFIG_CAN_MCP2515=y
+CONFIG_EXAMPLES_CAN=y
+CONFIG_EXAMPLES_CAN_NMSGS=1
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_MCP2515_PHASESEG1=3
+CONFIG_MCP2515_PROPSEG=1
+CONFIG_MCP2515_SPI_SCK_FREQUENCY=500000
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_PREALLOC_WDOGS=8
+CONFIG_RAM_SIZE=131072
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_START_DAY=14
+CONFIG_START_MONTH=10
+CONFIG_START_YEAR=2014
+CONFIG_STM32_CRC=y
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_OTGFS=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_SPI1=y
+CONFIG_STM32_USART1=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_NSH_CXXINITIALIZE=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART1_SERIAL_CONSOLE=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_WDOG_INTRESERVE=1

boards/arm/stm32/nucleo-f4x1re/src/Makefile

@@ -59,6 +59,10 @@ ifeq ($(CONFIG_SENSORS_QENCODER),y)
 CSRCS += stm32_qencoder.c
 endif
 
+ifeq ($(CONFIG_CAN_MCP2515),y)
+  CSRCS += stm32_mcp2515.c
+endif
+
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += stm32_appinit.c
 endif

boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h

@@ -49,6 +49,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Configuration ********************************************************************/
 
 #define HAVE_MMCSD 1
@@ -58,7 +59,8 @@
 #endif
 
 /* LED.  User LD2: the green LED is a user LED connected to Arduino signal D13
- * corresponding to MCU I/O PA5 (pin 21) or PB13 (pin 34) depending on the STM32
+ * corresponding to MCU I/O PA5 (pin 21) or PB13 (pin 34) depending on the
+ * STM32
  * target.
  *
  * - When the I/O is HIGH value, the LED is on.
@@ -112,6 +114,13 @@
 #define GPIO_SPI1_SCK_OFF  (GPIO_INPUT | GPIO_PULLDOWN | \
                             GPIO_PORTA | GPIO_PIN5)
 
+/* MCP2551 */
+
+#define GPIO_MCP2515_CS   (GPIO_OUTPUT|GPIO_OTYPER_PP(0)|GPIO_SPEED_2MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4)
+
+#define GPIO_MCP2515_IRQ  (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN1)
+
 #ifdef HAVE_MMCSD
 #  define GPIO_SPI_CS_SD_CARD_OFF \
     (GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
@@ -303,4 +312,16 @@ int stm32_qencoder_initialize(FAR const char *devpath, int timer);
 int board_ajoy_initialize(void);
 #endif
 
+/****************************************************************************
+ * Name: stm32_mcp2515initialize
+ *
+ * Description:
+ *   Initialize and register the MCP2515 CAN driver.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_CAN_MCP2515
+int stm32_mcp2515initialize(FAR const char *devpath);
+#endif
+
 #endif /* __BOARDS_ARM_STM32_NUCLEO_F401RE_SRC_NUCLEO_F401RE_H */

boards/arm/stm32/nucleo-f4x1re/src/stm32_bringup.c

@@ -77,6 +77,35 @@ int stm32_bringup(void)
 {
   int ret = OK;
 
+  /* Configure SPI-based devices */
+
+#ifdef CONFIG_STM32_SPI1
+  /* Get the SPI port */
+
+  struct spi_dev_s *spi;
+
+  spi = stm32_spibus_initialize(1);
+  if (!spi)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to initialize SPI port 1\n");
+      return -ENODEV;
+    }
+
+#ifdef CONFIG_CAN_MCP2515
+#ifdef CONFIG_STM32_SPI1
+  (void)stm32_configgpio(GPIO_MCP2515_CS);    /* MEMS chip select */
+#endif
+
+  /* Configure and initialize the MCP2515 CAN device */
+
+  ret = stm32_mcp2515initialize("/dev/can0");
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_mcp2515initialize() failed: %d\n", ret);
+    }
+#endif
+#endif
+
 #ifdef HAVE_MMCSD
   /* First, get an instance of the SDIO interface */
 

boards/arm/stm32/nucleo-f4x1re/src/stm32_mcp2515.c

@@ -0,0 +1,253 @@
+/****************************************************************************
+ * boards/arm/stm32/nucleo-f4x1re/src/stm32_mcp2515.c
+ *
+ *   Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved.
+ *   Author: Alan Carvalho de Assis <acassis@gmail.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/spi/spi.h>
+#include <nuttx/can/mcp2515.h>
+
+#include "stm32.h"
+#include "stm32_spi.h"
+#include "nucleo-f4x1re.h"
+
+#if defined(CONFIG_SPI) && defined(CONFIG_STM32_SPI1) && \
+    defined(CONFIG_CAN_MCP2515)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define MCP2515_SPI_PORTNO 1   /* On SPI1 */
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct stm32_mcp2515config_s
+{
+  /* Configuration structure as seen by the MCP2515 driver */
+
+  struct mcp2515_config_s config;
+
+  /* Additional private definitions only known to this driver */
+
+  FAR struct mcp2515_can_s *handle; /* The MCP2515 driver handle */
+  mcp2515_handler_t handler;        /* The MCP2515 interrupt handler */
+  FAR void *arg;                    /* Argument to pass to the interrupt handler */
+};
+
+/****************************************************************************
+ * Static Function Prototypes
+ ****************************************************************************/
+
+/* IRQ/GPIO access callbacks.  These operations all hidden behind callbacks
+ * to isolate the MCP2515 driver from differences in GPIO interrupt handling
+ * by varying boards and MCUs.
+ *
+ *   attach  - Attach the MCP2515 interrupt handler to the GPIO interrupt
+ */
+
+static int  mcp2515_attach(FAR struct mcp2515_config_s *state,
+                           mcp2515_handler_t handler, FAR void *arg);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* A reference to a structure of this type must be passed to the MCP2515
+ * driver.  This structure provides information about the configuration
+ * of the MCP2515 and provides some board-specific hooks.
+ *
+ * Memory for this structure is provided by the caller.  It is not copied
+ * by the driver and is presumed to persist while the driver is active. The
+ * memory must be writable because, under certain circumstances, the driver
+ * may modify frequency or X plate resistance values.
+ */
+
+static struct stm32_mcp2515config_s g_mcp2515config =
+{
+  .config =
+  {
+    .spi        = NULL,
+    .baud       = 0,     /* REVISIT.  Proably broken by commit eb7373cedfa */
+    .btp        = 0,     /* REVISIT.  Proably broken by commit eb7373cedfa */
+    .devid      = 0,
+    .mode       = 0,     /* REVISIT.  Proably broken by commit eb7373cedfa */
+    .nfilters   = 6,
+#ifdef MCP2515_LOOPBACK
+    .loopback   = false;
+#endif
+    .attach     = mcp2515_attach,
+  },
+};
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/* This is the MCP2515 Interrupt handler */
+
+int mcp2515_interrupt(int irq, FAR void *context, FAR void *arg)
+{
+  FAR struct stm32_mcp2515config_s *priv =
+             (FAR struct stm32_mcp2515config_s *)arg;
+
+  DEBUGASSERT(priv != NULL);
+
+  /* Verify that we have a handler attached */
+
+  if (priv->handler)
+    {
+      /* Yes.. forward with interrupt along with its argument */
+
+      priv->handler(&priv->config, priv->arg);
+    }
+
+  return OK;
+}
+
+static int mcp2515_attach(FAR struct mcp2515_config_s *state,
+                          mcp2515_handler_t handler, FAR void *arg)
+{
+  FAR struct stm32_mcp2515config_s *priv =
+             (FAR struct stm32_mcp2515config_s *)state;
+  irqstate_t flags;
+
+  caninfo("Saving handler %p\n", handler);
+
+  flags = enter_critical_section();
+
+  priv->handler = handler;
+  priv->arg = arg;
+
+  /* Configure the interrupt for falling edge */
+
+  (void)stm32_gpiosetevent(GPIO_MCP2515_IRQ, false, true, false,
+                           mcp2515_interrupt, priv);
+
+  leave_critical_section(flags);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_mcp2515initialize
+ *
+ * Description:
+ *   Initialize and register the MCP2515 RFID driver.
+ *
+ * Input Parameters:
+ *   devpath - The full path to the driver to register. E.g., "/dev/rfid0"
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int stm32_mcp2515initialize(FAR const char *devpath)
+{
+  FAR struct spi_dev_s     *spi;
+  FAR struct can_dev_s     *can;
+  FAR struct mcp2515_can_s *mcp2515;
+  int ret;
+
+  /* Check if we are already initialized */
+
+  if (!g_mcp2515config.handle)
+    {
+      sninfo("Initializing\n");
+
+      /* Configure the MCP2515 interrupt pin as an input */
+
+      (void)stm32_configgpio(GPIO_MCP2515_IRQ);
+
+      spi = stm32_spibus_initialize(MCP2515_SPI_PORTNO);
+
+      if (!spi)
+        {
+          return -ENODEV;
+        }
+
+      /* Save the SPI instance in the mcp2515_config_s structure */
+
+      g_mcp2515config.config.spi = spi;
+
+      /* Instantiate the MCP2515 CAN Driver */
+
+      mcp2515 = mcp2515_instantiate(&g_mcp2515config.config);
+      if (mcp2515 == NULL)
+        {
+          canerr("ERROR:  Failed to get MCP2515 Driver Loaded\n");
+          return -ENODEV;
+        }
+
+      /* Save the opaque structure */
+
+      g_mcp2515config.handle = mcp2515;
+
+      /* Initialize the CAN Device with the MCP2515 operations */
+
+      can = mcp2515_initialize(mcp2515);
+      if (can == NULL)
+        {
+          canerr("ERROR:  Failed to get CAN interface\n");
+          return -ENODEV;
+        }
+
+      /* Register the CAN driver at "/dev/can0" */
+
+      ret = can_register(devpath, can);
+      if (ret < 0)
+        {
+          canerr("ERROR: can_register failed: %d\n", ret);
+          return ret;
+        }
+    }
+
+  return OK;
+}
+
+#endif /* CONFIG_SPI && CONFIG_CAN_MCP2515 */

boards/arm/stm32/nucleo-f4x1re/src/stm32_spi.c

@@ -53,11 +53,13 @@
 
 #include "nucleo-f4x1re.h"
 
-#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || \
+    defined(CONFIG_STM32_SPI3)
 
 /****************************************************************************
  * Public Data
  ****************************************************************************/
+
 /* Global driver instances */
 
 #ifdef CONFIG_STM32_SPI1
@@ -91,6 +93,10 @@ void weak_function stm32_spidev_initialize(void)
       spierr("ERROR: FAILED to initialize SPI port 1\n");
     }
 
+#ifdef CONFIG_CAN_MCP2515
+  stm32_configgpio(GPIO_MCP2515_CS);    /* MCP2515 chip select */
+#endif
+
 #ifdef HAVE_MMCSD
   stm32_configgpio(GPIO_SPI_CS_SD_CARD);
 #endif
@@ -107,31 +113,41 @@ void weak_function stm32_spidev_initialize(void)
  * Name:  stm32_spi1/2/3select and stm32_spi1/2/3status
  *
  * Description:
- *   The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
+ *   The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
- *   provided by board-specific logic.  They are implementations of the select
+ *   must be provided by board-specific logic.  They are implementations of
- *   and status methods of the SPI interface defined by struct spi_ops_s (see
+ *   the select and status methods of the SPI interface defined by struct
- *   include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
+ *   spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
- *   are provided by common STM32 logic.  To use this common SPI logic on your
+ *   stm32_spibus_initialize()) are provided by common STM32 logic. To use
- *   board:
+ *   this common SPI logic on your board:
  *
  *   1. Provide logic in stm32_boardinitialize() to configure SPI chip select
  *      pins.
- *   2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
+ *   2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in
- *      board-specific logic.  These functions will perform chip selection and
+ *      your board-specific logic.  These functions will perform chip
- *      status operations using GPIOs in the way your board is configured.
+ *      selection and status operations using GPIOs in the way your board is
+ *      configured.
  *   3. Add a calls to stm32_spibus_initialize() in your low level application
  *      initialization logic
- *   4. The handle returned by stm32_spibus_initialize() may then be used to bind the
+ *   4. The handle returned by stm32_spibus_initialize() may then be used to
- *      SPI driver to higher level logic (e.g., calling
+ *      bind the SPI driver to higher level logic (e.g., calling
  *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
  *      the SPI MMC/SD driver).
  *
  ****************************************************************************/
 
 #ifdef CONFIG_STM32_SPI1
-void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
+                      bool selected)
 {
-  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" :
+          "de-assert");
+
+#if defined(CONFIG_CAN_MCP2515)
+  if (devid == SPIDEV_CANBUS(0))
+    {
+      stm32_gpiowrite(GPIO_MCP2515_CS, !selected);
+    }
+#endif
 
 #ifdef HAVE_MMCSD
   if (devid == SPIDEV_MMCSD(0))
@@ -148,9 +164,11 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
 #endif
 
 #ifdef CONFIG_STM32_SPI2
-void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid,
+                      bool selected)
 {
-  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" :
+          "de-assert");
 }
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
@@ -160,9 +178,11 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
 #endif
 
 #ifdef CONFIG_STM32_SPI3
-void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid,
+                      bool selected)
 {
-  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+  spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" :
+          "de-assert");
 }
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)

drivers/can/mcp2515.c

@@ -4,6 +4,7 @@
  *   Copyright (C) 2017, 2019 Gregory Nutt. All rights reserved.
  *   Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved.
  *   Author: Alan Carvalho de Assis <acassis@gmail.com>
+ *   Modfied: Ben <disruptivesolutionsnl@gmail.com>
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -659,6 +660,7 @@ static int mcp2515_add_extfilter(FAR struct mcp2515_can_s *priv,
                 break;
 
               case CAN_FILTER_RANGE:
+
                 /* Not supported */
 
                 break;
@@ -987,6 +989,7 @@ static int mcp2515_add_stdfilter(FAR struct mcp2515_can_s *priv,
                 break;
 
               case CAN_FILTER_RANGE:
+
                 /* Not supported */
 
                 break;
@@ -1463,14 +1466,18 @@ static int mcp2515_ioctl(FAR struct can_dev_s *dev, int cmd,
 
           mcp2515_readregs(priv, MCP2515_CNF1, &regval, 1);
           bt->bt_sjw    = ((regval & CNF1_SJW_MASK) >> CNF1_SJW_SHIFT) + 1;
-          brp           = (((regval & CNF1_BRP_MASK) >> CNF1_BRP_SHIFT) + 1) * 2;
+          brp           = (((regval & CNF1_BRP_MASK) >>
+                                      CNF1_BRP_SHIFT) + 1) * 2;
 
           mcp2515_readregs(priv, MCP2515_CNF2, &regval, 1);
-          bt->bt_tseg1  = ((regval & CNF2_PRSEG_MASK) >> CNF2_PRSEG_SHIFT) + 1;
+          bt->bt_tseg1  = ((regval & CNF2_PRSEG_MASK) >>
-          bt->bt_tseg1 += ((regval & CNF2_PHSEG1_MASK) >> CNF2_PHSEG1_SHIFT) + 1;
+                                     CNF2_PRSEG_SHIFT) + 1;
+          bt->bt_tseg1 += ((regval & CNF2_PHSEG1_MASK) >>
+                                     CNF2_PHSEG1_SHIFT) + 1;
 
           mcp2515_readregs(priv, MCP2515_CNF3, &regval, 1);
-          bt->bt_tseg2  = ((regval & CNF3_PHSEG2_MASK) >> CNF3_PHSEG2_SHIFT) + 1;
+          bt->bt_tseg2  = ((regval & CNF3_PHSEG2_MASK) >>
+                                     CNF3_PHSEG2_SHIFT) + 1;
 
           bt->bt_baud   = MCP2515_CANCLK_FREQUENCY / brp /
                           (bt->bt_tseg1 + bt->bt_tseg2 + 1);
@@ -2441,6 +2448,27 @@ static int mcp2515_hw_initialize(struct mcp2515_can_s *priv)
 
   priv->txints = MCP2515_TXBUFFER_INTS;
 
+  /* In this option we set a special receive mode in the
+   * RXM[1:0] bits (RXBnCTRL[6:5]). In both registers:
+   * RXB0CTRL and RXB1CTRL.
+   * 11 = Turns mask/filters off; receives any message.
+   *
+   * In this mode it is tested that it receives both
+   * extended and standard id messages.
+   */
+
+#ifdef CONFIG_CAN_EXTID
+  mcp2515_readregs(priv, MCP2515_RXB0CTRL, &regval, 1);
+  regval &= ~RXBCTRL_RXM_ALLMSG;
+  regval |= RXBCTRL_RXM_ALLMSG;
+  mcp2515_writeregs(priv, MCP2515_RXB0CTRL, &regval, 1);
+
+  mcp2515_readregs(priv, MCP2515_RXB1CTRL, &regval, 1);
+  regval &= ~RXBCTRL_RXM_ALLMSG;
+  regval |= RXBCTRL_RXM_ALLMSG;
+  mcp2515_writeregs(priv, MCP2515_RXB1CTRL, &regval, 1);
+#endif
+
   return OK;
 }