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Kinetis:Refactor you use SIM_SOPT2_PLLFLLSEL, added warning

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The warning has been added because: SIM_SOPT2_PLLFLLSEL
  is a clock selection that may feed many clock subsystem:
   USB, TPM, SDHCSRC, LPUARTSRC. Therefore, there needs to
  be a global board level setting to select  the source for
  SIM_SOPT2_PLLFLLSEL and then  derive all the  sub selections
  and proper fractions/divisors for each modules clock.
This commit is contained in:
David Sidrane 2017-02-22 10:15:38 -10:00
parent 12c24f2644
commit 41e3d9f174
1 changed files with 2 additions and 1 deletions
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3
arch/arm/src/kinetis/kinetis_usbdev.c
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@ -4396,10 +4396,11 @@ void up_usbinitialize(void)
* easier.
*/
#if 1
#warning "This code needs to be driven by BOARD_ settings and SIM_SOPT2[PLLFLLSE] needs to be set globally"
/* 1: Select clock source */
regval = getreg32(KINETIS_SIM_SOPT2);
regval |= SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_USBSRC;
regval |= SIM_SOPT2_PLLFLLSEL_MCGPLLCLK | SIM_SOPT2_USBSRC;
putreg32(regval, KINETIS_SIM_SOPT2);
regval = getreg32(KINETIS_SIM_CLKDIV2);