SAML21: Fix some register definitions; board OSC16M frequency
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@ -1,7 +1,7 @@
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/**************************************************************************
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* arch/arm/src/lpc11/lpc11_lowgetc.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -64,11 +64,11 @@
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#define SAM_MCLK_BUPDIV_OFFSET 0x0006 /* Backup clock division */
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/* 0x0007-0x000f: Reserved */
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#define SAM_MCLK_AHBMASK_OFFSET 0x0010 /* AHB mask */
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#define SAM_MCLK_APBAMASK_OFFSET 0x0010 /* APBA mask */
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#define SAM_MCLK_APBBMASK_OFFSET 0x0010 /* APBB mask */
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#define SAM_MCLK_APBCMASK_OFFSET 0x0010 /* APBC mask */
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#define SAM_MCLK_APBDMASK_OFFSET 0x0010 /* APBD mask */
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#define SAM_MCLK_APBEMASK_OFFSET 0x0010 /* APBE mask */
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#define SAM_MCLK_APBAMASK_OFFSET 0x0014 /* APBA mask */
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#define SAM_MCLK_APBBMASK_OFFSET 0x0018 /* APBB mask */
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#define SAM_MCLK_APBCMASK_OFFSET 0x001c /* APBC mask */
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#define SAM_MCLK_APBDMASK_OFFSET 0x0020 /* APBD mask */
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#define SAM_MCLK_APBEMASK_OFFSET 0x0024 /* APBE mask */
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/* MCLK register addresses **********************************************************/
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