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Add stm32_clockenable() to support recovery from deep sleep low-power usage modes

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5000 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-08-02 21:48:54 +00:00
parent 4c3a3de9a3
commit 421e422444
6 changed files with 110 additions and 4 deletions
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3
ChangeLog
View File

@ -3115,4 +3115,7 @@
from drivers/syslog to fs/ where is belongs. Especially after realizing that
the syslog logic is going to have to some internal FS operations in order
to realize a totally thread-independent SYSLOG interface.
* arch/arm/src/stm32/stm32*_rcc.c and .h: If CONFIG_PM is defined, add a
function called stm32_clockenable() that can be used by PM logic to re-start
the PLL after re-awakening from deep sleep modes.

67
arch/arm/src/stm32/stm32_rcc.c
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@ -90,6 +90,27 @@
* Public Functions
****************************************************************************/
/************************************************************************************
* Name: stm32_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h. This
* function (by default) will reset most everything, enable the PLL, and enable
* peripheral clocking for all periperipherals enabled in the NuttX configuration
* file.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
* be enabled by an externally provided, board-specific function called
* stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
void stm32_clockconfig(void)
{
/* Make sure that we are starting in the reset state */
@ -114,3 +135,49 @@ void stm32_clockconfig(void)
rcc_enableperipherals();
}
/************************************************************************************
* Name: stm32_clockenable
*
* Description:
* Re-enable the clock and restore the clock settings based on settings in board.h.
* This function is only available to support low-power modes of operation: When
* re-awakening from deep-sleep modes, it is necessary to re-enable/re-start the
* PLL
*
* This functional performs a subset of the operations performed by
* stm32_clockconfig(): It does not reset any devices, and it does not reset the
* currenlty enabled peripheral clocks.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
* be enabled by an externally provided, board-specific function called
* stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
#ifdef CONFIG_PM
void stm32_clockenable(void);
{
#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
/* Invoke Board Custom Clock Configuration */
stm32_board_clockconfig();
#else
/* Invoke standard, fixed clock configuration based on definitions in board.h */
stm32_stdclockconfig();
#endif
}
#endif

38
arch/arm/src/stm32/stm32_rcc.h
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@ -156,7 +156,14 @@ static inline void stm32_mco2config(uint32_t source, uint32_t div)
* Name: stm32_clockconfig
*
* Description:
* Called to change to new clock based on settings in board.h
* Called to establish the clock settings based on the values in board.h. This
* function (by default) will reset most everything, enable the PLL, and enable
* peripheral clocking for all periperipherals enabled in the NuttX configuration
* file.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
* be enabled by an externally provided, board-specific function called
* stm32_board_clockconfig().
*
* Input Parameters:
* None
@ -168,6 +175,35 @@ static inline void stm32_mco2config(uint32_t source, uint32_t div)
EXTERN void stm32_clockconfig(void);
/************************************************************************************
* Name: stm32_clockenable
*
* Description:
* Re-enable the clock and restore the clock settings based on settings in board.h.
* This function is only available to support low-power modes of operation: When
* re-awakening from deep-sleep modes, it is necessary to re-enable/re-start the
* PLL
*
* This functional performs a subset of the operations performed by
* stm32_clockconfig(): It does not reset any devices, and it does not reset the
* currenlty enabled peripheral clocks.
*
* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
* be enabled by an externally provided, board-specific function called
* stm32_board_clockconfig().
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
************************************************************************************/
#ifdef CONFIG_PM
EXTERN void stm32_clockenable(void);
#endif
/************************************************************************************
* Name: stm32_rcc_enablelse
*

2
arch/arm/src/stm32/stm32f10xxx_rcc.c
View File

@ -412,7 +412,7 @@ static inline void rcc_enableapb2(void)
****************************************************************************/
#ifndef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
static inline void stm32_stdclockconfig(void)
static void stm32_stdclockconfig(void)
{
uint32_t regval;

2
arch/arm/src/stm32/stm32f20xxx_rcc.c
View File

@ -548,7 +548,7 @@ static inline void rcc_enableapb2(void)
****************************************************************************/
#ifndef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
static inline void stm32_stdclockconfig(void)
static void stm32_stdclockconfig(void)
{
uint32_t regval;
volatile int32_t timeout;

2
arch/arm/src/stm32/stm32f40xxx_rcc.c
View File

@ -550,7 +550,7 @@ static inline void rcc_enableapb2(void)
****************************************************************************/
#ifndef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
static inline void stm32_stdclockconfig(void)
static void stm32_stdclockconfig(void)
{
uint32_t regval;
volatile int32_t timeout;