sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

arch/risc-v: Move xxx_cpustart.c to common

Browse Source 
It's a common solution for MSIP and IPI based risc-v smp soc,
also works on qemu-rv smp (WIP).

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi 2022-01-22 19:01:53 +08:00 committed by Xiang Xiao
parent da5659138b
commit 422e005183
5 changed files with 15 additions and 33 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/risc-v/src/c906/c906_start.c
View File

@ -61,8 +61,6 @@
uintptr_t g_idle_topstack = C906_IDLESTACK_TOP;
volatile bool g_serial_ok = false;
extern void c906_cpu_boot(uint32_t);
/****************************************************************************
* Public Functions
****************************************************************************/

34
arch/risc-v/src/k210/k210_cpustart.c → arch/risc-v/src/common/riscv_cpustart.c
View File

@ -1,5 +1,5 @@
/****************************************************************************
* arch/risc-v/src/k210/k210_cpustart.c
* arch/risc-v/src/common/riscv_cpustart.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@ -41,37 +41,22 @@
#include "riscv_internal.h"
#include "chip.h"
#ifdef CONFIG_SMP
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if 0
# define DPRINTF(fmt, args...) _err(fmt, ##args)
#else
# define DPRINTF(fmt, args...) do {} while (0)
#endif
#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) riscv_lowputc(c)
#else
# define showprogress(c)
#endif
/****************************************************************************
* Public Data
****************************************************************************/
extern volatile bool g_serial_ok;
extern int riscv_pause_handler(int irq, void *c, void *arg);
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: k210_cpu_boot
* Name: riscv_cpu_boot
*
* Description:
* Boot handler for cpu1
@ -84,7 +69,7 @@ extern int riscv_pause_handler(int irq, void *c, void *arg);
*
****************************************************************************/
void k210_cpu_boot(int cpu)
void riscv_cpu_boot(int cpu)
{
if (1 < cpu)
{
@ -99,7 +84,7 @@ void k210_cpu_boot(int cpu)
/* Clear machine software interrupt for CPU(cpu) */
putreg32(0, (uintptr_t)K210_CLINT_MSIP + (4 * cpu));
putreg32(0, (uintptr_t)RISCV_CLINT_MSIP + (4 * cpu));
/* Enable machine software interrupt for IPI to boot */
@ -109,8 +94,7 @@ void k210_cpu_boot(int cpu)
asm("WFI");
showprogress('b');
DPRINTF("CPU%d Started\n", this_cpu());
_info("CPU%d Started\n", this_cpu());
#ifdef CONFIG_STACK_COLORATION
struct tcb_s *tcb = this_task();
@ -127,7 +111,7 @@ void k210_cpu_boot(int cpu)
/* Clear machine software interrupt for CPU(cpu) */
putreg32(0, (uintptr_t)K210_CLINT_MSIP + (4 * cpu));
putreg32(0, (uintptr_t)RISCV_CLINT_MSIP + (4 * cpu));
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify that this CPU has started */
@ -171,7 +155,7 @@ void k210_cpu_boot(int cpu)
int up_cpu_start(int cpu)
{
DPRINTF("cpu=%d\n", cpu);
_info("CPU=%d\n", cpu);
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify of the start event */
@ -181,9 +165,7 @@ int up_cpu_start(int cpu)
/* Send IPI to CPU(cpu) */
putreg32(1, (uintptr_t)K210_CLINT_MSIP + (cpu * 4));
putreg32(1, (uintptr_t)RISCV_CLINT_MSIP + (cpu * 4));
return 0;
}
#endif /* CONFIG_SMP */

5
arch/risc-v/src/common/riscv_internal.h
View File

@ -215,6 +215,11 @@ void riscv_exception(uintptr_t mcause, uintptr_t *regs);
void riscv_stack_color(void *stackbase, size_t nbytes);
#endif
#ifdef CONFIG_SMP
void riscv_cpu_boot(int cpu);
int riscv_pause_handler(int irq, void *c, void *arg);
#endif
#undef EXTERN
#ifdef __cplusplus
}

3
arch/risc-v/src/k210/Make.defs
View File

@ -36,7 +36,7 @@ CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
CMN_CSRCS += riscv_mdelay.c riscv_copyfullstate.c
ifeq ($(CONFIG_SMP), y)
CMN_CSRCS += riscv_cpuindex.c riscv_cpupause.c
CMN_CSRCS += riscv_cpuindex.c riscv_cpupause.c riscv_cpustart.c
endif
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
@ -59,7 +59,6 @@ CHIP_CSRCS += k210_start.c k210_timerisr.c k210_gpiohs.c
ifeq ($(CONFIG_SMP), y)
CHIP_CSRCS += k210_cpuidlestack.c
CHIP_CSRCS += k210_cpustart.c
endif
ifeq ($(CONFIG_BUILD_PROTECTED),y)

4
arch/risc-v/src/k210/k210_start.c
View File

@ -55,8 +55,6 @@
uintptr_t g_idle_topstack = K210_IDLESTACK0_TOP;
volatile bool g_serial_ok = false;
extern void k210_cpu_boot(uint32_t);
/****************************************************************************
* Public Functions
****************************************************************************/
@ -139,7 +137,7 @@ cpu1:
showprogress('a');
#if defined(CONFIG_SMP) && (CONFIG_SMP_NCPUS == 2)
k210_cpu_boot(mhartid);
riscv_cpu_boot(mhartid);
#endif
while (true)