SAMA5D4-EK LCDC: Change source clock to 2*Mck seems to solve stability issues

This commit is contained in:
Gregory Nutt 2014-07-12 09:45:05 -06:00
parent 30603b1021
commit 424d47cfee

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@ -2976,7 +2976,7 @@ int up_fbinitialize(void)
#if defined(BOARD_LCDC_ENABLE_DELAY) && BOARD_LCDC_ENABLE_DELAY > 0
/* Delay a bit after enabling the LDC. I presume that a delay of a few
* frame times allows some unstable clocking to synchronize before we
* tart thrashing the framebuffer? But I am not sure why this is
* start thrashing the framebuffer? But I am not sure why this is
* necessary and, in fact, is certainly not necessary in most LCDC
* configurations. Perhaps this delay would not be necessary if timings
* were more precise?