sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Squashed commit of the following:

Browse Source 
sched/semaphore:  Add nxsem_post() which is identical to sem_post() except that it never modifies the errno variable.  Changed all references to sem_post in the OS to nxsem_post().

    sched/semaphore:  Add nxsem_destroy() which is identical to sem_destroy() except that it never modifies the errno variable.  Changed all references to sem_destroy() in the OS to nxsem_destroy().

    libc/semaphore and sched/semaphore:  Add nxsem_getprotocol() and nxsem_setprotocola which are identical to sem_getprotocol() and set_setprotocol() except that they never modifies the errno variable.  Changed all references to sem_setprotocol in the OS to nxsem_setprotocol().  sem_getprotocol() was not used in the OS
This commit is contained in:
Gregory Nutt 2017-10-03 15:35:24 -06:00
parent 83cdb0c552
commit 42a0796615
376 changed files with 1597 additions and 1314 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/src/efm32/efm32_dma.c
View File

@ -381,7 +381,7 @@ DMA_HANDLE efm32_dmachannel(void)
}
}
sem_post(&g_dmac.exclsem);
nxsem_post(&g_dmac.exclsem);
/* Since we have reserved a DMA descriptor by taking a count from chansem,
* it would be a serious logic failure if we could not find a free channel
@ -432,7 +432,7 @@ void efm32_dmafree(DMA_HANDLE handle)
* thread that may be waiting for a channel.
*/
sem_post(&g_dmac.chansem);
nxsem_post(&g_dmac.chansem);
}
/****************************************************************************

10
arch/arm/src/efm32/efm32_i2c.c
View File

@ -660,7 +660,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
static inline void efm32_i2c_sem_post(FAR struct efm32_i2c_priv_s *priv)
{
sem_post(&priv->sem_excl);
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
@ -681,7 +681,7 @@ static inline void efm32_i2c_sem_init(FAR struct efm32_i2c_priv_s *priv)
*/
nxsem_init(&priv->sem_isr, 0, 0);
sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
@ -695,9 +695,9 @@ static inline void efm32_i2c_sem_init(FAR struct efm32_i2c_priv_s *priv)
static inline void efm32_i2c_sem_destroy(FAR struct efm32_i2c_priv_s *priv)
{
sem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
sem_destroy(&priv->sem_isr);
nxsem_destroy(&priv->sem_isr);
#endif
}
@ -1254,7 +1254,7 @@ done:
if (priv->i2c_state == I2CSTATE_DONE)
{
#ifndef CONFIG_I2C_POLLED
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
#endif
/* Disable interrupt sources when done */

10
arch/arm/src/efm32/efm32_spi.c
View File

@ -510,7 +510,7 @@ static void spi_dmatxwait(struct efm32_spidev_s *priv)
#ifdef CONFIG_EFM32_SPI_DMA
static inline void spi_dmarxwakeup(struct efm32_spidev_s *priv)
{
(void)sem_post(&priv->rxdmasem);
(void)nxsem_post(&priv->rxdmasem);
}
#endif
@ -525,7 +525,7 @@ static inline void spi_dmarxwakeup(struct efm32_spidev_s *priv)
#ifdef CONFIG_EFM32_SPI_DMA
static inline void spi_dmatxwakeup(struct efm32_spidev_s *priv)
{
(void)sem_post(&priv->txdmasem);
(void)nxsem_post(&priv->txdmasem);
}
#endif
@ -759,7 +759,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
@ -1646,8 +1646,8 @@ static int spi_portinitialize(struct efm32_spidev_s *priv)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->rxdmasem, SEM_PRIO_NONE);
sem_setprotocol(&priv->txdmasem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->rxdmasem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->txdmasem, SEM_PRIO_NONE);
#endif
/* Enable SPI */

6
arch/arm/src/efm32/efm32_usbhost.c
View File

@ -319,7 +319,7 @@ static inline void efm32_modifyreg(uint32_t addr, uint32_t clrbits,
/* Semaphores ******************************************************************/
static void efm32_takesem(sem_t *sem);
#define efm32_givesem(s) sem_post(s);
#define efm32_givesem(s) nxsem_post(s);
/* Byte stream access helper functions *****************************************/
@ -5162,7 +5162,7 @@ static inline void efm32_sw_initialize(FAR struct efm32_usbhost_s *priv)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
/* Initialize the driver state data */
@ -5187,7 +5187,7 @@ static inline void efm32_sw_initialize(FAR struct efm32_usbhost_s *priv)
*/
nxsem_init(&chan->waitsem, 0, 0);
sem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
}
}

6
arch/arm/src/imx1/imx_spi.c
View File

@ -678,7 +678,7 @@ static int spi_interrupt(int irq, void *context, FAR void *arg, FAR void *arg)
{
/* Yes, wake up the waiting thread */
sem_post(&priv->waitsem);
nxsem_post(&priv->waitsem);
}
return OK;
@ -725,7 +725,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
@ -1123,7 +1123,7 @@ FAR struct spi_dev_s *imx_spibus_initialize(int port)
*/
nxsem_init(&priv->waitsem, 0, 0);
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
#endif
nxsem_init(&priv->exclsem, 0, 1);

6
arch/arm/src/imx6/imx_ecspi.c
View File

@ -763,7 +763,7 @@ static int spi_interrupt(int irq, void *context, FAR void *arg)
{
/* Yes, wake up the waiting thread */
sem_post(&priv->waitsem);
nxsem_post(&priv->waitsem);
}
return OK;
@ -810,7 +810,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
@ -1309,7 +1309,7 @@ FAR struct spi_dev_s *imx_spibus_initialize(int port)
*/
nxsem_init(&priv->waitsem, 0, 0);
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
#endif
nxsem_init(&priv->exclsem, 0, 1);

2
arch/arm/src/imx6/imx_serial.c
View File

@ -995,7 +995,7 @@ int up_putc(int ch)
if (locked)
{
sem_post(&g_putc_lock);
nxsem_post(&g_putc_lock);
}
return ch;

10
arch/arm/src/kinetis/kinetis_i2c.c
View File

@ -323,7 +323,7 @@ static inline void kinetis_i2c_sem_init(FAR struct kinetis_i2cdev_s *priv)
*/
nxsem_init(&priv->wait, 0, 0);
sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->wait, SEM_PRIO_NONE);
}
/************************************************************************************
@ -336,8 +336,8 @@ static inline void kinetis_i2c_sem_init(FAR struct kinetis_i2cdev_s *priv)
static inline void kinetis_i2c_sem_destroy(FAR struct kinetis_i2cdev_s *priv)
{
sem_destroy(&priv->mutex);
sem_destroy(&priv->wait);
nxsem_destroy(&priv->mutex);
nxsem_destroy(&priv->wait);
}
/************************************************************************************
@ -366,7 +366,7 @@ static inline void kinetis_i2c_sem_wait(FAR struct kinetis_i2cdev_s *priv)
static inline void kinetis_i2c_sem_post(struct kinetis_i2cdev_s *priv)
{
sem_post(&priv->mutex);
nxsem_post(&priv->mutex);
}
/************************************************************************************
@ -392,7 +392,7 @@ static inline void kinetis_i2c_wait(struct kinetis_i2cdev_s *priv)
static inline void kinetis_i2c_endwait(struct kinetis_i2cdev_s *priv)
{
sem_post(&priv->wait);
nxsem_post(&priv->wait);
}
/************************************************************************************

4
arch/arm/src/kinetis/kinetis_sdhc.c
View File

@ -245,7 +245,7 @@ struct kinetis_sdhcregs_s
/* Low-level helpers ********************************************************/
static void kinetis_takesem(struct kinetis_dev_s *priv);
#define kinetis_givesem(priv) (sem_post(&priv->waitsem))
#define kinetis_givesem(priv) (nxsem_post(&priv->waitsem))
static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints,
sdio_eventset_t waitevents, sdio_eventset_t wkupevents);
static void kinetis_configxfrints(struct kinetis_dev_s *priv, uint32_t xfrints);
@ -2813,7 +2813,7 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Create a watchdog timer */

2
arch/arm/src/kinetis/kinetis_spi.c
View File

@ -599,7 +599,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;

2
arch/arm/src/kl/kl_spi.c
View File

@ -251,7 +251,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
}

4
arch/arm/src/lc823450/lc823450_adc.c
View File

@ -298,7 +298,7 @@ static inline void lc823450_adc_sem_wait(FAR struct lc823450_adc_inst_s *inst)
static inline void lc823450_adc_sem_post(FAR struct lc823450_adc_inst_s *inst)
{
sem_post(&inst->sem_excl);
nxsem_post(&inst->sem_excl);
}
/****************************************************************************
@ -315,7 +315,7 @@ static int lc823450_adc_isr(int irq, void *context, FAR void *arg)
ainfo("interrupt\n");
lc823450_adc_clearirq();
sem_post(&g_inst->sem_isr);
nxsem_post(&g_inst->sem_isr);
return OK;
}
#endif

8
arch/arm/src/lc823450/lc823450_i2c.c
View File

@ -276,7 +276,7 @@ static inline void lc823450_i2c_sem_wait(FAR struct lc823450_i2c_priv_s *priv)
static inline void lc823450_i2c_sem_post(FAR struct lc823450_i2c_priv_s *priv)
{
sem_post(&priv->sem_excl);
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
@ -714,7 +714,7 @@ static int lc823450_i2c_poll(FAR struct lc823450_i2c_priv_s *priv)
priv->irqstate = IRQSTATE_DONE;
#ifndef CONFIG_I2C_POLLED
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
#endif
}
@ -1184,9 +1184,9 @@ int lc823450_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
/* Release unused resources */
sem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
sem_destroy(&priv->sem_isr);
nxsem_destroy(&priv->sem_isr);
#endif
return OK;

6
arch/arm/src/lc823450/lc823450_mtd.c
View File

@ -154,7 +154,7 @@ static void mtd_semtake(FAR sem_t *sem)
static void mtd_semgive(FAR sem_t *sem)
{
sem_post(sem);
nxsem_post(sem);
}
/****************************************************************************
@ -535,7 +535,7 @@ static FAR struct mtd_dev_s *lc823450_mtd_allocdev(uint32_t channel)
if (ret != OK)
{
finfo("ERROR: Failed to initialize media\n");
sem_destroy(&priv->sem);
nxsem_destroy(&priv->sem);
kmm_free(priv);
return NULL;
}
@ -799,7 +799,7 @@ int lc823450_mtd_uninitialize(uint32_t devno)
ret = lc823450_sdc_finalize(ch);
DEBUGASSERT(ret == OK);
sem_destroy(&priv->sem);
nxsem_destroy(&priv->sem);
kmm_free(g_mtdmaster[ch]);

2
arch/arm/src/lc823450/lc823450_sdc.c
View File

@ -150,7 +150,7 @@ static void _sdc_semtake(FAR sem_t *sem)
static void _sdc_semgive(FAR sem_t *sem)
{
sem_post(sem);
nxsem_post(sem);
}
/****************************************************************************

2
arch/arm/src/lc823450/lc823450_sddrv_dep.c
View File

@ -121,7 +121,7 @@ static int _get_ch_from_cfg(struct SdDrCfg_s *cfg)
static void dma_callback(DMA_HANDLE hdma, void *arg, int result)
{
sem_t *waitsem = (sem_t *)arg;
sem_post(waitsem);
nxsem_post(waitsem);
}
#endif /* CONFIG_LC823450_SDC_DMA */

4
arch/arm/src/lc823450/lc823450_serial.c
View File

@ -1078,7 +1078,7 @@ static void uart_dma_callback(DMA_HANDLE hdma, void *arg, int result)
struct uart_dev_s *dev = (struct uart_dev_s *)arg;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
sem_t *waitsem = &priv->txdma_wait;
sem_post(waitsem);
nxsem_post(waitsem);
uart_datasent(dev);
}
@ -1214,7 +1214,7 @@ retry:
int i;
for (i = 0; i < buflen; i++)
up_serialout(priv, UART_USTF, buf[i]);
sem_post(&priv->txdma_wait);
nxsem_post(&priv->txdma_wait);
return buflen;
}

4
arch/arm/src/lc823450/lc823450_spi.c
View File

@ -165,7 +165,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
@ -320,7 +320,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
static void spi_dma_callback(DMA_HANDLE hdma, void *arg, int result)
{
sem_t *waitsem = (sem_t *)arg;
sem_post(waitsem);
nxsem_post(waitsem);
}
#endif /* CONFIG_LC823450_SPI_DMA */

2
arch/arm/src/lc823450/lc823450_timerisr.c
View File

@ -193,7 +193,7 @@ cont:
if (tmp->usec <= 0)
{
dq_rem(pent, &hrt_timer_queue);
sem_post(&tmp->sem);
nxsem_post(&tmp->sem);
goto cont;
}
else

6
arch/arm/src/lc823450/lc823450_usbdev.c
View File

@ -540,7 +540,7 @@ static int lc823450_epdisable(struct usbdev_ep_s *ep)
g_usbdev.bufoffset = 0x180;
privep->disable = 1;
lc823450_dmastop(hdma);
sem_post(&dma_wait);
nxsem_post(&dma_wait);
return lc823450_epclearreq(ep);
}
@ -1720,7 +1720,7 @@ void usbdev_msc_read_exit()
static void usbdev_dma_callback(DMA_HANDLE hd, void *arg, int result)
{
sem_t *waitsem = (sem_t *)arg;
sem_post(waitsem);
nxsem_post(waitsem);
}
/****************************************************************************
@ -1892,7 +1892,7 @@ int usbdev_msc_epread(void *buf, int len)
void usbdev_msc_stop(void)
{
lc823450_dmastop(hdma);
sem_post(&dma_wait);
nxsem_post(&dma_wait);
}
#endif /* CONFIG_USBMSC */

12
arch/arm/src/lpc11xx/lpc11_i2c.c
View File

@ -239,7 +239,7 @@ static void lpc11_i2c_stop(struct lpc11_i2cdev_s *priv)
priv->base + LPC11_I2C_CONSET_OFFSET);
}
sem_post(&priv->wait);
nxsem_post(&priv->wait);
}
/****************************************************************************
@ -256,7 +256,7 @@ static void lpc11_i2c_timeout(int argc, uint32_t arg, ...)
irqstate_t flags = enter_critical_section();
priv->state = 0xff;
sem_post(&priv->wait);
nxsem_post(&priv->wait);
leave_critical_section(flags);
}
@ -299,7 +299,7 @@ static int lpc11_i2c_transfer(FAR struct i2c_master_s *dev,
ret = lpc11_i2c_start(priv);
sem_post(&priv->mutex);
nxsem_post(&priv->mutex);
return ret;
}
@ -571,7 +571,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->wait, SEM_PRIO_NONE);
/* Allocate a watchdog timer */
@ -610,8 +610,8 @@ int lpc11_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
/* Reset data structures */
sem_destroy(&priv->mutex);
sem_destroy(&priv->wait);
nxsem_destroy(&priv->mutex);
nxsem_destroy(&priv->wait);
/* Free the watchdog timer */

2
arch/arm/src/lpc11xx/lpc11_spi.c
View File

@ -202,7 +202,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
}

2
arch/arm/src/lpc11xx/lpc11_ssp.c
View File

@ -350,7 +350,7 @@ static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
}

2
arch/arm/src/lpc17xx/lpc17_gpdma.c
View File

@ -416,7 +416,7 @@ DMA_HANDLE lpc17_dmachannel(void)
/* Return what we found (or not) */
sem_post(&g_gpdma.exclsem);
nxsem_post(&g_gpdma.exclsem);
return (DMA_HANDLE)dmach;
}

12
arch/arm/src/lpc17xx/lpc17_i2c.c
View File

@ -239,7 +239,7 @@ static void lpc17_i2c_stop(struct lpc17_i2cdev_s *priv)
priv->base + LPC17_I2C_CONSET_OFFSET);
}
sem_post(&priv->wait);
nxsem_post(&priv->wait);
}
/****************************************************************************
@ -256,7 +256,7 @@ static void lpc17_i2c_timeout(int argc, uint32_t arg, ...)
irqstate_t flags = enter_critical_section();
priv->state = 0xff;
sem_post(&priv->wait);
nxsem_post(&priv->wait);
leave_critical_section(flags);
}
@ -299,7 +299,7 @@ static int lpc17_i2c_transfer(FAR struct i2c_master_s *dev,
ret = lpc17_i2c_start(priv);
sem_post(&priv->mutex);
nxsem_post(&priv->mutex);
return ret;
}
@ -576,7 +576,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->wait, SEM_PRIO_NONE);
/* Allocate a watchdog timer */
@ -615,8 +615,8 @@ int lpc17_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
/* Reset data structures */
sem_destroy(&priv->mutex);
sem_destroy(&priv->wait);
nxsem_destroy(&priv->mutex);
nxsem_destroy(&priv->wait);
/* Free the watchdog timer */

4
arch/arm/src/lpc17xx/lpc17_sdcard.c
View File

@ -304,7 +304,7 @@ struct lpc17_sampleregs_s
/* Low-level helpers ********************************************************/
static void lpc17_takesem(struct lpc17_dev_s *priv);
#define lpc17_givesem(priv) (sem_post(&priv->waitsem))
#define lpc17_givesem(priv) (nxsem_post(&priv->waitsem))
static inline void lpc17_setclock(uint32_t clkcr);
static void lpc17_configwaitints(struct lpc17_dev_s *priv, uint32_t waitmask,
sdio_eventset_t waitevents, sdio_eventset_t wkupevents);
@ -2724,7 +2724,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Create a watchdog timer */

2
arch/arm/src/lpc17xx/lpc17_spi.c
View File

@ -198,7 +198,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
}

2
arch/arm/src/lpc17xx/lpc17_ssp.c
View File

@ -346,7 +346,7 @@ static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
}

12
arch/arm/src/lpc17xx/lpc17_usbhost.c
View File

@ -284,7 +284,7 @@ static void lpc17_putreg(uint32_t val, uint32_t addr);
/* Semaphores ******************************************************************/
static void lpc17_takesem(sem_t *sem);
#define lpc17_givesem(s) sem_post(s);
#define lpc17_givesem(s) nxsem_post(s);
/* Byte stream access helper functions *****************************************/
@ -2268,7 +2268,7 @@ static int lpc17_epalloc(struct usbhost_driver_s *drvr,
*/
nxsem_init(&ed->wdhsem, 0, 0);
sem_setprotocol(&ed->wdhsem, SEM_PRIO_NONE);
nxsem_setprotocol(&ed->wdhsem, SEM_PRIO_NONE);
/* Link the common tail TD to the ED's TD list */
@ -2307,7 +2307,7 @@ static int lpc17_epalloc(struct usbhost_driver_s *drvr,
/* No.. destroy it and report the error */
uerr("ERROR: Failed to queue ED for transfer type: %d\n", ed->xfrtype);
sem_destroy(&ed->wdhsem);
nxsem_destroy(&ed->wdhsem);
lpc17_edfree(ed);
}
else
@ -2385,7 +2385,7 @@ static int lpc17_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* Destroy the semaphore */
sem_destroy(&ed->wdhsem);
nxsem_destroy(&ed->wdhsem);
/* Put the ED back into the free list */
@ -3648,7 +3648,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
#ifndef CONFIG_USBHOST_INT_DISABLE
priv->ininterval = MAX_PERINTERVAL;
@ -3736,7 +3736,7 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
*/
nxsem_init(&EDCTRL->wdhsem, 0, 0);
sem_setprotocol(&EDCTRL->wdhsem, SEM_PRIO_NONE);
nxsem_setprotocol(&EDCTRL->wdhsem, SEM_PRIO_NONE);
/* Initialize user-configurable EDs */

12
arch/arm/src/lpc2378/lpc23xx_i2c.c
View File

@ -244,7 +244,7 @@ static void lpc2378_i2c_stop(struct lpc2378_i2cdev_s *priv)
priv->base + I2C_CONSET_OFFSET);
}
sem_post(&priv->wait);
nxsem_post(&priv->wait);
}
/****************************************************************************
@ -261,7 +261,7 @@ static void lpc2378_i2c_timeout(int argc, uint32_t arg, ...)
irqstate_t flags = enter_critical_section();
priv->state = 0xff;
sem_post(&priv->wait);
nxsem_post(&priv->wait);
leave_critical_section(flags);
}
@ -425,7 +425,7 @@ static int lpc2378_i2c_transfer(FAR struct i2c_master_s *dev,
ret = lpc2378_i2c_start(priv);
sem_post(&priv->mutex);
nxsem_post(&priv->mutex);
return ret;
}
@ -587,7 +587,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->wait, SEM_PRIO_NONE);
/* Allocate a watchdog timer */
@ -626,8 +626,8 @@ int lpc2378_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
/* Reset data structures */
sem_destroy(&priv->mutex);
sem_destroy(&priv->wait);
nxsem_destroy(&priv->mutex);
nxsem_destroy(&priv->wait);
/* Free the watchdog timer */

2
arch/arm/src/lpc2378/lpc23xx_spi.c
View File

@ -205,7 +205,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;

8
arch/arm/src/lpc31xx/lpc31_ehci.c
View File

@ -430,7 +430,7 @@ static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
/* Semaphores ******************************************************************/
static void lpc31_takesem(sem_t *sem);
#define lpc31_givesem(s) sem_post(s);
#define lpc31_givesem(s) nxsem_post(s);
/* Allocators ******************************************************************/
@ -3938,7 +3938,7 @@ static int lpc31_epalloc(FAR struct usbhost_driver_s *drvr,
*/
nxsem_init(&epinfo->iocsem, 0, 0);
sem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
nxsem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
/* Success.. return an opaque reference to the endpoint information structure
* instance
@ -4927,7 +4927,7 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
* priority inheritance enabled.
*/
sem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
nxsem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
/* Initialize EP0 */
@ -4971,7 +4971,7 @@ FAR struct usbhost_connection_s *lpc31_ehci_initialize(int controller)
*/
nxsem_init(&rhport->ep0.iocsem, 0, 0);
sem_setprotocol(&rhport->iocsem, SEM_PRIO_NONE);
nxsem_setprotocol(&rhport->iocsem, SEM_PRIO_NONE);
/* Initialize the public port representation */

10
arch/arm/src/lpc31xx/lpc31_i2c.c
View File

@ -219,7 +219,7 @@ static void i2c_progress(struct lpc31_i2cdev_s *priv)
/* FIXME: automatic retry? */
priv->state = I2C_STATE_DONE;
sem_post(&priv->wait);
nxsem_post(&priv->wait);
return;
}
@ -388,7 +388,7 @@ out:
}
priv->state = I2C_STATE_DONE;
sem_post(&priv->wait);
nxsem_post(&priv->wait);
}
}
@ -427,7 +427,7 @@ static void i2c_timeout(int argc, uint32_t arg, ...)
/* Mark the transfer as finished */
priv->state = I2C_STATE_DONE;
sem_post(&priv->wait);
nxsem_post(&priv->wait);
}
leave_critical_section(flags);
@ -503,7 +503,7 @@ static int i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs
ret = count - priv->nmsg;
leave_critical_section(flags);
sem_post(&priv->mutex);
nxsem_post(&priv->mutex);
return ret;
}
@ -558,7 +558,7 @@ struct i2c_master_s *lpc31_i2cbus_initialize(int port)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->wait, SEM_PRIO_NONE);
/* Enable I2C system clocks */

2
arch/arm/src/lpc31xx/lpc31_spi.c
View File

@ -459,7 +459,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
}

8
arch/arm/src/lpc43xx/lpc43_ehci.c
View File

@ -429,7 +429,7 @@ static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
/* Semaphores ******************************************************************/
static void lpc43_takesem(sem_t *sem);
#define lpc43_givesem(s) sem_post(s);
#define lpc43_givesem(s) nxsem_post(s);
/* Allocators ******************************************************************/
@ -3775,7 +3775,7 @@ static int lpc43_epalloc(FAR struct usbhost_driver_s *drvr,
*/
nxsem_init(&epinfo->iocsem, 0, 0);
sem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
nxsem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
/* Success.. return an opaque reference to the endpoint information structure
* instance
@ -4758,7 +4758,7 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
* priority inheritance enabled.
*/
sem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
nxsem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
/* Initialize EP0 */
@ -4802,7 +4802,7 @@ FAR struct usbhost_connection_s *lpc43_ehci_initialize(int controller)
*/
nxsem_init(&rhport->ep0.iocsem, 0, 0);
sem_setprotocol(&rhport->ep0.iocsem, SEM_PRIO_NONE);
nxsem_setprotocol(&rhport->ep0.iocsem, SEM_PRIO_NONE);
/* Initialize the public port representation */

2
arch/arm/src/lpc43xx/lpc43_gpdma.c
View File

@ -417,7 +417,7 @@ DMA_HANDLE lpc43_dmachannel(void)
/* Return what we found (or not) */
sem_post(&g_gpdma.exclsem);
nxsem_post(&g_gpdma.exclsem);
return (DMA_HANDLE)dmach;
}

8
arch/arm/src/lpc43xx/lpc43_i2c.c
View File

@ -225,7 +225,7 @@ static void lpc43_i2c_stop(struct lpc43_i2cdev_s *priv)
priv->base + LPC43_I2C_CONSET_OFFSET);
}
sem_post(&priv->wait);
nxsem_post(&priv->wait);
}
/****************************************************************************
@ -242,7 +242,7 @@ static void lpc43_i2c_timeout(int argc, uint32_t arg, ...)
irqstate_t flags = enter_critical_section();
priv->state = 0xff;
sem_post(&priv->wait);
nxsem_post(&priv->wait);
leave_critical_section(flags);
}
@ -406,7 +406,7 @@ static int lpc43_i2c_transfer(FAR struct i2c_master_s *dev,
ret = lpc43_i2c_start(priv);
sem_post(&priv->mutex);
nxsem_post(&priv->mutex);
return ret;
}
@ -533,7 +533,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->wait, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->wait, SEM_PRIO_NONE);
/* Allocate a watchdog timer */

2
arch/arm/src/lpc43xx/lpc43_spi.c
View File

@ -192,7 +192,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
}

2
arch/arm/src/lpc43xx/lpc43_ssp.c
View File

@ -288,7 +288,7 @@ static int ssp_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;

2
arch/arm/src/sam34/sam4cm_tc.c
View File

@ -129,7 +129,7 @@ struct sam_chan_s
/* Low-level helpers ********************************************************/
static void sam_takesem(struct sam_chan_s *chan);
#define sam_givesem(chan) (sem_post(&chan->exclsem))
#define sam_givesem(chan) (nxsem_post(&chan->exclsem))
#ifdef CONFIG_SAM34_TC_REGDEBUG
static void sam_regdump(struct sam_chan_s *chan, const char *msg);

2
arch/arm/src/sam34/sam_aes.c
View File

@ -93,7 +93,7 @@ static void aes_lock(void)
static void aes_unlock(void)
{
sem_post(&lock);
nxsem_post(&lock);
}
static void aes_memcpy(void *out, const void *in, size_t size)

4
arch/arm/src/sam34/sam_dmac.c
View File

@ -288,7 +288,7 @@ static void sam_takechsem(void)
static inline void sam_givechsem(void)
{
(void)sem_post(&g_chsem);
(void)nxsem_post(&g_chsem);
}
/****************************************************************************
@ -315,7 +315,7 @@ static void sam_takedsem(void)
static inline void sam_givedsem(void)
{
(void)sem_post(&g_dsem);
(void)nxsem_post(&g_dsem);
}
/****************************************************************************

4
arch/arm/src/sam34/sam_hsmci.c
View File

@ -405,7 +405,7 @@ struct sam_xfrregs_s
/* Low-level helpers ********************************************************/
static void sam_takesem(struct sam_dev_s *priv);
#define sam_givesem(priv) (sem_post(&priv->waitsem))
#define sam_givesem(priv) (nxsem_post(&priv->waitsem))
static void sam_configwaitints(struct sam_dev_s *priv, uint32_t waitmask,
sdio_eventset_t waitevents);
@ -2687,7 +2687,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Create a watchdog timer */

8
arch/arm/src/sam34/sam_spi.c
View File

@ -745,7 +745,7 @@ static void spi_dmatimeout(int argc, uint32_t arg)
/* Then wake up the waiting thread */
sem_post(&spics->dmawait);
nxsem_post(&spics->dmawait);
}
#endif
@ -792,7 +792,7 @@ static void spi_rxcallback(DMA_HANDLE handle, void *arg, int result)
/* Then wake up the waiting thread */
sem_post(&spics->dmawait);
nxsem_post(&spics->dmawait);
}
#endif
@ -893,7 +893,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&spi->spisem);
(void)nxsem_post(&spi->spisem);
}
return OK;
@ -1888,7 +1888,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
*/
nxsem_init(&spics->dmawait, 0, 0);
sem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
nxsem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
/* Create a watchdog time to catch DMA timeouts */

8
arch/arm/src/sam34/sam_twi.c
View File

@ -141,7 +141,7 @@ struct twi_dev_s
/* Low-level helper functions */
static void twi_takesem(sem_t *sem);
#define twi_givesem(sem) (sem_post(sem))
#define twi_givesem(sem) (nxsem_post(sem))
#ifdef CONFIG_SAM34_TWI_REGDEBUG
static bool twi_checkreg(struct twi_dev_s *priv, bool wr,
@ -974,7 +974,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Allocate a watchdog timer */
@ -1017,8 +1017,8 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
/* Reset data structures */
sem_destroy(&priv->exclsem);
sem_destroy(&priv->waitsem);
nxsem_destroy(&priv->exclsem);
nxsem_destroy(&priv->waitsem);
/* Free the watchdog timer */

2
arch/arm/src/sama5/sam_adc.c
View File

@ -2174,7 +2174,7 @@ void sam_adc_lock(FAR struct sam_adc_s *priv)
void sam_adc_unlock(FAR struct sam_adc_s *priv)
{
ainfo("Unlocking\n");
sem_post(&priv->exclsem);
nxsem_post(&priv->exclsem);
}
/****************************************************************************

2
arch/arm/src/sama5/sam_can.c
View File

@ -199,7 +199,7 @@ static void can_dumpmbregs(FAR struct sam_can_s *priv, FAR const char *msg);
/* Semaphore helpers */
static void can_semtake(FAR struct sam_can_s *priv);
#define can_semgive(priv) sem_post(&priv->exclsem)
#define can_semgive(priv) nxsem_post(&priv->exclsem)
/* Mailboxes */

4
arch/arm/src/sama5/sam_dmac.c
View File

@ -501,7 +501,7 @@ static void sam_takechsem(struct sam_dmac_s *dmac)
static inline void sam_givechsem(struct sam_dmac_s *dmac)
{
(void)sem_post(&dmac->chsem);
(void)nxsem_post(&dmac->chsem);
}
/****************************************************************************
@ -528,7 +528,7 @@ static void sam_takedsem(struct sam_dmac_s *dmac)
static inline void sam_givedsem(struct sam_dmac_s *dmac)
{
(void)sem_post(&dmac->dsem);
(void)nxsem_post(&dmac->dsem);
}
/****************************************************************************

8
arch/arm/src/sama5/sam_ehci.c
View File

@ -309,7 +309,7 @@ static int ehci_wait_usbsts(uint32_t maskbits, uint32_t donebits,
/* Semaphores ******************************************************************/
static void sam_takesem(sem_t *sem);
#define sam_givesem(s) sem_post(s);
#define sam_givesem(s) nxsem_post(s);
/* Allocators ******************************************************************/
@ -3759,7 +3759,7 @@ static int sam_epalloc(FAR struct usbhost_driver_s *drvr,
*/
nxsem_init(&epinfo->iocsem, 0, 0);
sem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
nxsem_setprotocol(&epinfo->iocsem, SEM_PRIO_NONE);
/* Success.. return an opaque reference to the endpoint information structure
* instance
@ -4798,7 +4798,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
* priority inheritance enabled.
*/
sem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
nxsem_setprotocol(&g_ehci.pscsem, SEM_PRIO_NONE);
/* Initialize EP0 */
@ -4842,7 +4842,7 @@ FAR struct usbhost_connection_s *sam_ehci_initialize(int controller)
*/
nxsem_init(&rhport->ep0.iocsem, 0, 0);
sem_setprotocol(&rhport->ep0.iocsem, SEM_PRIO_NONE);
nxsem_setprotocol(&rhport->ep0.iocsem, SEM_PRIO_NONE);
/* Initialize the public port representation */

4
arch/arm/src/sama5/sam_hsmci.c
View File

@ -464,7 +464,7 @@ struct sam_dev_s
/* Low-level helpers ********************************************************/
static void sam_takesem(struct sam_dev_s *priv);
#define sam_givesem(priv) (sem_post(&priv->waitsem))
#define sam_givesem(priv) (nxsem_post(&priv->waitsem))
#ifdef CONFIG_SAMA5_HSMCI_REGDEBUG
static bool sam_checkreg(struct sam_dev_s *priv, bool wr,
@ -3304,7 +3304,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Create a watchdog timer */

14
arch/arm/src/sama5/sam_nand.c
View File

@ -342,7 +342,7 @@ void nand_lock(void)
#if NAND_NBANKS > 1
void nand_unlock(void)
{
sem_post(&g_nand.exclsem);
nxsem_post(&g_nand.exclsem);
}
#endif
@ -1077,7 +1077,7 @@ static int hsmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Post the XFRDONE event */
sem_post(&g_nand.waitsem);
nxsem_post(&g_nand.waitsem);
/* Disable further XFRDONE interrupts */
@ -1092,7 +1092,7 @@ static int hsmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Post the CMDDONE event */
sem_post(&g_nand.waitsem);
nxsem_post(&g_nand.waitsem);
/* Disable further CMDDONE interrupts */
@ -1109,7 +1109,7 @@ static int hsmc_interrupt(int irq, void *context, FAR void *arg)
{
/* Post the RBEDGE0 event */
sem_post(&g_nand.waitsem);
nxsem_post(&g_nand.waitsem);
/* Disable further RBEDGE0 interrupts */
@ -1261,7 +1261,7 @@ static void nand_dmacallback(DMA_HANDLE handle, void *arg, int result)
priv->result = result;
priv->dmadone = true;
sem_post(&priv->waitsem);
nxsem_post(&priv->waitsem);
}
#endif
@ -2950,7 +2950,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
*/
nxsem_init(&priv->waitsem, 0, 0);
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
#endif
/* Perform one-time, global NFC/PMECC initialization */
@ -2969,7 +2969,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
*/
nxsem_init(&g_nand.waitsem, 0, 0);
sem_setprotocol(&g_nand.waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&g_nand.waitsem, SEM_PRIO_NONE);
#endif
/* Enable the NAND FLASH Controller (The NFC is always used) */

8
arch/arm/src/sama5/sam_ohci.c
View File

@ -355,7 +355,7 @@ static void sam_putreg(uint32_t val, uint32_t addr);
/* Semaphores ******************************************************************/
static void sam_takesem(sem_t *sem);
#define sam_givesem(s) sem_post(s);
#define sam_givesem(s) nxsem_post(s);
/* Byte stream access helper functions *****************************************/
@ -2669,7 +2669,7 @@ static int sam_epalloc(struct usbhost_driver_s *drvr,
* priority inheritance enabled.
*/
sem_setprotocol(&eplist->wdhsem, SEM_PRIO_NONE);
nxsem_setprotocol(&eplist->wdhsem, SEM_PRIO_NONE);
/* We must have exclusive access to the ED pool, the bulk list, the periodic list
* and the interrupt table.
@ -2891,7 +2891,7 @@ static int sam_epfree(struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* And free the container */
sem_destroy(&eplist->wdhsem);
nxsem_destroy(&eplist->wdhsem);
kmm_free(eplist);
sam_givesem(&g_ohci.exclsem);
return ret;
@ -3914,7 +3914,7 @@ struct usbhost_connection_s *sam_ohci_initialize(int controller)
* priority inheritance enabled.
*/
sem_setprotocol(&g_ohci.pscsem, SEM_PRIO_NONE);
nxsem_setprotocol(&g_ohci.pscsem, SEM_PRIO_NONE);
#ifndef CONFIG_USBHOST_INT_DISABLE
g_ohci.ininterval = MAX_PERINTERVAL;

2
arch/arm/src/sama5/sam_pmecc.c
View File

@ -1264,7 +1264,7 @@ void pmecc_lock(void)
#if NAND_NPMECC_BANKS > 1
void pmecc_unlock(void)
{
sem_post(&g_pmecc.exclsem);
nxsem_post(&g_pmecc.exclsem);
}
#endif

8
arch/arm/src/sama5/sam_spi.c
View File

@ -734,7 +734,7 @@ static void spi_dmatimeout(int argc, uint32_t arg)
/* Then wake up the waiting thread */
sem_post(&spics->dmawait);
nxsem_post(&spics->dmawait);
}
#endif
@ -781,7 +781,7 @@ static void spi_rxcallback(DMA_HANDLE handle, void *arg, int result)
/* Then wake up the waiting thread */
sem_post(&spics->dmawait);
nxsem_post(&spics->dmawait);
}
#endif
@ -882,7 +882,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&spi->spisem);
(void)nxsem_post(&spi->spisem);
}
return OK;
@ -1816,7 +1816,7 @@ struct spi_dev_s *sam_spibus_initialize(int port)
*/
nxsem_init(&spics->dmawait, 0, 0);
sem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
nxsem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
/* Create a watchdog time to catch DMA timeouts */

6
arch/arm/src/sama5/sam_ssc.c
View File

@ -545,10 +545,10 @@ static void ssc_dump_queues(struct sam_transport_s *xpt,
/* Semaphore helpers */
static void ssc_exclsem_take(struct sam_ssc_s *priv);
#define ssc_exclsem_give(priv) sem_post(&priv->exclsem)
#define ssc_exclsem_give(priv) nxsem_post(&priv->exclsem)
static void ssc_bufsem_take(struct sam_ssc_s *priv);
#define ssc_bufsem_give(priv) sem_post(&priv->bufsem)
#define ssc_bufsem_give(priv) nxsem_post(&priv->bufsem)
/* Buffer container helpers */
@ -3502,7 +3502,7 @@ errout_with_clocking:
ssc_dma_free(priv);
errout_with_alloc:
sem_destroy(&priv->exclsem);
nxsem_destroy(&priv->exclsem);
kmm_free(priv);
return NULL;
}

2
arch/arm/src/sama5/sam_tc.c
View File

@ -150,7 +150,7 @@ struct sam_tc_s
/* Low-level helpers ********************************************************/
static void sam_takesem(struct sam_tc_s *tc);
#define sam_givesem(tc) (sem_post(&tc->exclsem))
#define sam_givesem(tc) (nxsem_post(&tc->exclsem))
#ifdef CONFIG_SAMA5_TC_REGDEBUG
static void sam_regdump(struct sam_chan_s *chan, const char *msg);

6
arch/arm/src/sama5/sam_trng.c
View File

@ -223,7 +223,7 @@ static int sam_interrupt(int irq, void *context, FAR void *arg)
/* And wakeup the waiting read thread. */
sem_post(&g_trngdev.waitsem);
nxsem_post(&g_trngdev.waitsem);
return OK;
}
}
@ -324,7 +324,7 @@ errout:
/* Release our lock on the TRNG hardware */
sem_post(&g_trngdev.exclsem);
nxsem_post(&g_trngdev.exclsem);
finfo("Return %d\n", (int)retval);
return retval;
@ -363,7 +363,7 @@ static int sam_rng_initialize(void)
* priority inheritance enabled.
*/
sem_setprotocol(&g_trngdev.waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&g_trngdev.waitsem, SEM_PRIO_NONE);
/* Enable clocking to the TRNG */

8
arch/arm/src/sama5/sam_tsd.c
View File

@ -270,7 +270,7 @@ static void sam_tsd_notify(struct sam_tsd_s *priv)
* is no longer available.
*/
sem_post(&priv->waitsem);
nxsem_post(&priv->waitsem);
}
/* If there are threads waiting on poll() for touchscreen data to become available,
@ -287,7 +287,7 @@ static void sam_tsd_notify(struct sam_tsd_s *priv)
{
fds->revents |= POLLIN;
iinfo("Report events: %02x\n", fds->revents);
sem_post(fds->sem);
nxsem_post(fds->sem);
}
}
#endif
@ -1675,7 +1675,7 @@ int sam_tsd_register(struct sam_adc_s *adc, int minor)
*/
nxsem_init(&priv->waitsem, 0, 0);
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Register the device as an input device */
@ -1696,7 +1696,7 @@ int sam_tsd_register(struct sam_adc_s *adc, int minor)
return OK;
errout_with_priv:
sem_destroy(&priv->waitsem);
nxsem_destroy(&priv->waitsem);
return ret;
}

8
arch/arm/src/sama5/sam_twi.c
View File

@ -178,7 +178,7 @@ struct twi_dev_s
/* Low-level helper functions */
static void twi_takesem(sem_t *sem);
#define twi_givesem(sem) (sem_post(sem))
#define twi_givesem(sem) (nxsem_post(sem))
#ifdef CONFIG_SAMA5_TWI_REGDEBUG
static bool twi_checkreg(struct twi_dev_s *priv, bool wr,
@ -1275,7 +1275,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Perform repeatable TWI hardware initialization */
@ -1312,8 +1312,8 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
/* Reset data structures */
sem_destroy(&priv->exclsem);
sem_destroy(&priv->waitsem);
nxsem_destroy(&priv->exclsem);
nxsem_destroy(&priv->waitsem);
/* Free the watchdog timer */

4
arch/arm/src/sama5/sam_xdmac.c
View File

@ -659,7 +659,7 @@ static void sam_takechsem(struct sam_xdmac_s *xdmac)
static inline void sam_givechsem(struct sam_xdmac_s *xdmac)
{
(void)sem_post(&xdmac->chsem);
(void)nxsem_post(&xdmac->chsem);
}
/****************************************************************************
@ -686,7 +686,7 @@ static void sam_takedsem(struct sam_xdmac_s *xdmac)
static inline void sam_givedsem(struct sam_xdmac_s *xdmac)
{
(void)sem_post(&xdmac->dsem);
(void)nxsem_post(&xdmac->dsem);
}
/****************************************************************************

4
arch/arm/src/samdl/sam_dmac.c
View File

@ -192,7 +192,7 @@ static void sam_takechsem(void)
static inline void sam_givechsem(void)
{
(void)sem_post(&g_chsem);
(void)nxsem_post(&g_chsem);
}
/****************************************************************************
@ -220,7 +220,7 @@ static void sam_takedsem(void)
static inline void sam_givedsem(void)
{
(void)sem_post(&g_dsem);
(void)nxsem_post(&g_dsem);
}
#endif

8
arch/arm/src/samdl/sam_i2c_master.c
View File

@ -200,7 +200,7 @@ static void i2c_putreg32(struct sam_i2c_dev_s *priv, uint32_t regval,
unsigned int offset);
static void i2c_takesem(sem_t * sem);
#define i2c_givesem(sem) (sem_post(sem))
#define i2c_givesem(sem) (nxsem_post(sem))
#ifdef CONFIG_SAM_I2C_REGDEBUG
static bool i2c_checkreg(struct sam_i2c_dev_s *priv, bool wr,
@ -650,7 +650,7 @@ static void i2c_wakeup(struct sam_i2c_dev_s *priv, int result)
/* Wake up the waiting thread with the result of the transfer */
priv->result = result;
sem_post(&priv->waitsem);
nxsem_post(&priv->waitsem);
}
/*******************************************************************************
@ -1374,8 +1374,8 @@ int sam_i2c_uninitialize(FAR struct i2c_master_s *dev)
/* Reset data structures */
sem_destroy(&priv->exclsem);
sem_destroy(&priv->waitsem);
nxsem_destroy(&priv->exclsem);
nxsem_destroy(&priv->waitsem);
/* Detach Interrupt Handler */

2
arch/arm/src/samdl/sam_spi.c
View File

@ -797,7 +797,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->spilock);
(void)nxsem_post(&priv->spilock);
}
return OK;

4
arch/arm/src/samv7/sam_hsmci.c
View File

@ -399,7 +399,7 @@ struct sam_dev_s
/* Low-level helpers ********************************************************/
static void sam_takesem(struct sam_dev_s *priv);
#define sam_givesem(priv) (sem_post(&priv->waitsem))
#define sam_givesem(priv) (nxsem_post(&priv->waitsem))
#ifdef CONFIG_SAMV7_HSMCI_REGDEBUG
static bool sam_checkreg(struct sam_dev_s *priv, bool wr,
@ -3336,7 +3336,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Create a watchdog timer */

8
arch/arm/src/samv7/sam_mcan.c
View File

@ -922,7 +922,7 @@ static void mcan_dumpregs(FAR struct sam_mcan_s *priv, FAR const char *msg);
/* Semaphore helpers */
static void mcan_dev_lock(FAR struct sam_mcan_s *priv);
#define mcan_dev_unlock(priv) sem_post(&priv->locksem)
#define mcan_dev_unlock(priv) nxsem_post(&priv->locksem)
static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv);
static void mcan_buffer_release(FAR struct sam_mcan_s *priv);
@ -1502,7 +1502,7 @@ static void mcan_buffer_reserve(FAR struct sam_mcan_s *priv)
{
/* Bump up the count by one and try again */
sem_post(&priv->txfsem);
nxsem_post(&priv->txfsem);
leave_critical_section(flags);
continue;
}
@ -1590,7 +1590,7 @@ static void mcan_buffer_release(FAR struct sam_mcan_s *priv)
(void)nxsem_getvalue(&priv->txfsem, &sval);
if (sval < priv->config->ntxfifoq)
{
sem_post(&priv->txfsem);
nxsem_post(&priv->txfsem);
}
else
{
@ -2269,7 +2269,7 @@ static void mcan_reset(FAR struct can_dev_s *dev)
* will not wake up any waiting threads.
*/
sem_destroy(&priv->txfsem);
nxsem_destroy(&priv->txfsem);
nxsem_init(&priv->txfsem, 0, config->ntxfifoq);
/* Disable peripheral clocking to the MCAN controller */

2
arch/arm/src/samv7/sam_progmem.c
View File

@ -200,7 +200,7 @@ static void page_buffer_lock(void)
}
}
#define page_buffer_unlock() sem_post(&g_page_sem)
#define page_buffer_unlock() nxsem_post(&g_page_sem)
/****************************************************************************
* Name: efc_command

12
arch/arm/src/samv7/sam_qspi.c
View File

@ -603,7 +603,7 @@ static void qspi_dma_timeout(int argc, uint32_t arg)
/* Then wake up the waiting thread */
sem_post(&priv->dmawait);
nxsem_post(&priv->dmawait);
}
#endif
@ -650,7 +650,7 @@ static void qspi_dma_callback(DMA_HANDLE handle, void *arg, int result)
/* Then wake up the waiting thread */
sem_post(&priv->dmawait);
nxsem_post(&priv->dmawait);
}
#endif
@ -1078,7 +1078,7 @@ static int qspi_lock(struct qspi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
@ -1796,7 +1796,7 @@ struct qspi_dev_s *sam_qspi_initialize(int intf)
*/
nxsem_init(&priv->dmawait, 0, 0);
sem_setprotocol(&priv->dmawait, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->dmawait, SEM_PRIO_NONE);
/* Create a watchdog time to catch DMA timeouts */
@ -1850,7 +1850,7 @@ errout_with_dmadog:
wd_delete(priv->dmadog);
errout_with_dmahandles:
sem_destroy(&priv->dmawait);
nxsem_destroy(&priv->dmawait);
if (priv->dmach)
{
@ -1859,7 +1859,7 @@ errout_with_dmahandles:
}
#endif
sem_destroy(&priv->exclsem);
nxsem_destroy(&priv->exclsem);
return NULL;
}
#endif /* CONFIG_SAMV7_QSPI */

8
arch/arm/src/samv7/sam_spi.c
View File

@ -772,7 +772,7 @@ static void spi_dmatimeout(int argc, uint32_t arg)
/* Then wake up the waiting thread */
sem_post(&spics->dmawait);
nxsem_post(&spics->dmawait);
}
#endif
@ -819,7 +819,7 @@ static void spi_rxcallback(DMA_HANDLE handle, void *arg, int result)
/* Then wake up the waiting thread */
sem_post(&spics->dmawait);
nxsem_post(&spics->dmawait);
}
#endif
@ -920,7 +920,7 @@ static int spi_lock(struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&spi->spisem);
(void)nxsem_post(&spi->spisem);
}
return OK;
@ -2173,7 +2173,7 @@ FAR struct spi_dev_s *sam_spibus_initialize(int port)
*/
nxsem_init(&spics->dmawait, 0, 0);
sem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
nxsem_setprotocol(&spics->dmawait, SEM_PRIO_NONE);
/* Create a watchdog time to catch DMA timeouts */

2
arch/arm/src/samv7/sam_spi_slave.c
View File

@ -142,7 +142,7 @@ static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg);
#endif
static void spi_semtake(struct sam_spidev_s *priv);
#define spi_semgive(priv) (sem_post(&(priv)->spisem))
#define spi_semgive(priv) (nxsem_post(&(priv)->spisem))
/* Interrupt Handling */

6
arch/arm/src/samv7/sam_ssc.c
View File

@ -520,10 +520,10 @@ static void ssc_dump_queues(struct sam_transport_s *xpt,
/* Semaphore helpers */
static void ssc_exclsem_take(struct sam_ssc_s *priv);
#define ssc_exclsem_give(priv) sem_post(&priv->exclsem)
#define ssc_exclsem_give(priv) nxsem_post(&priv->exclsem)
static void ssc_bufsem_take(struct sam_ssc_s *priv);
#define ssc_bufsem_give(priv) sem_post(&priv->bufsem)
#define ssc_bufsem_give(priv) nxsem_post(&priv->bufsem)
/* Buffer container helpers */
@ -3478,7 +3478,7 @@ errout_with_clocking:
ssc_dma_free(priv);
errout_with_alloc:
sem_destroy(&priv->exclsem);
nxsem_destroy(&priv->exclsem);
kmm_free(priv);
return NULL;
}

2
arch/arm/src/samv7/sam_tc.c
View File

@ -160,7 +160,7 @@ struct mck_divsrc_s
/* Low-level helpers ********************************************************/
static void sam_takesem(struct sam_tc_s *tc);
#define sam_givesem(tc) (sem_post(&tc->exclsem))
#define sam_givesem(tc) (nxsem_post(&tc->exclsem))
#ifdef CONFIG_SAMV7_TC_REGDEBUG
static void sam_regdump(struct sam_chan_s *chan, const char *msg);

6
arch/arm/src/samv7/sam_trng.c
View File

@ -224,7 +224,7 @@ static int sam_interrupt(int irq, void *context, FAR void *arg)
/* And wakeup the waiting read thread. */
sem_post(&g_trngdev.waitsem);
nxsem_post(&g_trngdev.waitsem);
return OK;
}
}
@ -325,7 +325,7 @@ errout:
/* Release our lock on the TRNG hardware */
sem_post(&g_trngdev.exclsem);
nxsem_post(&g_trngdev.exclsem);
finfo("Return %d\n", (int)retval);
return retval;
@ -364,7 +364,7 @@ static int sam_rng_initialize(void)
* priority inheritance enabled.
*/
sem_setprotocol(&g_trngdev.waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&g_trngdev.waitsem, SEM_PRIO_NONE);
/* Enable clocking to the TRNG */

8
arch/arm/src/samv7/sam_twihs.c
View File

@ -177,7 +177,7 @@ struct twi_dev_s
/* Low-level helper functions */
static void twi_takesem(sem_t *sem);
#define twi_givesem(sem) (sem_post(sem))
#define twi_givesem(sem) (nxsem_post(sem))
#ifdef CONFIG_SAMV7_TWIHSHS_REGDEBUG
static bool twi_checkreg(struct twi_dev_s *priv, bool wr,
@ -1440,7 +1440,7 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
* have priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Perform repeatable TWIHS hardware initialization */
@ -1494,8 +1494,8 @@ int sam_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
/* Reset data structures */
sem_destroy(&priv->exclsem);
sem_destroy(&priv->waitsem);
nxsem_destroy(&priv->exclsem);
nxsem_destroy(&priv->waitsem);
/* Free the watchdog timer */

4
arch/arm/src/samv7/sam_xdmac.c
View File

@ -384,7 +384,7 @@ static void sam_takechsem(struct sam_xdmac_s *xdmac)
static inline void sam_givechsem(struct sam_xdmac_s *xdmac)
{
(void)sem_post(&xdmac->chsem);
(void)nxsem_post(&xdmac->chsem);
}
/****************************************************************************
@ -411,7 +411,7 @@ static void sam_takedsem(struct sam_xdmac_s *xdmac)
static inline void sam_givedsem(struct sam_xdmac_s *xdmac)
{
(void)sem_post(&xdmac->dsem);
(void)nxsem_post(&xdmac->dsem);
}
/****************************************************************************

18
arch/arm/src/stm32/stm32_1wire.c
View File

@ -715,7 +715,7 @@ static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
}
/****************************************************************************
@ -728,8 +728,8 @@ static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv)
static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
{
sem_destroy(&priv->sem_excl);
sem_destroy(&priv->sem_isr);
nxsem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_isr);
}
/****************************************************************************
@ -758,7 +758,7 @@ static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv)
{
sem_post(&priv->sem_excl);
nxsem_post(&priv->sem_excl);
}
/****************************************************************************
@ -910,7 +910,7 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
case ONEWIRETASK_RESET:
priv->msgs = NULL;
priv->result = (dr != RESET_TX) ? OK : -ENODEV; /* if read RESET_TX then no slave */
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
break;
case ONEWIRETASK_WRITE:
@ -921,7 +921,7 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
{
priv->msgs = NULL;
priv->result = OK;
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
break;
}
}
@ -948,7 +948,7 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
{
priv->msgs = NULL;
priv->result = OK;
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
break;
}
}
@ -988,7 +988,7 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
{
priv->msgs = NULL;
priv->result = ERROR;
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
}
}
@ -1003,7 +1003,7 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
{
priv->msgs = NULL;
priv->result = ERROR;
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
}
}

4
arch/arm/src/stm32/stm32_aes.c
View File

@ -267,7 +267,7 @@ int aes_cypher(void *out, const void *in, uint32_t size, const void *iv,
aes_enable(false);
out:
sem_post(&aes_lock);
nxsem_post(&aes_lock);
return ret;
}
@ -314,7 +314,7 @@ int up_aesuninitialize(void)
regval &= ~RCC_AHBENR_AESEN;
putreg32(regval, STM32_RCC_AHBENR);
sem_destroy(&aes_lock);
nxsem_destroy(&aes_lock);
return OK;
}

6
arch/arm/src/stm32/stm32_bbsram.c
View File

@ -205,7 +205,7 @@ static void stm32_bbsram_dump(FAR struct bbsramfh_s *bbf, char *op)
static void stm32_bbsram_semgive(FAR struct stm32_bbsram_s *priv)
{
sem_post(&priv->exclsem);
nxsem_post(&priv->exclsem);
}
/************************************************************************************
@ -554,7 +554,7 @@ static int stm32_bbsram_poll(FAR struct file *filep, FAR struct pollfd *fds,
fds->revents |= (fds->events & (POLLIN | POLLOUT));
if (fds->revents != 0)
{
sem_post(fds->sem);
nxsem_post(fds->sem);
}
}
@ -635,7 +635,7 @@ static int stm32_bbsram_unlink(FAR struct inode *inode)
stm32_bbsram_lock();
bbr->refs = 0;
stm32_bbsram_semgive(bbr);
sem_destroy(&bbr->exclsem);
nxsem_destroy(&bbr->exclsem);
return 0;
}
#endif

41
arch/arm/src/stm32/stm32_dma2d.c
View File

@ -468,12 +468,11 @@ static int stm32_dma2dirq(int irq, void *context, FAR void *arg)
if (priv->wait)
{
int ret = sem_post(priv->sem);
int ret = nxsem_post(priv->sem);
if (ret != OK)
if (ret < 0)
{
lcderr("ERROR: sem_post() failed\n");
return ret;
lcderr("ERROR: nxsem_post() failed\n");
}
}
@ -1181,7 +1180,7 @@ static int stm32_dma2dgetvideoinfo(FAR struct dma2d_layer_s *layer,
{
sem_wait(priv->lock);
memcpy(vinfo, &priv->vinfo, sizeof(struct fb_videoinfo_s));
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1218,7 +1217,7 @@ static int stm32_dma2dgetplaneinfo(FAR struct dma2d_layer_s *layer, int planeno,
{
sem_wait(priv->lock);
memcpy(pinfo, &priv->pinfo, sizeof(struct fb_planeinfo_s));
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1253,7 +1252,7 @@ static int stm32_dma2dgetlid(FAR struct dma2d_layer_s *layer, int *lid)
{
sem_wait(priv->lock);
*lid = priv->lid;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1315,7 +1314,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
ret = ltdc->setclut(ltdc, cmap);
sem_post(priv->lock);
nxsem_post(priv->lock);
return ret;
}
@ -1373,7 +1372,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
ret = OK;
}
sem_post(priv->lock);
nxsem_post(priv->lock);
return ret;
}
@ -1459,7 +1458,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
ret = OK;
}
sem_post(priv->lock);
nxsem_post(priv->lock);
return ret;
}
@ -1500,7 +1499,7 @@ static int stm32_dma2dsetalpha(FAR struct dma2d_layer_s *layer, uint8_t alpha)
{
sem_wait(priv->lock);
priv->alpha = alpha;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1535,7 +1534,7 @@ static int stm32_dma2dgetalpha(FAR struct dma2d_layer_s *layer, uint8_t *alpha)
{
sem_wait(priv->lock);
*alpha = priv->alpha;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1586,7 +1585,7 @@ static int stm32_dma2dsetblendmode(FAR struct dma2d_layer_s *layer,
{
sem_wait(priv->lock);
priv->blendmode = mode;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1622,7 +1621,7 @@ static int stm32_dma2dgetblendmode(FAR struct dma2d_layer_s *layer,
{
sem_wait(priv->lock);
*mode = priv->blendmode;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1725,7 +1724,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest,
}
}
sem_post(destlayer->lock);
nxsem_post(destlayer->lock);
}
else
{
@ -1839,7 +1838,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest,
}
}
sem_post(destlayer->lock);
nxsem_post(destlayer->lock);
}
else
{
@ -1919,7 +1918,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer,
}
}
sem_post(priv->lock);
nxsem_post(priv->lock);
}
else
{
@ -1952,7 +1951,7 @@ FAR struct dma2d_layer_s *up_dma2dgetlayer(int lid)
FAR struct stm32_dma2d_s *priv;
sem_wait(&g_lock);
priv = g_layers[lid];
sem_post(&g_lock);
nxsem_post(&g_lock);
return &priv->dma2d;
}
@ -2081,7 +2080,7 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
lcderr("ERROR: EINVAL, no free layer available\n");
}
sem_post(&g_lock);
nxsem_post(&g_lock);
return (FAR struct dma2d_layer_s *)layer;
}
@ -2124,7 +2123,7 @@ int up_dma2dremovelayer(FAR struct dma2d_layer_s *layer)
ret = OK;
}
sem_post(priv->lock);
nxsem_post(priv->lock);
}
return ret;
@ -2168,7 +2167,7 @@ int up_dma2dinitialize(void)
*/
nxsem_init(g_interrupt.sem, 0, 0);
sem_setprotocol(g_interrupt.sem, SEM_PRIO_NONE);
nxsem_setprotocol(g_interrupt.sem, SEM_PRIO_NONE);
#ifdef CONFIG_STM32_DMA2D_L8
/* Enable dma2d transfer and clut loading interrupts only */

2
arch/arm/src/stm32/stm32_flash.c
View File

@ -116,7 +116,7 @@ static void sem_lock(void)
static inline void sem_unlock(void)
{
sem_post(&g_sem);
nxsem_post(&g_sem);
}
#if !defined(CONFIG_STM32_STM32L15XX)

2
arch/arm/src/stm32/stm32_hrtim.c
View File

@ -4809,7 +4809,7 @@ int hrtim_register(FAR const char *path, FAR struct hrtim_dev_s *dev)
ret = register_driver(path, &hrtim_fops, 0444, dev);
if (ret < 0)
{
sem_destroy(&dev->hd_closesem);
nxsem_destroy(&dev->hd_closesem);
}
return ret;

12
arch/arm/src/stm32/stm32_i2c.c
View File

@ -759,7 +759,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_post(struct stm32_i2c_priv_s *priv)
{
sem_post(&priv->sem_excl);
nxsem_post(&priv->sem_excl);
}
/************************************************************************************
@ -780,7 +780,7 @@ static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
*/
nxsem_init(&priv->sem_isr, 0, 0);
sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
@ -794,9 +794,9 @@ static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_destroy(FAR struct stm32_i2c_priv_s *priv)
{
sem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
sem_destroy(&priv->sem_isr);
nxsem_destroy(&priv->sem_isr);
#endif
}
@ -1399,7 +1399,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
* and wake it up.
*/
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#else
@ -1434,7 +1434,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
* and wake it up.
*/
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#else

10
arch/arm/src/stm32/stm32_i2c_alt.c
View File

@ -767,7 +767,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_post(FAR struct stm32_i2c_priv_s *priv)
{
sem_post(&priv->sem_excl);
nxsem_post(&priv->sem_excl);
}
/************************************************************************************
@ -788,7 +788,7 @@ static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
*/
nxsem_init(&priv->sem_isr, 0, 0);
sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
@ -802,9 +802,9 @@ static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_destroy(FAR struct stm32_i2c_priv_s *priv)
{
sem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
sem_destroy(&priv->sem_isr);
nxsem_destroy(&priv->sem_isr);
#endif
}
@ -1884,7 +1884,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
* and wake it up.
*/
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#endif

6
arch/arm/src/stm32/stm32_i2s.c
View File

@ -352,10 +352,10 @@ static void i2s_dump_regs(struct stm32_i2s_s *priv, const char *msg);
/* Semaphore helpers */
static void i2s_exclsem_take(struct stm32_i2s_s *priv);
#define i2s_exclsem_give(priv) sem_post(&priv->exclsem)
#define i2s_exclsem_give(priv) nxsem_post(&priv->exclsem)
static void i2s_bufsem_take(struct stm32_i2s_s *priv);
#define i2s_bufsem_give(priv) sem_post(&priv->bufsem)
#define i2s_bufsem_give(priv) nxsem_post(&priv->bufsem)
/* Buffer container helpers */
@ -2649,7 +2649,7 @@ FAR struct i2s_dev_s *stm32_i2sdev_initialize(int port)
/* Failure exits */
errout_with_alloc:
sem_destroy(&priv->exclsem);
nxsem_destroy(&priv->exclsem);
kmm_free(priv);
return NULL;
}

43
arch/arm/src/stm32/stm32_ltdc.c
View File

@ -1152,12 +1152,11 @@ static int stm32_ltdcirq(int irq, void *context, FAR void *arg)
if (priv->wait)
{
int ret = sem_post(priv->sem);
int ret = nxsem_post(priv->sem);
if (ret != OK)
if (ret < 0)
{
lcderr("ERROR: sem_post() failed\n");
return ret;
lcderr("ERROR: nxsem_post() failed\n");
}
}
}
@ -1294,7 +1293,7 @@ static void stm32_global_configure(void)
*/
nxsem_init(g_interrupt.sem, 0, 0);
sem_setprotocol(g_interrupt.sem, SEM_PRIO_NONE);
nxsem_setprotocol(g_interrupt.sem, SEM_PRIO_NONE);
/* Attach LTDC interrupt vector */
@ -2419,7 +2418,7 @@ static int stm32_setclut(struct ltdc_layer_s *layer,
ret = OK;
}
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return ret;
}
@ -2514,7 +2513,7 @@ static int stm32_getclut(struct ltdc_layer_s *layer,
ret = OK;
}
#endif
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return ret;
}
@ -2594,7 +2593,7 @@ static int stm32_getlid(FAR struct ltdc_layer_s *layer, int *lid,
break;
}
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return ret;
}
@ -2632,7 +2631,7 @@ static int stm32_setcolor(FAR struct ltdc_layer_s *layer, uint32_t argb)
sem_wait(priv->state.lock);
priv->state.color = argb;
priv->operation |= LTDC_LAYER_SETCOLOR;
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -2667,7 +2666,7 @@ static int stm32_getcolor(FAR struct ltdc_layer_s *layer, uint32_t *argb)
{
sem_wait(priv->state.lock);
*argb = priv->state.color;
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -2705,7 +2704,7 @@ static int stm32_setcolorkey(FAR struct ltdc_layer_s *layer, uint32_t rgb)
sem_wait(priv->state.lock);
priv->state.colorkey = rgb;
priv->operation |= LTDC_LAYER_SETCOLORKEY;
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -2740,7 +2739,7 @@ static int stm32_getcolorkey(FAR struct ltdc_layer_s *layer, uint32_t *rgb)
{
sem_wait(priv->state.lock);
*rgb = priv->state.colorkey;
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -2782,7 +2781,7 @@ static int stm32_setalpha(FAR struct ltdc_layer_s *layer, uint8_t alpha)
sem_wait(priv->state.lock);
priv->state.alpha = alpha;
priv->operation |= LTDC_LAYER_SETALPHAVALUE;
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -2817,7 +2816,7 @@ static int stm32_getalpha(FAR struct ltdc_layer_s *layer, uint8_t *alpha)
{
sem_wait(priv->state.lock);
*alpha = priv->state.alpha;
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -2952,7 +2951,7 @@ static int stm32_setblendmode(FAR struct ltdc_layer_s *layer, uint32_t mode)
LTDC_LAYER_SETCOLORKEY);
}
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return ret;
}
@ -2985,7 +2984,7 @@ static int stm32_getblendmode(FAR struct ltdc_layer_s *layer, uint32_t *mode)
{
sem_wait(priv->state.lock);
*mode = priv->state.blendmode;
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -3050,7 +3049,7 @@ static int stm32_setarea(FAR struct ltdc_layer_s *layer,
priv->operation |= LTDC_LAYER_SETAREA;
}
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return ret;
}
@ -3092,7 +3091,7 @@ static int stm32_getarea(FAR struct ltdc_layer_s *layer,
*srcxpos = priv->state.xpos;
*srcypos = priv->state.ypos;
memcpy(area, &priv->state.area, sizeof(struct ltdc_area_s));
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -3250,7 +3249,7 @@ static int stm32_update(FAR struct ltdc_layer_s *layer, uint32_t mode)
stm32_ltdc_reload(reload, waitvblank);
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return OK;
}
@ -3298,7 +3297,7 @@ static int stm32_blit(FAR struct ltdc_layer_s *dest,
sem_wait(priv->state.lock);
priv->dma2d->blit(priv->dma2d, destxpos, destypos, src, srcarea);
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return ret;
}
@ -3354,7 +3353,7 @@ static int stm32_blend(FAR struct ltdc_layer_s *dest,
sem_wait(priv->state.lock);
priv->dma2d->blend(priv->dma2d, destxpos, destypos,
fore, forexpos, foreypos, back, backarea);
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return ret;
}
@ -3396,7 +3395,7 @@ static int stm32_fillarea(FAR struct ltdc_layer_s *layer,
sem_wait(priv->state.lock);
priv->dma2d->fillarea(priv->dma2d, area, color);
sem_post(priv->state.lock);
nxsem_post(priv->state.lock);
return ret;
}

6
arch/arm/src/stm32/stm32_otgfshost.c
View File

@ -307,7 +307,7 @@ static inline void stm32_modifyreg(uint32_t addr, uint32_t clrbits,
/* Semaphores ******************************************************************/
static void stm32_takesem(sem_t *sem);
#define stm32_givesem(s) sem_post(s);
#define stm32_givesem(s) nxsem_post(s);
/* Byte stream access helper functions *****************************************/
@ -5193,7 +5193,7 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
/* Initialize the driver state data */
@ -5218,7 +5218,7 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
*/
nxsem_init(&chan->waitsem, 0, 0);
sem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
}
}

6
arch/arm/src/stm32/stm32_otghshost.c
View File

@ -312,7 +312,7 @@ static inline void stm32_modifyreg(uint32_t addr, uint32_t clrbits,
/* Semaphores ******************************************************************/
static void stm32_takesem(sem_t *sem);
#define stm32_givesem(s) sem_post(s);
#define stm32_givesem(s) nxsem_post(s);
/* Byte stream access helper functions *****************************************/
@ -5196,7 +5196,7 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->pscsem, SEM_PRIO_NONE);
/* Initialize the driver state data */
@ -5221,7 +5221,7 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv)
*/
nxsem_init(&chan->waitsem, 0, 0);
sem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&chan->waitsem, SEM_PRIO_NONE);
}
}

6
arch/arm/src/stm32/stm32_rng.c
View File

@ -234,7 +234,7 @@ static int stm32_interrupt(int irq, void *context, FAR void *arg)
/* Buffer filled, stop further interrupts. */
stm32_disable();
sem_post(&g_rngdev.rd_readsem);
nxsem_post(&g_rngdev.rd_readsem);
}
return OK;
@ -263,7 +263,7 @@ static ssize_t stm32_read(struct file *filep, char *buffer, size_t buflen)
*/
nxsem_init(&g_rngdev.rd_readsem, 0, 0);
sem_setprotocol(&g_rngdev.rd_readsem, SEM_PRIO_NONE);
nxsem_setprotocol(&g_rngdev.rd_readsem, SEM_PRIO_NONE);
g_rngdev.rd_buflen = buflen;
g_rngdev.rd_buf = buffer;
@ -282,7 +282,7 @@ static ssize_t stm32_read(struct file *filep, char *buffer, size_t buflen)
/* Free RNG for next use */
sem_post(&g_rngdev.rd_devsem);
nxsem_post(&g_rngdev.rd_devsem);
return ret < 0 ? ret : buflen;
}

4
arch/arm/src/stm32/stm32_sdio.c
View File

@ -383,7 +383,7 @@ struct stm32_sampleregs_s
/* Low-level helpers ********************************************************/
static void stm32_takesem(struct stm32_dev_s *priv);
#define stm32_givesem(priv) (sem_post(&priv->waitsem))
#define stm32_givesem(priv) (nxsem_post(&priv->waitsem))
static inline void stm32_setclkcr(uint32_t clkcr);
static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask,
sdio_eventset_t waitevents, sdio_eventset_t wkupevents);
@ -2969,7 +2969,7 @@ FAR struct sdio_dev_s *sdio_initialize(int slotno)
* priority inheritance enabled.
*/
sem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->waitsem, SEM_PRIO_NONE);
/* Create a watchdog timer */

10
arch/arm/src/stm32/stm32_spi.c
View File

@ -794,7 +794,7 @@ static void spi_dmatxwait(FAR struct stm32_spidev_s *priv)
#ifdef CONFIG_STM32_SPI_DMA
static inline void spi_dmarxwakeup(FAR struct stm32_spidev_s *priv)
{
(void)sem_post(&priv->rxsem);
(void)nxsem_post(&priv->rxsem);
}
#endif
@ -809,7 +809,7 @@ static inline void spi_dmarxwakeup(FAR struct stm32_spidev_s *priv)
#ifdef CONFIG_STM32_SPI_DMA
static inline void spi_dmatxwakeup(FAR struct stm32_spidev_s *priv)
{
(void)sem_post(&priv->txsem);
(void)nxsem_post(&priv->txsem);
}
#endif
@ -1080,7 +1080,7 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock)
}
else
{
(void)sem_post(&priv->exclsem);
(void)nxsem_post(&priv->exclsem);
}
return OK;
}
@ -1733,8 +1733,8 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv)
nxsem_init(&priv->rxsem, 0, 0);
nxsem_init(&priv->txsem, 0, 0);
sem_setprotocol(&priv->rxsem, SEM_PRIO_NONE);
sem_setprotocol(&priv->txsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->rxsem, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->txsem, SEM_PRIO_NONE);
/* Get DMA channels. NOTE: stm32_dmachannel() will always assign the DMA channel.
* if the channel is not available, then stm32_dmachannel() will block and wait

2
arch/arm/src/stm32/stm32f10xxx_dma.c
View File

@ -238,7 +238,7 @@ static void stm32_dmatake(FAR struct stm32_dma_s *dmach)
static inline void stm32_dmagive(FAR struct stm32_dma_s *dmach)
{
(void)sem_post(&dmach->sem);
(void)nxsem_post(&dmach->sem);
}
/************************************************************************************

2
arch/arm/src/stm32/stm32f20xxx_dma.c
View File

@ -267,7 +267,7 @@ static void stm32_dmatake(FAR struct stm32_dma_s *dmast)
static inline void stm32_dmagive(FAR struct stm32_dma_s *dmast)
{
(void)sem_post(&dmast->sem);
(void)nxsem_post(&dmast->sem);
}
/************************************************************************************

12
arch/arm/src/stm32/stm32f30xxx_i2c.c
View File

@ -875,7 +875,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_post(FAR struct stm32_i2c_priv_s *priv)
{
sem_post(&priv->sem_excl);
nxsem_post(&priv->sem_excl);
}
/************************************************************************************
@ -896,7 +896,7 @@ static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
*/
nxsem_init(&priv->sem_isr, 0, 0);
sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
@ -910,9 +910,9 @@ static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_destroy(FAR struct stm32_i2c_priv_s *priv)
{
sem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
sem_destroy(&priv->sem_isr);
nxsem_destroy(&priv->sem_isr);
#endif
}
@ -1425,7 +1425,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
* and wake it up.
*/
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#else
@ -1460,7 +1460,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
* and wake it up.
*/
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#else

2
arch/arm/src/stm32/stm32f33xxx_dma.c
View File

@ -198,7 +198,7 @@ static void stm32_dmatake(FAR struct stm32_dma_s *dmach)
static inline void stm32_dmagive(FAR struct stm32_dma_s *dmach)
{
(void)sem_post(&dmach->sem);
(void)nxsem_post(&dmach->sem);
}
/************************************************************************************

2
arch/arm/src/stm32/stm32f40xxx_dma.c
View File

@ -266,7 +266,7 @@ static void stm32_dmatake(FAR struct stm32_dma_s *dmast)
static inline void stm32_dmagive(FAR struct stm32_dma_s *dmast)
{
(void)sem_post(&dmast->sem);
(void)nxsem_post(&dmast->sem);
}
/************************************************************************************

10
arch/arm/src/stm32/stm32f40xxx_i2c.c
View File

@ -816,7 +816,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_post(struct stm32_i2c_priv_s *priv)
{
sem_post(&priv->sem_excl);
nxsem_post(&priv->sem_excl);
}
/************************************************************************************
@ -837,7 +837,7 @@ static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
*/
nxsem_init(&priv->sem_isr, 0, 0);
sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
@ -851,9 +851,9 @@ static inline void stm32_i2c_sem_init(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_destroy(FAR struct stm32_i2c_priv_s *priv)
{
sem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
sem_destroy(&priv->sem_isr);
nxsem_destroy(&priv->sem_isr);
#endif
}
@ -2077,7 +2077,7 @@ state_error:
* and wake it up.
*/
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#endif

12
arch/arm/src/stm32f0/stm32f0_i2c.c
View File

@ -816,7 +816,7 @@ static inline void stm32f0_i2c_sem_waitstop(FAR struct stm32f0_i2c_priv_s *priv)
static inline void stm32f0_i2c_sem_post(FAR struct stm32f0_i2c_priv_s *priv)
{
sem_post(&priv->sem_excl);
nxsem_post(&priv->sem_excl);
}
/************************************************************************************
@ -837,7 +837,7 @@ static inline void stm32f0_i2c_sem_init(FAR struct stm32f0_i2c_priv_s *priv)
*/
nxsem_init(&priv->sem_isr, 0, 0);
sem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
nxsem_setprotocol(&priv->sem_isr, SEM_PRIO_NONE);
#endif
}
@ -851,9 +851,9 @@ static inline void stm32f0_i2c_sem_init(FAR struct stm32f0_i2c_priv_s *priv)
static inline void stm32f0_i2c_sem_destroy(FAR struct stm32f0_i2c_priv_s *priv)
{
sem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
sem_destroy(&priv->sem_isr);
nxsem_destroy(&priv->sem_isr);
#endif
}
@ -1396,7 +1396,7 @@ static int stm32f0_i2c_isr_process(struct stm32f0_i2c_priv_s *priv)
* and wake it up.
*/
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#else
@ -1431,7 +1431,7 @@ static int stm32f0_i2c_isr_process(struct stm32f0_i2c_priv_s *priv)
* and wake it up.
*/
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#else

6
arch/arm/src/stm32f7/stm32_bbsram.c
View File

@ -206,7 +206,7 @@ static void stm32_bbsram_dump(FAR struct bbsramfh_s *bbf, char *op)
static void stm32_bbsram_semgive(FAR struct stm32_bbsram_s *priv)
{
sem_post(&priv->exclsem);
nxsem_post(&priv->exclsem);
}
/****************************************************************************
@ -555,7 +555,7 @@ static int stm32_bbsram_poll(FAR struct file *filep, FAR struct pollfd *fds,
fds->revents |= (fds->events & (POLLIN | POLLOUT));
if (fds->revents != 0)
{
sem_post(fds->sem);
nxsem_post(fds->sem);
}
}
@ -636,7 +636,7 @@ static int stm32_bbsram_unlink(FAR struct inode *inode)
stm32_bbsram_lock();
bbr->refs = 0;
stm32_bbsram_semgive(bbr);
sem_destroy(&bbr->exclsem);
nxsem_destroy(&bbr->exclsem);
return 0;
}
#endif

2
arch/arm/src/stm32f7/stm32_dma.c
View File

@ -266,7 +266,7 @@ static void stm32_dmatake(FAR struct stm32_dma_s *dmast)
static inline void stm32_dmagive(FAR struct stm32_dma_s *dmast)
{
(void)sem_post(&dmast->sem);
(void)nxsem_post(&dmast->sem);
}
/************************************************************************************

41
arch/arm/src/stm32f7/stm32_dma2d.c
View File

@ -463,12 +463,11 @@ static int stm32_dma2dirq(int irq, void *context, FAR void *arg)
if (priv->wait)
{
int ret = sem_post(priv->sem);
int ret = nxsem_post(priv->sem);
if (ret != OK)
if (ret < 0)
{
lcderr("ERROR: sem_post() failed\n");
return ret;
lcderr("ERROR: nxsem_post() failed\n");
}
}
@ -1175,7 +1174,7 @@ static int stm32_dma2dgetvideoinfo(FAR struct dma2d_layer_s *layer,
{
sem_wait(priv->lock);
memcpy(vinfo, &priv->vinfo, sizeof(struct fb_videoinfo_s));
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1212,7 +1211,7 @@ static int stm32_dma2dgetplaneinfo(FAR struct dma2d_layer_s *layer, int planeno,
{
sem_wait(priv->lock);
memcpy(pinfo, &priv->pinfo, sizeof(struct fb_planeinfo_s));
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1247,7 +1246,7 @@ static int stm32_dma2dgetlid(FAR struct dma2d_layer_s *layer, int *lid)
{
sem_wait(priv->lock);
*lid = priv->lid;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1309,7 +1308,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
ret = ltdc->setclut(ltdc, cmap);
sem_post(priv->lock);
nxsem_post(priv->lock);
return ret;
}
@ -1367,7 +1366,7 @@ static int stm32_dma2dsetclut(FAR struct dma2d_layer_s *layer,
ret = OK;
}
sem_post(priv->lock);
nxsem_post(priv->lock);
return ret;
}
@ -1453,7 +1452,7 @@ static int stm32_dma2dgetclut(FAR struct dma2d_layer_s *layer,
ret = OK;
}
sem_post(priv->lock);
nxsem_post(priv->lock);
return ret;
}
@ -1494,7 +1493,7 @@ static int stm32_dma2dsetalpha(FAR struct dma2d_layer_s *layer, uint8_t alpha)
{
sem_wait(priv->lock);
priv->alpha = alpha;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1529,7 +1528,7 @@ static int stm32_dma2dgetalpha(FAR struct dma2d_layer_s *layer, uint8_t *alpha)
{
sem_wait(priv->lock);
*alpha = priv->alpha;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1580,7 +1579,7 @@ static int stm32_dma2dsetblendmode(FAR struct dma2d_layer_s *layer,
{
sem_wait(priv->lock);
priv->blendmode = mode;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1616,7 +1615,7 @@ static int stm32_dma2dgetblendmode(FAR struct dma2d_layer_s *layer,
{
sem_wait(priv->lock);
*mode = priv->blendmode;
sem_post(priv->lock);
nxsem_post(priv->lock);
return OK;
}
@ -1719,7 +1718,7 @@ static int stm32_dma2dblit(FAR struct dma2d_layer_s *dest,
}
}
sem_post(destlayer->lock);
nxsem_post(destlayer->lock);
}
else
{
@ -1833,7 +1832,7 @@ static int stm32_dma2dblend(FAR struct dma2d_layer_s *dest,
}
}
sem_post(destlayer->lock);
nxsem_post(destlayer->lock);
}
else
{
@ -1913,7 +1912,7 @@ static int stm32_dma2dfillarea(FAR struct dma2d_layer_s *layer,
}
}
sem_post(priv->lock);
nxsem_post(priv->lock);
}
else
{
@ -1946,7 +1945,7 @@ FAR struct dma2d_layer_s *up_dma2dgetlayer(int lid)
FAR struct stm32_dma2d_s *priv;
sem_wait(&g_lock);
priv = g_layers[lid];
sem_post(&g_lock);
nxsem_post(&g_lock);
return &priv->dma2d;
}
@ -2073,7 +2072,7 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
lcderr("ERROR: EINVAL, no free layer available\n");
}
sem_post(&g_lock);
nxsem_post(&g_lock);
return (FAR struct dma2d_layer_s *)layer;
}
@ -2116,7 +2115,7 @@ int up_dma2dremovelayer(FAR struct dma2d_layer_s *layer)
ret = OK;
}
sem_post(priv->lock);
nxsem_post(priv->lock);
}
return ret;
@ -2160,7 +2159,7 @@ int up_dma2dinitialize(void)
*/
nxsem_init(g_interrupt.sem, 0, 0);
sem_setprotocol(g_interrupt.sem, SEM_PRIO_NONE);
nxsem_setprotocol(g_interrupt.sem, SEM_PRIO_NONE);
#ifdef CONFIG_STM32F7_DMA2D_L8
/* Enable dma2d transfer and clut loading interrupts only */

10
arch/arm/src/stm32f7/stm32_i2c.c
View File

@ -1061,7 +1061,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
static inline void stm32_i2c_sem_post(FAR struct i2c_master_s *dev)
{
sem_post(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl);
nxsem_post(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl);
}
/************************************************************************************
@ -1082,7 +1082,7 @@ static inline void stm32_i2c_sem_init(FAR struct i2c_master_s *dev)
*/
nxsem_init(&((struct stm32_i2c_inst_s *)dev)->priv->sem_isr, 0, 0);
sem_setprotocol(&((struct stm32_i2c_inst_s *)dev)->priv->sem_isr, SEM_PRIO_NONE);
nxsem_setprotocol(&((struct stm32_i2c_inst_s *)dev)->priv->sem_isr, SEM_PRIO_NONE);
#endif
}
@ -1096,9 +1096,9 @@ static inline void stm32_i2c_sem_init(FAR struct i2c_master_s *dev)
static inline void stm32_i2c_sem_destroy(FAR struct i2c_master_s *dev)
{
sem_destroy(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl);
nxsem_destroy(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl);
#ifndef CONFIG_I2C_POLLED
sem_destroy(&((struct stm32_i2c_inst_s *)dev)->priv->sem_isr);
nxsem_destroy(&((struct stm32_i2c_inst_s *)dev)->priv->sem_isr);
#endif
}
@ -2115,7 +2115,7 @@ static int stm32_i2c_isr_process(struct stm32_i2c_priv_s *priv)
if (priv->intstate == INTSTATE_WAITING)
{
sem_post(&priv->sem_isr);
nxsem_post(&priv->sem_isr);
priv->intstate = INTSTATE_DONE;
}
#endif

Some files were not shown because too many files have changed in this diff Show More