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Merge remote-tracking branch 'origin/master' into beacon802154

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Gregory Nutt 2017-07-20 08:04:41 -06:00
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2
Documentation/README.html

@ -288,6 +288,8 @@ nuttx/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f429i-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32f746g-disco/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f746g-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32f769i-disco/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32f769i-disco/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32l476-mdk/
| | `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/stm32l476vg-mdk/README.txt" target="_blank"><b><i>README.txt</i></b></a>
| |- stm32l476vg-disco/

2
README.txt

@ -1827,6 +1827,8 @@ nuttx/
| | `- README.txt
| |- stm32f746g-disco/
| | `- README.txt
| |- stm32f769i-disco/
| | `- README.txt
| |- stm32l476-mdk/
| | `- README.txt
| |- stm32l476vg-disco/

415
arch/arm/include/stm32f7/dma2d.h Executable file

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/****************************************************************************
* arch/arm/include/stm32/dma2d.h
*
* Copyright (C) 2015 Marco Krahl. All rights reserved.
* Author: Marco Krahl <ocram.lhark@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32F7_DMA2D_H
#define __ARCH_ARM_INCLUDE_STM32F7_DMA2D_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <nuttx/video/fb.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
struct ltdc_area_s; /* see arch/chip/ltdc.h */
/* Blend mode definitions */
enum dma2d_blend_e
{
DMA2D_BLEND_NONE = 0, /* Disable all blend operation */
DMA2D_BLEND_ALPHA = 0x1, /* Enable alpha blending */
DMA2D_BLEND_PIXELALPHA = 0x2, /* Enable alpha blending from pixel color */
};
/* The layer is controlled through the following structure */
struct dma2d_layer_s
{
/* Name: getvideoinfo
*
* Description:
* Get video information about the layer
*
* Parameter:
* layer - Reference to the layer control structure
* vinfo - Reference to the video info structure
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getvideoinfo)(FAR struct dma2d_layer_s *layer,
FAR struct fb_videoinfo_s *vinfo);
/* Name: getplaneinfo
*
* Description:
* Get plane information about the layer
*
* Parameter:
* layer - Reference to the layer control structure
* planeno - Number of the plane
* pinfo - Reference to the plane info structure
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getplaneinfo)(FAR struct dma2d_layer_s *layer, int planeno,
FAR struct fb_planeinfo_s *pinfo);
/* Name: getlid
*
* Description:
* Get a specific layer identifier.
*
* Parameter:
* layer - Reference to the layer structure
* lid - Reference to store the layer id
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getlid)(FAR struct dma2d_layer_s *layer, int *lid);
#ifdef CONFIG_STM32F7_DMA2D_L8
/* Name: setclut
*
* Description:
* Configure layer clut (color lookup table).
* Non clut is defined during initializing.
*
* Parameter:
* layer - Reference to the layer structure
* cmap - color lookup table with up the 256 entries
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*setclut)(FAR struct dma2d_layer_s *layer,
const FAR struct fb_cmap_s *cmap);
/* Name: getclut
*
* Description:
* Get configured layer clut (color lookup table).
*
* Parameter:
* layer - Reference to the layer structure
* cmap - Reference to valid color lookup table accept up the 256 color
* entries
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getclut)(FAR struct dma2d_layer_s *layer, FAR struct fb_cmap_s *cmap);
#endif
/* Name: setalpha
*
* Description:
* Configure layer alpha value factor into blend operation.
* During the layer blend operation the source alpha value is multiplied
* with this alpha value. If the source color format doesn't support alpha
* channel (e.g. non ARGB8888) this alpha value will be used as constant
* alpha value for blend operation.
* Default value during initializing: 0xff
*
* Parameter:
* layer - Reference to the layer structure
* alpha - Alpha value
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*setalpha)(FAR struct dma2d_layer_s *layer, uint8_t alpha);
/* Name: getalpha
*
* Description:
* Get configured layer alpha value factor for blend operation.
*
* Parameter:
* layer - Reference to the layer structure
* alpha - Reference to store the alpha value
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getalpha)(FAR struct dma2d_layer_s *layer, uint8_t *alpha);
/* Name: setblendmode
*
* Description:
* Configure blend mode of the layer.
* Default mode during initializing: DMA2D_BLEND_NONE
* Blendmode is active after next update.
*
* Parameter:
* layer - Reference to the layer structure
* mode - Blend mode (see DMA2D_BLEND_*)
*
* Return:
* On success - OK
* On error - -EINVAL
*
* Procedure information:
* DMA2D_BLEND_NONE:
* Informs the driver to disable all blend operation for the given layer.
* That means the layer is opaque.
*
* DMA2D_BLEND_ALPHA:
* Informs the driver to enable alpha blending for the given layer.
*
* DMA2D_BLEND_PIXELALPHA:
* Informs the driver to use the pixel alpha value of the layer instead
* the constant alpha value. This is only useful for ARGB8888
* color format.
*/
int (*setblendmode)(FAR struct dma2d_layer_s *layer, uint32_t mode);
/* Name: getblendmode
*
* Description:
* Get configured blend mode of the layer.
*
* Parameter:
* layer - Reference to the layer structure
* mode - Reference to store the blend mode
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getblendmode)(FAR struct dma2d_layer_s *layer, uint32_t *mode);
/* Name: blit
*
* Description:
* Copy selected area from a source layer to selected position of the
* destination layer.
*
* Parameter:
* dest - Reference to the destination layer
* destxpos - Selected x target position of the destination layer
* destypos - Selected y target position of the destination layer
* src - Reference to the source layer
* srcarea - Reference to the selected area of the source layer
*
* Return:
* OK - On success
* -EINVAL - If one of the parameter invalid or if the size of the
* selected source area outside the visible area of the
* destination layer. (The visible area usually represents the
* display size)
* -ECANCELED - Operation cancelled, something goes wrong.
*/
int (*blit)(FAR struct dma2d_layer_s *dest,
fb_coord_t destxpos, fb_coord_t destypos,
FAR const struct dma2d_layer_s *src,
FAR const struct ltdc_area_s *srcarea);
/* Name: blend
*
* Description:
* Blends the selected area from a background layer with selected position
* of the foreground layer. Copies the result to the selected position of
* the destination layer. Note! The content of the foreground and background
* layer keeps unchanged as long destination layer is unequal to the
* foreground and background layer.
*
* Parameter:
* dest - Reference to the destination layer
* fore - Reference to the foreground layer
* forexpos - Selected x target position of the foreground layer
* foreypos - Selected y target position of the foreground layer
* back - Reference to the background layer
* backarea - Reference to the selected area of the background layer
*
* Return:
* OK - On success
* -EINVAL - If one of the parameter invalid or if the size of the
* selected source area outside the visible area of the
* destination layer. (The visible area usually represents the
* display size)
* -ECANCELED - Operation cancelled, something goes wrong.
*/
int (*blend)(FAR struct dma2d_layer_s *dest,
fb_coord_t destxpos, fb_coord_t destypos,
FAR const struct dma2d_layer_s *fore,
fb_coord_t forexpos, fb_coord_t foreypos,
FAR const struct dma2d_layer_s *back,
FAR const struct ltdc_area_s *backarea);
/* Name: fillarea
*
* Description:
* Fill the selected area of the whole layer with a specific color.
*
* Parameter:
* layer - Reference to the layer structure
* area - Reference to the valid area structure select the area
* color - Color to fill the selected area. Color must be formatted
* according to the layer pixel format.
*
* Return:
* OK - On success
* -EINVAL - If one of the parameter invalid or if the size of the
* selected area outside the visible area of the layer.
* -ECANCELED - Operation cancelled, something goes wrong.
*/
int (*fillarea)(FAR struct dma2d_layer_s *layer,
FAR const struct ltdc_area_s *area,
uint32_t color);
};
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_dma2dgetlayer
*
* Description:
* Get a dma2d layer structure by the layer identifier
*
* Parameter:
* lid - Layer identifier
*
* Return:
* Reference to the dma2d layer control structure on success or Null if no
* related exist.
*
****************************************************************************/
FAR struct dma2d_layer_s *up_dma2dgetlayer(int lid);
/****************************************************************************
* Name: up_dma2dcreatelayer
*
* Description:
* Create a new dma2d layer object to interact with the dma2d controller
*
* Parameter:
* width - Layer width
* height - Layer height
* fmt - Pixel format of the layer
*
* Return:
* On success - A valid dma2d layer reference
* On error - NULL and errno is set to
* -EINVAL if one of the parameter is invalid
* -ENOMEM if no memory available or exceeds
* CONFIG_STM32F7_DMA2D_NLAYERS
*
****************************************************************************/
FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
fb_coord_t height,
uint8_t fmt);
/****************************************************************************
* Name: up_dma2dremovelayer
*
* Description:
* Remove and deallocate the dma2d layer
*
* Parameter:
* layer - Reference to the layer to remove
*
* Return:
* On success - OK
* On error - -EINVAL
*
****************************************************************************/
int up_dma2dremovelayer(FAR struct dma2d_layer_s *layer);
/****************************************************************************
* Name: up_dma2dinitialize
*
* Description:
* Initialize the dma2d controller
*
* Return:
* OK - On success
* An error if initializing failed.
*
****************************************************************************/
int up_dma2dinitialize(void);
/****************************************************************************
* Name: up_dma2duninitialize
*
* Description:
* Uninitialize the dma2d controller
*
****************************************************************************/
void up_dma2duninitialize(void);
#endif /* __ARCH_ARM_INCLUDE_STM32F7_DMA2D_H */

575
arch/arm/include/stm32f7/ltdc.h Executable file

@ -0,0 +1,575 @@
/****************************************************************************
* arch/arm/include/stm32/ltdc.h
*
* Copyright (C) 2014-2015 Marco Krahl. All rights reserved.
* Author: Marco Krahl <ocram.lhark@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_STM32F7_LTDC_H
#define __ARCH_ARM_INCLUDE_STM32F7_LTDC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <nuttx/video/fb.h>
#ifdef CONFIG_STM32F7_LTDC
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
struct dma2d_layer_s; /* see arch/chip/dma2d.h */
/* Blend mode definitions */
enum ltdc_blend_e
{
LTDC_BLEND_NONE = 0, /* Disable all blend operation */
LTDC_BLEND_ALPHA = 0x1, /* Enable alpha blending */
LTDC_BLEND_PIXELALPHA = 0x2, /* Enable alpha blending from pixel color */
LTDC_BLEND_COLORKEY = 0x4, /* Enable colorkey */
LTDC_BLEND_ALPHAINV = 0x8, /* Inverse alpha blending of source */
LTDC_BLEND_PIXELALPHAINV = 0x10 /* Invers pixel alpha blending of source */
};
/* layer control definitions */
enum ltdc_layer_e
{
LTDC_LAYER_OWN = 0, /* The given layer */
LTDC_LAYER_TOP = 0x1, /* The initialized top layer */
LTDC_LAYER_BOTTOM = 0x2, /* the initialized bottom layer */
LTDC_LAYER_ACTIVE = 0x4, /* The current visible flip layer */
LTDC_LAYER_INACTIVE = 0x8 /* The current invisible flip layer */
#ifdef CONFIG_STM32F7_DMA2D
,LTDC_LAYER_DMA2D = 0x10 /* The dma2d interface layer id */
#endif
};
/* Update operation flag */
enum ltdc_update_e
{
LTDC_UPDATE_NONE = 0, /* Update given layer only */
LTDC_UPDATE_SIM = 0x1, /* Update both layer simultaneous */
LTDC_UPDATE_FLIP = 0x2, /* Perform flip operation */
LTDC_UPDATE_ACTIVATE = 0x4 /* Set the given layer to the active layer */
};
/* sync mode definitions */
enum ltdc_sync_e
{
LTDC_SYNC_NONE = 0, /* Immediately */
LTDC_SYNC_VBLANK = 0x100, /* Upon vertical sync */
LTDC_SYNC_WAIT = 0x200 /* Waits upon vertical sync */
};
/* Definition of the visible layer position and size */
struct ltdc_area_s
{
fb_coord_t xpos; /* X position in pixel */
fb_coord_t ypos; /* Y position in pixel */
fb_coord_t xres; /* X resolution in pixel */
fb_coord_t yres; /* Y resolution in pixel */
};
/* The layer is controlled through the following structure */
struct ltdc_layer_s
{
/* Name: getvideoinfo
*
* Description:
* Get video information about the layer
*
* Parameter:
* layer - Reference to the layer control structure
* vinfo - Reference to the video info structure
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getvideoinfo)(FAR struct ltdc_layer_s *layer,
FAR struct fb_videoinfo_s *vinfo);
/* Name: getplaneinfo
*
* Description:
* Get plane information about the layer
*
* Parameter:
* layer - Reference to the layer control structure
* planeno - Number of the plane
* pinfo - Reference to the plane info structure
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getplaneinfo)(FAR struct ltdc_layer_s *layer, int planeno,
FAR struct fb_planeinfo_s *pinfo);
/* Name: getlid
*
* Description:
* Get a specific layer identifier.
*
* Parameter:
* layer - Reference to the layer structure
* lid - Reference to store the layer id
* flag - Operation flag describe the layer identifier
* e.g. get the current active or inactive layer.
* See LTDC_LAYER_* for possible values
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getlid)(FAR struct ltdc_layer_s *layer, int *lid, uint32_t flag);
#ifdef CONFIG_FB_CMAP
/* Name: setclut
*
* Description:
* Configure layer clut (color lookup table).
* Non clut is defined during initializing.
* Clut is active during next vertical blank period. Do not need an update.
*
* Parameter:
* layer - Reference to the layer structure
* cmap - color lookup table with up the 256 entries
* enable - Enable or disable clut support (if false cmap is ignored and can
* be NULL)
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*setclut)(FAR struct ltdc_layer_s *layer,
const FAR struct fb_cmap_s *cmap);
/* Name: getclut
*
* Description:
* Get configured layer clut (color lookup table).
*
* Parameter:
* layer - Reference to the layer structure
* cmap - Reference to valid color lookup table accept up the 256 color
* entries
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getclut)(FAR struct ltdc_layer_s *layer, FAR struct fb_cmap_s *cmap);
#endif
/* Name: setcolor
*
* Description:
* Configure layer color for the non active layer area.
* Default value during initializing: 0x00000000
* Color is active after next update.
*
* Parameter:
* layer - Reference to the layer structure
* argb - ARGB8888 color value
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*setcolor)(FAR struct ltdc_layer_s *layer, uint32_t argb);
/* Name: getcolor
*
* Description:
* Get configured layer color for the non active layer area.
*
* Parameter:
* layer - Reference to the layer structure
* argb - Reference to store the ARGB8888 color value
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getcolor)(FAR struct ltdc_layer_s *layer, uint32_t *argb);
/* Name: setcolorkey
*
* Description:
* Configure the layer color key (chromakey) for transparence.
* Default value during initializing: 0x00000000
* Colorkey is active after next update.
*
* Parameter:
* layer - Reference to the layer structure
* rgb - RGB888 color key
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*setcolorkey)(FAR struct ltdc_layer_s *layer, uint32_t rgb);
/* Name: getcolorkey
*
* Description:
* Get the configured layer color key (chromakey) for transparence.
*
* Parameter:
* layer - Reference to the layer structure
* rgb - Reference to store the RGB888 color key
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getcolorkey)(FAR struct ltdc_layer_s *layer, uint32_t *rgb);
/* Name: setalpha
*
* Description:
* Configure layer alpha value factor into blend operation.
* During the layer blend operation the source alpha value is multiplied
* with this alpha value. If the source color format doesn't support alpha
* channel (e.g. non ARGB8888) this alpha value will be used as constant
* alpha value for blend operation.
* Default value during initializing: 0xff
* Alpha is active after next update.
*
* Parameter:
* layer - Reference to the layer structure
* alpha - Alpha value
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*setalpha)(FAR struct ltdc_layer_s *layer, uint8_t alpha);
/* Name: getalpha
*
* Description:
* Get configured layer alpha value factor for blend operation.
*
* Parameter:
* layer - Reference to the layer structure
* alpha - Reference to store the alpha value
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getalpha)(FAR struct ltdc_layer_s *layer, uint8_t *alpha);
/* Name: setblendmode
*
* Description:
* Configure blend mode of the layer.
* Default mode during initializing: LTDC_BLEND_NONE
* Blendmode is active after next update.
*
* Parameter:
* layer - Reference to the layer structure
* mode - Blend mode (see LTDC_BLEND_*)
*
* Return:
* On success - OK
* On error - -EINVAL
*
* Procedure information:
* LTDC_BLEND_NONE:
* Informs the driver to disable all blend operation for the given layer.
* That means the layer is opaque. Note this has no effect on the
* colorkey settings.
*
* LTDC_BLEND_ALPHA:
* Informs the driver to enable alpha blending for the given layer.
*
* LTDC_BLEND_COLORKEY:
* Informs the driver to enable colorkeying for the given layer.
*
* LTDC_BLEND_SRCPIXELALPHA:
* Informs the driver to use the pixel alpha value of the layer instead
* the constant alpha value. This is only useful for ARGB8888
* color format.
*
* LTDC_BLEND_DESTPIXELALPHA:
* Informs the driver to use the pixel alpha value of the subjacent layer
* instead the constant alpha value. This is only useful for ARGB8888
* color format.
*/
int (*setblendmode)(FAR struct ltdc_layer_s *layer, uint32_t mode);
/* Name: getblendmode
*
* Description:
* Get configured blend mode of the layer.
*
* Parameter:
* layer - Reference to the layer structure
* mode - Reference to store the blend mode
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getblendmode)(FAR struct ltdc_layer_s *layer, uint32_t *mode);
/* Name: setarea
*
* Description:
* Configure visible layer area and the reference position of the first
* pixel of the whole layer which is the first visible top left pixel in
* the active area.
* Default value during initializing:
* xpos = 0
* ypos = 0
* xres = display x resolution
* yres = display y resolution
*
* Area is active after next update.
*
* Parameter:
* layer - Reference to the layer control structure
* area - Reference to the valid area structure for the new active area
* srcxpos - x position of the visible pixel of the whole layer
* srcypos - y position of the visible pixel of the whole layer
*
* Return:
* On success - OK
* On error - -EINVAL
*
* Procedure Information:
* If the srcxpos and srcypos unequal the xpos and ypos of the coord
* structure this acts like moving the visible area to another position on
* the screen during the next update operation.
*/
int (*setarea)(FAR struct ltdc_layer_s *layer,
FAR const struct ltdc_area_s *area,
fb_coord_t srcxpos,
fb_coord_t srcypos);
/* Name: getarea
*
* Description:
* Get configured visible layer area.
*
* Parameter:
* layer - Reference to the layer control structure
* area - Reference to the area structure to store the active area
* srcxpos - Reference to store the referenced x position of the whole layer
* srcypos - Reference to store the reterenced y position of the whole layer
*
* Return:
* On success - OK
* On error - -EINVAL
*/
int (*getarea)(FAR struct ltdc_layer_s *layer,
FAR struct ltdc_area_s *area,
fb_coord_t *srcxpos,
fb_coord_t *srcypos);
/* Name: update
*
* Description:
* Update current layer settings and make changes visible.
*
* Parameter:
* layer - Reference to the layer structure
* mode - operation mode (see LTDC_UPDATE_*)
*
* Return:
* OK - On success
* -EINVAL - If one of the parameter invalid
* -ECANCELED - Operation cancelled, something goes wrong
*
* Procedure information:
* LTDC_UPDATE_SIM:
* Informs the driver to update both ltdc layers simultaneously. Otherwise
* update the given layer only.
*
* LTDC_UPDATE_FLIP:
* Informs the driver to perform a flip operation.
* This only effects the ltdc layer 1 and 2 and can be useful for double
* buffering. Each flip operation changed the active layer ot the inactive
* and vice versa. In the context of the ltdc that means, the inactive layer
* is complete disabled. So the subjacent layer is the background layer
* (background color). To reactivate both layer and their settings perform
* an update without LTDC_UPDATE_FLIP flag.
*
* LTDC_UPDATE_ACTIVATE:
* Informs the driver that the given layer should be the active layer when
* the operation is complete.
*
* LTDC_SYNC_VBLANK:
* Informs the driver to update the layer upon vertical blank. Otherwise
* immediately.
*/
int (*update)(FAR struct ltdc_layer_s *layer, uint32_t mode);
#ifdef CONFIG_STM32F7_DMA2D
/* Name: blit
*
* Description:
* Copy selected area from a source layer to selected position of the
* destination layer.
*
* Parameter:
* dest - Reference to the destination layer
* destxpos - Selected x position of the destination layer
* destypos - Selected y position of the destination layer
* src - Reference to the source layer
* srcarea - Reference to the selected area of the source layer
*
* Return:
* OK - On success
* -EINVAL - If one of the parameter invalid or if the size of the selected
* source area outside the visible area of the destination layer.
* (The visible area usually represents the display size)
*/
int (*blit)(FAR struct ltdc_layer_s *dest,
fb_coord_t destxpos, fb_coord_t destypos,
FAR const struct dma2d_layer_s *src,
FAR const struct ltdc_area_s *srcarea);
/* Name: blend
*
* Description:
* Blends the selected area from a foreground layer with selected position
* of the background layer. Copy the result to the destination layer. Note!
* The content of the foreground and background layer is not changed.
*
* Parameter:
* dest - Reference to the destination layer
* destxpos - Selected x position of the destination layer
* destypos - Selected y position of the destination layer
* fore - Reference to the foreground layer
* forexpos - Selected x position of the foreground layer
* foreypos - Selected y position of the foreground layer
* back - Reference to the background layer
* backarea - Reference to the selected area of the background layer
*
* Return:
* OK - On success
* -EINVAL - If one of the parameter invalid or if the size of the selected
* source area outside the visible area of the destination layer.
* (The visible area usually represents the display size)
*/
int (*blend)(FAR struct ltdc_layer_s *dest,
fb_coord_t destxpos, fb_coord_t destypos,
FAR const struct dma2d_layer_s *fore,
fb_coord_t forexpos, fb_coord_t foreypos,
FAR const struct dma2d_layer_s *back,
FAR const struct ltdc_area_s *backarea);
/* Name: fillarea
*
* Description:
* Fill the selected area of the whole layer with a specific color.
*
* Parameter:
* layer - Reference to the layer structure
* area - Reference to the valid area structure select the area
* color - Color to fill the selected area. Color must be formatted
* according to the layer pixel format.
*
* Return:
* OK - On success
* -EINVAL - If one of the parameter invalid or if the size of the selected
* area outside the visible area of the layer.
*/
int (*fillarea)(FAR struct ltdc_layer_s *layer,
FAR const struct ltdc_area_s *area,
uint32_t color);
#endif
};
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_ltdcgetlayer
*
* Description:
* Get the ltdc layer structure to perform hardware layer operation
*
* Parameter:
* lid - Layer identifier
*
* Return:
* Reference to the layer control structure on success or Null if parameter
* invalid.
*
****************************************************************************/
FAR struct ltdc_layer_s *up_ltdcgetlayer(int lid);
#endif /* CONFIG_STM32F7_LTDC */
#endif /* __ARCH_ARM_INCLUDE_STM32F7_LTDC_H */

3
arch/arm/src/samdl/chip/samd_gclk.h

@ -127,10 +127,11 @@
# define GCLK_CLKCTRL_ID_WDT (3 << GCLK_CLKCTRL_ID_SHIFT) /* WDT */
# define GCLK_CLKCTRL_ID_RTC (4 << GCLK_CLKCTRL_ID_SHIFT) /* RTC */
# define GCLK_CLKCTRL_ID_EIC (5 << GCLK_CLKCTRL_ID_SHIFT) /* EIC */
# define GCLK_CLKCTRL_ID_USB (6 << GCLK_CLKCTRL_ID_SHIFT) /* USB */
# define GCLK_CLKCTRL_ID_EVSYS(n) (((n)+7) << GCLK_CLKCTRL_ID_SHIFT)
# define GCLK_CLKCTRL_ID_EVSYS0 (7 << GCLK_CLKCTRL_ID_SHIFT) /* EVSYS_CHANNEL_0 */
# define GCLK_CLKCTRL_ID_EVSYS1 (8 << GCLK_CLKCTRL_ID_SHIFT) /* EVSYS_CHANNEL_1 */
# define GCLK_CLKCTRL_ID_EVSYS2 (9 << GCLK_CLKCTRL_ID_SHIFT) /* EVSYS_CHANNEL_2 */
# define GCLK_CLKCTRL_ID_EVSYS2 (9 << GCLK_CLKCTRL_ID_SHIFT) /* EVSYS_CHANNEL_2 */
# define GCLK_CLKCTRL_ID_EVSYS3 (10 << GCLK_CLKCTRL_ID_SHIFT) /* EVSYS_CHANNEL_3 */
# define GCLK_CLKCTRL_ID_EVSYS4 (11 << GCLK_CLKCTRL_ID_SHIFT) /* EVSYS_CHANNEL_4 */
# define GCLK_CLKCTRL_ID_EVSYS5 (12 << GCLK_CLKCTRL_ID_SHIFT) /* EVSYS_CHANNEL_5 */

6
arch/arm/src/samdl/chip/samd_i2c_master.h

@ -235,10 +235,10 @@
#define I2C_BAUD_SHIFT (0) /* Bits 0-7: Master baud rate */
#define I2C_BAUD_MASK (0xff << I2C_BAUD_SHIFT)
# define I2C_BAUD(n) ((uint16)(n) << I2C_BAUD_SHIFT)
# define I2C_BAUD(n) ((uint16_t)(n) << I2C_BAUD_SHIFT)
#define I2C_BAUDLOW_SHIFT (8) /* Bits 8-15: Master baud rate low */
#define I2C_BAUDLOW_MASK (0xff << I2C_BAUDLOW_SHIFT)
# define I2C_BAUDLOW(n) (uint16)(n) << I2C_BAUDLOW_SHIFT)
# define I2C_BAUDLOW(n) (uint16_t)(n) << I2C_BAUDLOW_SHIFT
#ifdef CONFIG_ARCH_FAMILY_SAMD21
# define I2C_HSBAUD_SHIFT (16) /* Bits 16-23: High speed master baud rate */
@ -246,7 +246,7 @@
# define I2C_HSBAUD(n) ((uint16)(n) << I2C_HSBAUD_SHIFT)
# define I2C_HSBAUDLOW_SHIFT (24) /* Bits 24-31: High speed master baud rate low */
# define I2C_HSBAUDLOW_MASK (0xff << I2C_HSBAUDLOW_SHIFT)
# define I2C_HSBAUDLOW(n) (uint16)(n) << I2C_HSBAUDLOW_SHIFT)
# define I2C_HSBAUDLOW(n) (uint16)(n) << I2C_HSBAUDLOW_SHIFT
#endif
/* Interrupt enable clear, interrupt enable set, interrupt enable set, interrupt flag and

2
arch/arm/src/samdl/chip/saml_usb.h

@ -49,7 +49,7 @@
#include "chip.h"
#ifdef CONFIG_ARCH_FAMILY_SAML21
#if defined(CONFIG_ARCH_FAMILY_SAML21) || defined(CONFIG_ARCH_FAMILY_SAMD21)
/********************************************************************************************
* Pre-processor Definitions

81
arch/arm/src/samdl/sam_usb.c

@ -106,7 +106,13 @@
#include "up_arch.h"
#include "up_internal.h"
#include "saml_periphclks.h"
#if defined(CONFIG_ARCH_FAMILY_SAMD20) || defined(CONFIG_ARCH_FAMILY_SAMD21)
#include "samd_periphclks.h"
#elif defined(CONFIG_ARCH_FAMILY_SAML21)
#include "saml_periphclks.h"
#endif
#include "sam_gclk.h"
#include "chip.h"
#include "sam_port.h"
@ -133,7 +139,7 @@
* enabled.
*/
#ifndef CONFIG_DEBUG
#ifndef CONFIG_DEBUG_USB
# undef CONFIG_SAMDL_USB_REGDEBUG
#endif
@ -891,7 +897,7 @@ static inline void sam_putreg8(uint8_t regval, uint32_t regaddr)
* Name: sam_dumpep
****************************************************************************/
#if defined(CONFIG_SAMDL_USB_REGDEBUG) && defined(CONFIG_DEBUG)
#if defined(CONFIG_SAMDL_USB_REGDEBUG) && defined(CONFIG_DEBUG_USB)
static void sam_dumpep(struct sam_usbdev_s *priv, uint8_t epno)
{
/* Global Registers */
@ -1620,7 +1626,7 @@ static int sam_ep_configure(struct usbdev_ep_s *ep,
/* Verify parameters. Endpoint 0 is not available at this interface */
#if defined(CONFIG_DEBUG) || defined(CONFIG_USBDEV_TRACE)
#if defined(CONFIG_DEBUG_USB) || defined(CONFIG_USBDEV_TRACE)
uint8_t epno = USB_EPNO(desc->addr);
usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno);
@ -1666,7 +1672,7 @@ static int sam_ep_disable(struct usbdev_ep_s *ep)
irqstate_t flags;
uint8_t epno;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -1703,7 +1709,7 @@ static struct usbdev_req_s *sam_ep_allocreq(struct usbdev_ep_s *ep)
{
struct sam_req_s *privreq;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -1736,7 +1742,7 @@ static void sam_ep_freereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
{
struct sam_req_s *privreq = (struct sam_req_s*)req;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -1803,7 +1809,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
uint8_t epno;
int ret = OK;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -1816,7 +1822,7 @@ static int sam_ep_submit(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog));
priv = privep->dev;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!priv->driver)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_NOTCONFIGURED), priv->usbdev.speed);
@ -1914,7 +1920,7 @@ static int sam_ep_cancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req)
struct sam_ep_s *privep = (struct sam_ep_s *)ep;
irqstate_t flags;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!ep || !req)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -1940,7 +1946,7 @@ static int sam_ep_stallresume(struct usbdev_ep_s *ep, bool resume)
irqstate_t flags;
int ret;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -2015,7 +2021,7 @@ static struct usbdev_ep_s *sam_allocep(struct usbdev_s *dev, uint8_t epno,
uint16_t epset = SAM_EPSET_NOTEP0;
usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno);
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -2077,7 +2083,7 @@ static void sam_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep)
struct sam_usbdev_s *priv;
struct sam_ep_s *privep;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!dev || !ep)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -2109,7 +2115,7 @@ static int sam_getframe(struct usbdev_s *dev)
uint32_t regval;
uint16_t frameno;
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -2141,7 +2147,7 @@ static int sam_wakeup(struct usbdev_s *dev)
uint16_t regval;
usbtrace(TRACE_DEVWAKEUP, 0);
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -2188,7 +2194,7 @@ static int sam_selfpowered(struct usbdev_s *dev, bool selfpowered)
usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered);
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!dev)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);
@ -3720,7 +3726,36 @@ static int sam_pullup(struct usbdev_s *dev, bool enable)
static void sam_enableclks(void)
{
sam_usb_enableperiph();
#if defined(CONFIG_ARCH_FAMILY_SAMD20) || defined(CONFIG_ARCH_FAMILY_SAMD21)
uint16_t regval;
/* Enable GCLK specified by BOARD_USB_GCLKGEN */
regval = GCLK_CLKCTRL_ID_USB;
putreg16(regval, SAM_GCLK_CLKCTRL);
/* Wait for clock to become disabled */
while ((getreg16(SAM_GCLK_CLKCTRL) & GCLK_CLKCTRL_CLKEN) != 0);
/* Select the USB source clock generator */
regval |= (uint16_t)BOARD_USB_GCLKGEN << GCLK_CLKCTRL_GEN_SHIFT;
/* Write the new configuration */
putreg16(regval, SAM_GCLK_CLKCTRL);
regval |= GCLK_CLKCTRL_CLKEN;
putreg16(regval, SAM_GCLK_CLKCTRL);
while ((getreg16(SAM_GCLK_CLKCTRL) & GCLK_CLKCTRL_CLKEN) == 0);
#elif defined(CONFIG_ARCH_FAMILY_SAML21)
sam_gclk_chan_enable(GCLK_CHAN_USB, BOARD_USB_GCLKGEN);
#endif
}
/****************************************************************************
@ -3729,9 +3764,12 @@ static void sam_enableclks(void)
static void sam_disableclks(void)
{
sam_gclk_chan_disable(GCLK_CHAN_USB);
sam_usb_disableperiph();
#if defined(CONFIG_ARCH_FAMILY_SAMD20) || defined(CONFIG_ARCH_FAMILY_SAMD21)
#elif defined(CONFIG_ARCH_FAMILY_SAML21)
sam_gclk_chan_disable(GCLK_CHAN_USB);
#endif
sam_usb_disableperiph();
}
/****************************************************************************
@ -3901,7 +3939,8 @@ static void sam_sw_setup(struct sam_usbdev_s *priv)
/* Select a smaller endpoint size for EP0 */
#if SAM_EP0_MAXPACKET < SAM_USB_MAXPACKETSIZE(0)
//#if SAM_EP0_MAXPACKET < SAM_USB_MAXPACKETSIZE(0)
#if SAM_EP0_MAXPACKET < 64
priv->eplist[EP0].ep.maxpacket = SAM_EP0_MAXPACKET;
#endif
}
@ -3940,7 +3979,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVREGISTER, 0);
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (!driver || !driver->ops->bind || !driver->ops->unbind ||
!driver->ops->disconnect || !driver->ops->setup)
{
@ -4013,7 +4052,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
usbtrace(TRACE_DEVUNREGISTER, 0);
#ifdef CONFIG_DEBUG
#ifdef CONFIG_DEBUG_USB
if (driver != priv->driver)
{
usbtrace(TRACE_DEVERROR(SAM_TRACEERR_INVALIDPARMS), 0);

2
arch/arm/src/samdl/sam_usb.h

@ -88,7 +88,7 @@ extern "C"
*
*****************************************************************************/
void sam_udp_suspend(FAR struct usbdev_s *dev, bool resume);
void sam_usb_suspend(FAR struct usbdev_s *dev, bool resume);
#undef EXTERN
#if defined(__cplusplus)

225
arch/arm/src/stm32f7/Kconfig

@ -1176,9 +1176,12 @@ config STM32F7_LTDC
depends on STM32F7_HAVE_LTDC
---help---
The STM32 LTDC is an LCD-TFT Display Controller available on
the STM32F429 and STM32F439 devices. It is a standard parallel
video interface (HSYNC, VSYNC, etc.) for controlling TFT
LCD displays.
the STM32F7x6, STM32F7x7, STM32F7x8 and STM32F7x9 devices.
It features a standard RGB888 parallel video interface (along
with HSYNC, VSYNC, etc.) for controlling TFT LCD displays.
With the STM32F7x8/9, the graphics signals can optionally
be output via DSI instead of the parallel interface:
See config options STM32F7_DSIHOST and STM32F7_LTDC_USE_DSI.
config STM32F7_OTGFS
bool "OTG FS"
@ -4652,7 +4655,221 @@ config STM32F7_ETHMAC_REGDEBUG
default n
depends on DEBUG_NET_INFO
---help---
Enable very low-level register access debug. Depends on CONFIG_DEBUG_FEATURES.
Enable very low-level register access debug. Depends on
CONFIG_DEBUG_FEATURES.
endmenu # Ethernet MAC configuration
if STM32F7_LTDC
menu "LTDC Configuration"
config STM32F7_LTDC_INTERFACE
bool "LTDC interface support"
default n
---help---
Enable the ltdc interface to support ltdc layer control.
config STM32F7_LTDC_USE_DSI
bool "Use DSI as display connection"
default n
depends on STM32F7_DSIHOST
---help---
Select this if your display is connected via DSI.
Deselect option if your display is connected via digital
RGB+HSYNC+VSYNC
config STM32F7_LTDC_BACKLIGHT
bool "Backlight support"
default y
config STM32F7_LTDC_DEFBACKLIGHT
hex "Default backlight level"
default 0xf0
config STM32F7_LTDC_BACKCOLOR
hex "Background color"
default 0x0
---help---
This is the background color that will be used as the LTDC
background layer color. It is an RGB888 format value.
config STM32F7_LTDC_DITHER
bool "Dither support"
default n
config STM32F7_LTDC_DITHER_RED
depends on STM32F7_LTDC_DITHER
int "Dither red width"
range 0 7
default 2
---help---
This is the dither red width.
config STM32F7_LTDC_DITHER_GREEN
depends on STM32F7_LTDC_DITHER
int "Dither green width"
range 0 7
default 2
---help---
This is the dither green width.
config STM32F7_LTDC_DITHER_BLUE
depends on STM32F7_LTDC_DITHER
int "Dither blue width"
range 0 7
default 2
---help---
This is the dither blue width.
config STM32F7_LTDC_FB_BASE
hex "Framebuffer memory start address"
---help---
If you are using the LTDC, then you must provide the address
of the start of the framebuffer. This address will typically
be in the SRAM or SDRAM memory region of the FSMC.
config STM32F7_LTDC_FB_SIZE
int "Framebuffer memory size (bytes)"
default 0
choice
prompt "Layer 1 color format"
default STM32F7_LTDC_L1_RGB565
config STM32F7_LTDC_L1_L8
bool "8 bpp L8 (8-bit CLUT)"
config STM32F7_LTDC_L1_AL44
bool "8 bpp AL44 (4-bit alpha + 4-bit CLUT)"
config STM32F7_LTDC_L1_AL88
bool "16 bpp AL88 (8-bit alpha + 8-bit CLUT)"
config STM32F7_LTDC_L1_RGB565
bool "16 bpp RGB 565"
config STM32F7_LTDC_L1_ARGB4444
bool "16 bpp ARGB 4444"
config STM32F7_LTDC_L1_ARGB1555
bool "16 bpp ARGB 1555"
config STM32F7_LTDC_L1_RGB888
bool "24 bpp RGB 888"
config STM32F7_LTDC_L1_ARGB8888
bool "32 bpp ARGB 8888"
endchoice # Layer 1 color format
config STM32F7_LTDC_L2
bool "Enable Layer 2 support"
default y
if STM32F7_LTDC_L2
choice
prompt "Layer 2 (top layer) color format"
default STM32F7_LTDC_L2_RGB565
config STM32F7_LTDC_L2_L8
bool "8 bpp L8 (8-bit CLUT)"
config STM32F7_LTDC_L2_AL44
bool "8 bpp AL44 (4-bit alpha + 4-bit CLUT)"
config STM32F7_LTDC_L2_AL88
bool "16 bpp AL88 (8-bit alpha + 8-bit CLUT)"
config STM32F7_LTDC_L2_RGB565
bool "16 bpp RGB 565"
config STM32F7_LTDC_L2_ARGB4444
bool "16 bpp ARGB 4444"
config STM32F7_LTDC_L2_ARGB1555
bool "16 bpp ARGB 1555"
config STM32F7_LTDC_L2_RGB888
bool "24 bpp RGB 888"
config STM32F7_LTDC_L2_ARGB8888
bool "32 bpp ARGB 8888"
endchoice # Layer 2 color format
endif # STM32F7_LTDC_L2
if STM32F7_LTDC_L1_L8 || STM32F7_LTDC_L2_L8
config FB_CMAP
bool "Enable color map support"
default y
---help---
Enabling color map support is neccessary for ltdc L8 format.
config FB_TRANSPARENCY
bool "Enable transparency color map support"
default y
---help---
Enabling transparency color map support is neccessary for
ltdc L8 format.
endif
endmenu
endif # STM32F7_LTDC
if STM32F7_DMA2D
menu "DMA2D Configuration"
config STM32F7_DMA2D_NLAYERS
int "Number DMA2D layers"
default 2
---help---
Number of allocatable DMA2D layers except the LTDC layer.
menu "Supported pixel format"
config STM32F7_DMA2D_L8
depends on FB_CMAP
bool "8 bpp L8 (8-bit CLUT)"
default y
config STM32F7_DMA2D_AL44
depends on FB_CMAP
bool "8 bpp AL44 (4-bit alpha + 4-bit CLUT)"
default n
config STM32F7_DMA2D_AL88
depends on FB_CMAP
bool "16 bpp AL88 (8-bit alpha + 8-bit CLUT)"
default n
config STM32F7_DMA2D_RGB565
bool "16 bpp RGB 565"
default y
config STM32F7_DMA2D_ARGB4444
bool "16 bpp ARGB 4444"
default n
config STM32F7_DMA2D_ARGB1555
bool "16 bpp ARGB 1555"
default n
config STM32F7_DMA2D_RGB888
bool "24 bpp RGB 888"
default y
config STM32F7_DMA2D_ARGB8888
bool "32 bpp ARGB 8888"
default n
endmenu
endmenu
endif # STM32F7_DMA2D
endif # ARCH_CHIP_STM32F7

8
arch/arm/src/stm32f7/Make.defs

@ -202,3 +202,11 @@ endif
ifeq ($(CONFIG_STM32F7_RNG),y)
CHIP_CSRCS += stm32_rng.c
endif
ifeq ($(CONFIG_STM32F7_LTDC),y)
CHIP_CSRCS += stm32_ltdc.c
endif
ifeq ($(CONFIG_STM32F7_DMA2D),y)
CHIP_CSRCS += stm32_dma2d.c
endif

230
arch/arm/src/stm32f7/chip/stm32_dma2d.h Executable file

@ -0,0 +1,230 @@
/****************************************************************************
* arch/arm/src/stm32/chip/stm32_dma2d.h
*
* Copyright (C) 2014-2015 Marco Krahl. All rights reserved.
* Author: Marco Krahl <ocram.lhark@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32_DMA2D_H
#define __ARCH_ARM_SRC_STM32_CHIP_STM32_DMA2D_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "chip/stm32_memorymap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define STM32_DMA2D_NCLUT 256 /* Number of entries in the CLUT */
/* DMA2D Register Offsets ****************************************************/
#define STM32_DMA2D_CR_OFFSET 0x0000 /* DMA2D Control Register */
#define STM32_DMA2D_ISR_OFFSET 0x0004 /* DMA2D Interrupt Status Register */
#define STM32_DMA2D_IFCR_OFFSET 0x0008 /* DMA2D Interrupt Flag Clear Register */
#define STM32_DMA2D_FGMAR_OFFSET 0x000C /* DMA2D Foreground Memory Address Register */
#define STM32_DMA2D_FGOR_OFFSET 0x0010 /* DMA2D Foreground Offset Register */
#define STM32_DMA2D_BGMAR_OFFSET 0x0014 /* DMA2D Background Memory Address Register */
#define STM32_DMA2D_BGOR_OFFSET 0x0018 /* DMA2D Background Offset Register */
#define STM32_DMA2D_FGPFCCR_OFFSET 0x001C /* DMA2D Foreground PFC Control Register */
#define STM32_DMA2D_FGCOLR_OFFSET 0x0020 /* DMA2D Foreground Color Register */
#define STM32_DMA2D_BGPFCCR_OFFSET 0x0024 /* DMA2D Background PFC Control Register */
#define STM32_DMA2D_BGCOLR_OFFSET 0x0028 /* DMA2D Background Color Register */
#define STM32_DMA2D_FGCMAR_OFFSET 0x002C /* DMA2D Foreground CLUT Memory Address Register */
#define STM32_DMA2D_BGCMAR_OFFSET 0x0030 /* DMA2D Background CLUT Memory Address Register */
#define STM32_DMA2D_OPFCCR_OFFSET 0x0034 /* DMA2D Output PFC Control Register */
#define STM32_DMA2D_OCOLR_OFFSET 0x0038 /* DMA2D Output Color Register */
#define STM32_DMA2D_OMAR_OFFSET 0x003C /* DMA2D Output Memory Address Register */
#define STM32_DMA2D_OOR_OFFSET 0x0040 /* DMA2D Output Offset Register */
#define STM32_DMA2D_NLR_OFFSET 0x0044 /* DMA2D Number Of Line Register */
#define STM32_DMA2D_LWR_OFFSET 0x0048 /* DMA2D Line Watermark Register */
#define STM32_DMA2D_AMTCR_OFFSET 0x004C /* DMA2D AHB Master Time Configuration Register */
/* DMA2D Register Addresses **************************************************/
#define STM32_DMA2D_CR (STM32_DMA2D_BASE+STM32_DMA2D_CR_OFFSET)
#define STM32_DMA2D_ISR (STM32_DMA2D_BASE+STM32_DMA2D_ISR_OFFSET)
#define STM32_DMA2D_IFCR (STM32_DMA2D_BASE+STM32_DMA2D_IFCR_OFFSET)
#define STM32_DMA2D_FGMAR (STM32_DMA2D_BASE+STM32_DMA2D_FGMAR_OFFSET)
#define STM32_DMA2D_FGOR (STM32_DMA2D_BASE+STM32_DMA2D_FGOR_OFFSET)
#define STM32_DMA2D_BGMAR (STM32_DMA2D_BASE+STM32_DMA2D_BGMAR_OFFSET)
#define STM32_DMA2D_BGOR (STM32_DMA2D_BASE+STM32_DMA2D_BGOR_OFFSET)
#define STM32_DMA2D_FGPFCCR (STM32_DMA2D_BASE+STM32_DMA2D_FGPFCCR_OFFSET)
#define STM32_DMA2D_FGCOLR (STM32_DMA2D_BASE+STM32_DMA2D_FGCOLR_OFFSET)
#define STM32_DMA2D_BGPFCCR (STM32_DMA2D_BASE+STM32_DMA2D_BGPFCCR_OFFSET)
#define STM32_DMA2D_BGCOLR (STM32_DMA2D_BASE+STM32_DMA2D_BGCOLR_OFFSET)
#define STM32_DMA2D_FGCMAR (STM32_DMA2D_BASE+STM32_DMA2D_FGCMAR_OFFSET)
#define STM32_DMA2D_BGCMAR (STM32_DMA2D_BASE+STM32_DMA2D_BGCMAR_OFFSET)
#define STM32_DMA2D_OPFCCR (STM32_DMA2D_BASE+STM32_DMA2D_OPFCCR_OFFSET)
#define STM32_DMA2D_OCOLR (STM32_DMA2D_BASE+STM32_DMA2D_OCOLR_OFFSET)
#define STM32_DMA2D_OMAR (STM32_DMA2D_BASE+STM32_DMA2D_OMAR_OFFSET)
#define STM32_DMA2D_OOR (STM32_DMA2D_BASE+STM32_DMA2D_OOR_OFFSET)
#define STM32_DMA2D_NLR (STM32_DMA2D_BASE+STM32_DMA2D_NLR_OFFSET)
#define STM32_DMA2D_LWR (STM32_DMA2D_BASE+STM32_DMA2D_LWR_OFFSET)
/* DMA2D Register Bit Definitions ********************************************/
/* DMA2D Control Register */
#define DMA2D_CR_START (1 << 0) /* Start Bit */
#define DMA2D_CR_SUSP (1 << 1) /* Suspend Bit */
#define DMA2D_CR_ABORT (1 << 2) /* Abort Bit */
#define DMA2D_CR_TEIE (1 << 8) /* Transfer Error Interupt Enable Bit */
#define DMA2D_CR_TCIE (1 << 9) /* Transfer Complete Interrupt Enable Bit */
#define DMA2D_CR_TWIE (1 << 10) /* Transfer Watermark Interrupt Enable Bit */
#define DMA2D_CR_CAEIE (1 << 11) /* CLUT Access Error Interrupt Enable Bit */
#define DMA2D_CR_CTCIE (1 << 12) /* CLUT Transfer Complete Interrupt Enable Bit */
#define DMA2D_CR_CEIE (1 << 13) /* Configuration Error Interrupt Enable Bit */
#define DMA2D_CR_MODE_SHIFT (16) /* Bits 16-17 DMA2D mode Bits */
#define DMA2D_CR_MODE_MASK (3 << DMA2D_CR_MODE_SHIFT)
#define DMA2D_CR_MODE(n) ((uint32_t)(n) << DMA2D_CR_MODE_SHIFT)
/* DMA2D Interrupt Status Register */
#define DMA2D_ISR_TEIF (1 << 0) /* Transfer error interrupt flag */
#define DMA2D_ISR_TCIF (1 << 1) /* Transfer Complete Interrupt flag */
#define DMA2D_ISR_TWIF (1 << 2) /* Transfer Watermark Interrupt flag */
#define DMA2D_ISR_CAEIF (1 << 3) /* CLUT Access Error Interrupt flag */
#define DMA2D_ISR_CTCIF (1 << 4) /* CLUT Transfer Complete Interrupt flag */
#define DMA2D_ISR_CEIF (1 << 5) /* Configuration Error Interrupt flag */
/* DMA2D Interrupt Flag Clear Register */
#define DMA2D_IFCR_CTEIF (1 << 0) /* Clear Transfer Interrupt Flag */
#define DMA2D_IFCR_CTCIF (1 << 1) /* Clear Transfer Complete Interrupt Flag */
#define DMA2D_IFCR_CTWIF (1 << 2) /* Clear Transfer Watermark Interrupt Flag */
#define DMA2D_IFCR_CAECIF (1 << 3) /* Clear CLUT Access Error Interrupt Flag */
#define DMA2D_IFCR_CCTCIF (1 << 4) /* Clear CLUT Transfer Complete Interrupt Flag */
#define DMA2D_IFCR_CCEIF (1 << 5) /* Clear Configuration Error Interrupt Flag */
/* DMA2D Foreground Memory Access Register */
/* DMA2D Background Memory Access Register */
/* DMA2D Foreground/Background Offset Register */
#define DMA2D_xGOR_SHIFT (0) /* Bits 0-13 Line Offset */
#define DMA2D_xGOR_MASK (0x3FFF << DMA2D_xGOR_SHIFT)
#define DMA2D_xGOR(n) ((uint32_t)(n) << DMA2D_xGOR_SHIFT)
/* DMA2D Foreground/Background PFC Control Register */
#define DMA2D_xGPFCCR_CM_SHIFT (0) /* Bits 0-3 Color Mode */
#define DMA2D_xGPFCCR_CM_MASK (0xF << DMA2D_xGPFCCR_CM_SHIFT)
#define DMA2D_xGPFCCR_CM(n) ((uint32_t)(n) << DMA2D_xGPFCCR_CM_SHIFT)
#define DMA2D_xGPFCCR_CCM (1 << 4) /* CLUT Color Mode */
#define DMA2D_xGPFCCR_START (1 << 5) /* Start */
#define DMA2D_xGPFCCR_CS_SHIFT (8) /* Bits 8-15 CLUT Size */
#define DMA2D_xGPFCCR_CS_MASK (0xFF << DMA2D_xGPFCCR_CS_SHIFT)
#define DMA2D_xGPFCCR_CS(n) ((uint32_t)(n) << DMA2D_xGPFCCR_CS_SHIFT)
#define DMA2D_xGPFCCR_AM_SHIFT (16) /* Bits 16-17 Alpha Mode */
#define DMA2D_xGPFCCR_AM_MASK (3 << DMA2D_xGPFCCR_AM_SHIFT)
#define DMA2D_xGPFCCR_AM(n) ((uint32_t)(n) << DMA2D_xGPFCCR_AM_SHIFT)
#define DMA2D_xGPFCCR_ALPHA_SHIFT (24) /* Bits 24-31 Alpha Value */
#define DMA2D_xGPFCCR_ALPHA_MASK (0xFF << DMA2D_xGPFCCR_ALPHA_SHIFT)
#define DMA2D_xGPFCCR_ALPHA(n) ((uint32_t)(n) << DMA2D_xGPFCCR_ALPHA_SHIFT)
/* DMA2D Foreground/Background Color Register */
#define DMA2D_xGCOLR_BLUE_SHIFT (0) /* Bits 0-7 Blue Value */
#define DMA2D_xGCOLR_BLUE_MASK (0xFF << DMA2D_xGCOLR_BLUE_SHIFT)
#define DMA2D_xGCOLR_BLUE(n) ((uint32_t)(n) << DMA2D_xGCOLR_BLUE_SHIFT)
#define DMA2D_xGCOLR_GREEN_SHIFT (8) /* Bits 8-15 Green Value */
#define DMA2D_xGCOLR_GREEN_MASK (0xFF << DMA2D_xGCOLR_GREEN_SHIFT)
#define DMA2D_xGCOLR_GREEN(n) ((uint32_t)(n) << DMA2D_xGCOLR_GREEN_SHIFT)
#define DMA2D_xGCOLR_RED_SHIFT (16) /* Bits 16-23 Red Value */
#define DMA2D_xGCOLR_RED_MASK (0xFF << DMA2D_xGCOLR_RED_SHIFT)
#define DMA2D_xGCOLR_RED(n) ((uint32_t)(n) << DMA2D_xGCOLR_RED_SHIFT)
/* DMA2D Foreground CLUT Memory Address Register */
/* DMA2D Background CLUT Memory Address Register */
/* DMA2D Output PFC Control Register */
#define DMA2D_OPFCCR_CM_SHIFT (0) /* Bits 0-2 Color Mode */
#define DMA2D_OPFCCR_CM_MASK (7 << DMA2D_OPFCCR_CM_SHIFT)
#define DMA2D_OPFCCR_CM(n) ((uint32_t)(n) << DMA2D_OPFCCR_CM_SHIFT)
/* DMA2D Output Color Register */
#define DMA2D_OCOLR_BLUE_SHIFT (0) /* Bits 0-7 Blue Value */
#define DMA2D_OCOLR_BLUE_MASK (0xFF << DMA2D_OCOLR_BLUE_SHIFT)
#define DMA2D_OCOLR_BLUE(n) ((uint32_t)(n) << DMA2D_OCOLR_BLUE_SHIFT)
#define DMA2D_OCOLR_GREEN_SHIFT (8) /* Bits 8-15 Green Value */
#define DMA2D_OCOLR_GREEN_MASK (0xFF << DMA2D_OCOLR_GREEN_SHIFT)
#define DMA2D_OCOLR_GREEN(n) ((uint32_t)(n) << DMA2D_OCOLR_GREEN_SHIFT)
#define DMA2D_OCOLR_RED_SHIFT (16) /* Bits 16-23 Red Value */
#define DMA2D_OCOLR_RED_MASK (0xFF << DMA2D_OCOLR_RED_SHIFT)
#define DMA2D_OCOLR_RED(n) ((uint32_t)(n) << DMA2D_OCOLR_RED_SHIFT)
#define DMA2D_OCOLR_ALPHA_SHIFT (24) /* Bits 24-31 Alpha Value */
#define DMA2D_OCOLR_ALPHA_MASK (0xFF << DMA2D_OCOLR_ALPHA_SHIFT)
#define DMA2D_OCOLR_ALPHA(n) ((uint32_t)(n) << DMA2D_OCOLR_ALPHA_SHIFT)
/* DMA2D Output Memory Address Register */
/* DMA2D Output Offset Register */
#define DMA2D_OOR_LO_SHIFT (0) /* Bits 0-13 Line Offset */
#define DMA2D_OOR_LO_MASK (0x3FFF << DMA2D_OOR_LO_SHIFT)
#define DMA2D_OOR_LO(n) ((uint32_t)(n) << DMA2D_OOR_LO_SHIFT)
/* DMA2D Number Of Line Register */
#define DMA2D_NLR_NL_SHIFT (0) /* Bits 0-15 Number Of Lines */
#define DMA2D_NLR_NL_MASK (0xFFFF << DMA2D_NLR_NL_SHIFT)
#define DMA2D_NLR_NL(n) ((uint32_t)(n) << DMA2D_NLR_NL_SHIFT)
#define DMA2D_NLR_PL_SHIFT (16) /* Bits 16-29 Pixel per Lines */
#define DMA2D_NLR_PL_MASK (0x3FFF << DMA2D_NLR_PL_SHIFT)
#define DMA2D_NLR_PL(n) ((uint32_t)(n) << DMA2D_NLR_PL_SHIFT)
/* DMA2D Line Watermark Register */
#define DMA2D_LWR_LW_SHIFT (0) /* Bits 0-15 Line Watermark */
#define DMA2D_LWR_LW_MASK (0xFFFF << DMA2D_LWR_LW_SHIFT)
#define DMA2D_LWR_LW(n) ((uint32_t)(n) << DMA2D_LWR_LW_SHIFT)
/* DMA2D AHB Master Timer Configuration Register */
#define DMA2D_AMTCR_EN (1 << 0) /* Enable */
#define DMA2D_AMTCR_DT_SHIFT (0) /* Bits 8-15 Dead Time */
#define DMA2D_AMTCR_DT_MASK (0xFF << DMA2D_AMTCR_DT_SHIFT)
#define DMA2D_AMTCR_DT(n) ((uint32_t)(n) << DMA2D_AMTCR_DT_SHIFT)
/****************************************************************************
* Public Types
****************************************************************************/
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32_DMA2D_H */

381
arch/arm/src/stm32f7/chip/stm32_ltdc.h Executable file

@ -0,0 +1,381 @@
/************************************************************************************
* arch/arm/src/stm32/chip/stm32_ltdc.h
*
* Copyright (C) 2013 Ken Pettit. All rights reserved.
* Author: Ken Pettit <pettitkd@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_LTDC_H
#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_LTDC_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip/stm32_memorymap.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#define STM32_LTDC_NCLUT 256 /* Number of entries in the CLUTs */
/* LCDC Register Offsets ************************************************************/
#define STM32_LTDC_SSCR_OFFSET 0x0008 /* LTDC Synchronization Size Config Register */
#define STM32_LTDC_BPCR_OFFSET 0x000c /* LTDC Back Porch Configuration Register */
#define STM32_LTDC_AWCR_OFFSET 0x0010 /* LTDC Active Width Configuration Register */
#define STM32_LTDC_TWCR_OFFSET 0x0014 /* LTDC Total Width Configuration Register */
#define STM32_LTDC_GCR_OFFSET 0x0018 /* LTDC Global Control Register */
/* 0x0020 Reserved */
#define STM32_LTDC_SRCR_OFFSET 0x0024 /* LTDC Shadow Reload Configuration Register */
/* 0x0028 Reserved */
#define STM32_LTDC_BCCR_OFFSET 0x002C /* LTDC Background Color Configuration Register */
/* 0x0030 Reserved */
#define STM32_LTDC_IER_OFFSET 0x0034 /* LTDC Interrupt Enable Register */
#define STM32_LTDC_ISR_OFFSET 0x0038 /* LTDC Interrupt Status Register */
#define STM32_LTDC_ICR_OFFSET 0x003C /* LTDC Interrupt Clear Register */
#define STM32_LTDC_LIPCR_OFFSET 0x0040 /* LTDC Line Interrupt Position Config Register */
#define STM32_LTDC_CPSR_OFFSET 0x0044 /* LTDC Current Position Status Register */
#define STM32_LTDC_CDSR_OFFSET 0x0048 /* LTDC Current Display Status Register */
/* 0x004c-0x0080 Reserved */
#define STM32_LTDC_L1CR_OFFSET 0x0084 /* LTDC Layer 1 Control Register */
#define STM32_LTDC_L1WHPCR_OFFSET 0x0088 /* LTDC Layer 1 Window Horiz Pos Config Register */
#define STM32_LTDC_L1WVPCR_OFFSET 0x008C /* LTDC Layer 1 Window Vert Pos Config Register */
#define STM32_LTDC_L1CKCR_OFFSET 0x0090 /* LTDC Layer 1 Color Keying Config Register */
#define STM32_LTDC_L1PFCR_OFFSET 0x0094 /* LTDC Layer 1 Pixel Format Configuration Register */
#define STM32_LTDC_L1CACR_OFFSET 0x0098 /* LTDC Layer 1 Constant Alpha Config Register */
#define STM32_LTDC_L1DCCR_OFFSET 0x009C /* LTDC Layer 1 Default Color Config Register */
#define STM32_LTDC_L1BFCR_OFFSET 0x00A0 /* LTDC Layer 1 Blending Factors Config Register */
/* 0x00A4-0x00A8 Reserved */
#define STM32_LTDC_L1CFBAR_OFFSET 0x00AC /* LTDC Layer 1 Color Frame Buffer Address Register */
#define STM32_LTDC_L1CFBLR_OFFSET 0x00B0 /* LTDC Layer 1 Color Frame Buffer Length Register */
#define STM32_LTDC_L1CFBLNR_OFFSET 0x00B4 /* LTDC Layer 1 Color Frame Buffer Line Number Register */
/* 0x00B8-0x00C0 Reserved */
#define STM32_LTDC_L1CLUTWR_OFFSET 0x00C4 /* LTDC Layer 1 CLUT Write Register */
/* 0x00C8-0x0100 Reserved */
#define STM32_LTDC_L2CR_OFFSET 0x0104 /* LTDC Layer 2 Control Register */
#define STM32_LTDC_L2WHPCR_OFFSET 0x0108 /* LTDC Layer 2 Window Horiz Pos Config Register */
#define STM32_LTDC_L2WVPCR_OFFSET 0x010C /* LTDC Layer 2 Window Vert Pos Config Register */
#define STM32_LTDC_L2CKCR_OFFSET 0x0110 /* LTDC Layer 2 Color Keying Config Register */
#define STM32_LTDC_L2PFCR_OFFSET 0x0114 /* LTDC Layer 2 Pixel Format Configuration Register */
#define STM32_LTDC_L2CACR_OFFSET 0x0118 /* LTDC Layer 2 Constant Alpha Config Register */
#define STM32_LTDC_L2DCCR_OFFSET 0x011C /* LTDC Layer 2 Default Color Config Register */
#define STM32_LTDC_L2BFCR_OFFSET 0x0120 /* LTDC Layer 2 Blending Factors Config Register */
/* 0x0124-0x0128 Reserved */
#define STM32_LTDC_L2CFBAR_OFFSET 0x012C /* LTDC Layer 2 Color Frame Buffer Address Register */
#define STM32_LTDC_L2CFBLR_OFFSET 0x0130 /* LTDC Layer 2 Color Frame Buffer Length Register */
#define STM32_LTDC_L2CFBLNR_OFFSET 0x0134 /* LTDC Layer 2 Color Frame Buffer Line Number Register */
/* 0x0138-0x0130 Reserved */
#define STM32_LTDC_L2CLUTWR_OFFSET 0x0144 /* LTDC Layer 2 CLUT Write Register */
/* 0x0148-0x03ff Reserved */
/* LTDC Register Addresses *********************************************************/
#define STM32_LTDC_SSCR (STM32_LTDC_BASE+STM32_LTDC_SSCR_OFFSET)
#define STM32_LTDC_BPCR (STM32_LTDC_BASE+STM32_LTDC_BPCR_OFFSET)
#define STM32_LTDC_AWCR (STM32_LTDC_BASE+STM32_LTDC_AWCR_OFFSET)
#define STM32_LTDC_TWCR (STM32_LTDC_BASE+STM32_LTDC_TWCR_OFFSET)
#define STM32_LTDC_GCR (STM32_LTDC_BASE+STM32_LTDC_GCR_OFFSET)
#define STM32_LTDC_SRCR (STM32_LTDC_BASE+STM32_LTDC_SRCR_OFFSET)
#define STM32_LTDC_BCCR (STM32_LTDC_BASE+STM32_LTDC_BCCR_OFFSET)
#define STM32_LTDC_IER (STM32_LTDC_BASE+STM32_LTDC_IER_OFFSET)
#define STM32_LTDC_ISR (STM32_LTDC_BASE+STM32_LTDC_ISR_OFFSET)
#define STM32_LTDC_ICR (STM32_LTDC_BASE+STM32_LTDC_ICR_OFFSET)
#define STM32_LTDC_LIPCR (STM32_LTDC_BASE+STM32_LTDC_LIPCR_OFFSET)
#define STM32_LTDC_CPSR (STM32_LTDC_BASE+STM32_LTDC_CPSR_OFFSET)
#define STM32_LTDC_CDSR (STM32_LTDC_BASE+STM32_LTDC_CDSR_OFFSET)
#define STM32_LTDC_L1CR (STM32_LTDC_BASE+STM32_LTDC_L1CR_OFFSET)
#define STM32_LTDC_L1WHPCR (STM32_LTDC_BASE+STM32_LTDC_L1WHPCR_OFFSET)
#define STM32_LTDC_L1WVPCR (STM32_LTDC_BASE+STM32_LTDC_L1WVPCR_OFFSET)
#define STM32_LTDC_L1CKCR (STM32_LTDC_BASE+STM32_LTDC_L1CKCR_OFFSET)
#define STM32_LTDC_L1PFCR (STM32_LTDC_BASE+STM32_LTDC_L1PFCR_OFFSET)
#define STM32_LTDC_L1CACR (STM32_LTDC_BASE+STM32_LTDC_L1CACR_OFFSET)
#define STM32_LTDC_L1DCCR (STM32_LTDC_BASE+STM32_LTDC_L1DCCR_OFFSET)
#define STM32_LTDC_L1BFCR (STM32_LTDC_BASE+STM32_LTDC_L1BFCR_OFFSET)
#define STM32_LTDC_L1CFBAR (STM32_LTDC_BASE+STM32_LTDC_L1CFBAR_OFFSET)
#define STM32_LTDC_L1CFBLR (STM32_LTDC_BASE+STM32_LTDC_L1CFBLR_OFFSET)
#define STM32_LTDC_L1CFBLNR (STM32_LTDC_BASE+STM32_LTDC_L1CFBLNR_OFFSET)
#define STM32_LTDC_L1CLUTWR (STM32_LTDC_BASE+STM32_LTDC_L1CLUTWR_OFFSET)
#define STM32_LTDC_L2CR (STM32_LTDC_BASE+STM32_LTDC_L2CR_OFFSET)
#define STM32_LTDC_L2WHPCR (STM32_LTDC_BASE+STM32_LTDC_L2WHPCR_OFFSET)
#define STM32_LTDC_L2WVPCR (STM32_LTDC_BASE+STM32_LTDC_L2WVPCR_OFFSET)
#define STM32_LTDC_L2CKCR (STM32_LTDC_BASE+STM32_LTDC_L2CKCR_OFFSET)
#define STM32_LTDC_L2PFCR (STM32_LTDC_BASE+STM32_LTDC_L2PFCR_OFFSET)
#define STM32_LTDC_L2CACR (STM32_LTDC_BASE+STM32_LTDC_L2CACR_OFFSET)
#define STM32_LTDC_L2DCCR (STM32_LTDC_BASE+STM32_LTDC_L2DCCR_OFFSET)
#define STM32_LTDC_L2BFCR (STM32_LTDC_BASE+STM32_LTDC_L2BFCR_OFFSET)
#define STM32_LTDC_L2CFBAR (STM32_LTDC_BASE+STM32_LTDC_L2CFBAR_OFFSET)
#define STM32_LTDC_L2CFBLR (STM32_LTDC_BASE+STM32_LTDC_L2CFBLR_OFFSET)
#define STM32_LTDC_L2CFBLNR (STM32_LTDC_BASE+STM32_LTDC_L2CFBLNR_OFFSET)
#define STM32_LTDC_L2CLUTWR (STM32_LTDC_BASE+STM32_LTDC_L2CLUTWR_OFFSET)
/* LTDC Register Bit Definitions ***************************************************/
/* LTDC Synchronization Size Configuration Register */
#define LTDC_SSCR_VSH_SHIFT (0) /* Bits 0-10: Vertical Sync Height (scan lines) */
#define LTDC_SSCR_VSH_MASK (0x7ff << LTDC_SSCR_VSH_SHIFT)
# define LTDC_SSCR_VSH(n) ((uint32_t)(n) << LTDC_SSCR_VSH_SHIFT)
#define LTDC_SSCR_HSW_SHIFT (16) /* Bits 16-27: Horizontal Sync Width (pixel clocks) */
#define LTDC_SSCR_HSW_MASK (0xfff << LTDC_SSCR_HSW_SHIFT)
# define LTDC_SSCR_HSW(n) ((uint32_t)(n) << LTDC_SSCR_HSW_SHIFT)
/* LTDC Back Porch Configuration Register */
#define LTDC_BPCR_AVBP_SHIFT (0) /* Bits 0-10: Accumulated Vertical back porch (scan lines) */
#define LTDC_BPCR_AVBP_MASK (0x7ff << LTDC_BPCR_AVBP_SHIFT)
# define LTDC_BPCR_AVBP(n) ((uint32_t)(n) << LTDC_BPCR_AVBP_SHIFT)
#define LTDC_BPCR_AHBP_SHIFT (16) /* Bits 16-27: Accumulated Horizontal back porch (pixel clocks) */
#define LTDC_BPCR_AHBP_MASK (0xfff << LTDC_BPCR_AVBP_SHIFT)
# define LTDC_BPCR_AHBP(n) ((uint32_t)(n) << LTDC_BPCR_AHBP_SHIFT)
/* LTDC Active Width Configuration Register */
#define LTDC_AWCR_AAH_SHIFT (0) /* Bits 0-10: Accumulated Active Height (scan lines) */
#define LTDC_AWCR_AAH_MASK (0x7ff << LTDC_AWCR_AAH_SHIFT)
# define LTDC_AWCR_AAH(n) ((uint32_t)(n) << LTDC_AWCR_AAH_SHIFT)
#define LTDC_AWCR_AAW_SHIFT (16) /* Bits 16-27: Accumulated Active Width (pixel clocks) */
#define LTDC_AWCR_AAW_MASK (0xfff << LTDC_AWCR_AAW_SHIFT)
# define LTDC_AWCR_AAW(n) ((uint32_t)(n) << LTDC_AWCR_AAW_SHIFT)
/* LTDC Total Width Configuration Register */
#define LTDC_TWCR_TOTALH_SHIFT (0) /* Bits 0-10: Total Height (scan lines) */
#define LTDC_TWCR_TOTALH_MASK (0x7ff << LTDC_TWCR_TOTALH_SHIFT)
# define LTDC_TWCR_TOTALH(n) ((uint32_t)(n) << LTDC_TWCR_TOTALH_SHIFT)
#define LTDC_TWCR_TOTALW_SHIFT (16) /* Bits 16-27: Total Width (pixel clocks) */
#define LTDC_TWCR_TOTALW_MASK (0xfff << LTDC_TWCR_TOTALW_SHIFT)
# define LTDC_TWCR_TOTALW(n) ((uint32_t)(n) << LTDC_TWCR_TOTALW_SHIFT)
/* LTDC Global Control Register */
#define LTDC_GCR_LTDCEN (1 << 0) /* Bit 0: LCD-TFT Controller Enable Bit */
#define LTDC_GCR_DBW_SHIFT (4) /* Bits 4-6: Dither Blue Width */
#define LTDC_GCR_DBW_MASK (0x7 << LTDC_GCR_DBW_SHIFT)
# define LTDC_GCR_DBW(n) ((uint32_t)(n) << LTDC_GCR_DBW_SHIFT)
#define LTDC_GCR_DGW_SHIFT (8) /* Bits 8-10: Dither Green Width */
#define LTDC_GCR_DGW_MASK (0x7 << LTDC_GCR_DGW_SHIFT)
# define LTDC_GCR_DGW(n) ((uint32_t)(n) << LTDC_GCR_DGW_SHIFT)
#define LTDC_GCR_DRW_SHIFT (12) /* Bits 12-14: Dither Red Width */
#define LTDC_GCR_DRW_MASK (0x7 << LTDC_GCR_DRW_SHIFT)
# define LTDC_GCR_DRW(n) ((uint32_t)(n) << LTDC_GCR_DRW_SHIFT)
#define LTDC_GCR_DEN (1 << 16) /* Bit 16: Dither Enable */
#define LTDC_GCR_PCPOL (1 << 28) /* Bit 28: Pixel Clock Polarity */
#define LTDC_GCR_DEPOL (1 << 29) /* Bit 29: Data Enable Polarity */
#define LTDC_GCR_VSPOL (1 << 30) /* Bit 30: Vertical Sync Polarity */
#define LTDC_GCR_HSPOL (1 << 31) /* Bit 31: Horizontal Sync Polarity */
/* LTDC Shadow Reload Configuration Register */
#define LTDC_SRCR_IMR (1 << 0) /* Bit 0: Immediate Reload */
#define LTDC_SRCR_VBR (1 << 1) /* Bit 1: Vertical Blanking Reload */
/* LTDC Background Color Configuration Register */
#define LTDC_BCCR_BCBLUE_SHIFT (0) /* Bits 0-7: Background Color Blue Value */
#define LTDC_BCCR_BCBLUE_MASK (0xFF << LTDC_BCCR_BCBLUE_SHIFT)
# define LTDC_BCCR_BCBLUE(n) ((uint32_t)(n) << LTDC_BCCR_BCBLUE_SHIFT)
#define LTDC_BCCR_BCGREEN_SHIFT (8) /* Bits 8-15: Background Color Green Value */
#define LTDC_BCCR_BCGREEN_MASK (0xFF << LTDC_BCCR_BCGREEN_SHIFT)
# define LTDC_BCCR_BCGREEN(n) ((uint32_t)(n) << LTDC_BCCR_BCGREEN_SHIFT)
#define LTDC_BCCR_BCRED_SHIFT (16) /* Bits 16-23: Background Color Red Value */
#define LTDC_BCCR_BCRED_MASK (0xFF << LTDC_BCCR_BCRED_SHIFT)
# define LTDC_BCCR_BCRED(n) ((uint32_t)(n) << LTDC_BCCR_BCRED_SHIFT)
/* LTDC Interrupt Enable Register */
#define LTDC_IER_LIE (1 << 0) /* Bit 0: Line Interrupt Enable */
#define LTDC_IER_FUIE (1 << 1) /* Bit 1: FIFO Underrun Interrupt Enable */
#define LTDC_IER_TERRIE (1 << 2) /* Bit 2: Transfer Error Interrupt Enable */
#define LTDC_IER_RRIE (1 << 3) /* Bit 3: Register Reload Interrupt Enable */
/* LTDC Interrupt Status Register */
#define LTDC_ISR_LIF (1 << 0) /* Bit 0: Line Interrupt Flag */
#define LTDC_ISR_FUIF (1 << 1) /* Bit 1: FIFO Underrun Interrupt Flag */
#define LTDC_IER_TERRIF (1 << 2) /* Bit 2: Transfer Error Interrupt Flag */
#define LTDC_ISR_RRIF (1 << 3) /* Bit 3: Register Reload Interrupt Flag */
/* LTDC Interrupt Clear Register */
#define LTDC_ICR_CLIF (1 << 0) /* Bit 0: Clear Line Interrupt Flag */
#define LTDC_ICR_CFUIF (1 << 1) /* Bit 1: Clear FIFO Underrun Interrupt Flag */
#define LTDC_ICR_CTERRIF (1 << 2) /* Bit 2: Clear Transfer Error Interrupt Flag */
#define LTDC_ICR_CRRIF (1 << 3) /* Bit 3: Clear Register Reload Interrupt Flag */
/* LTDC Line Interrupt Posittion Configuration Register */
#define LTDC_LIPCR_LIPOS_SHIFT (0) /* Bits 0-10: Line Interrupt Position */
#define LTDC_LIPCR_LIPOS_MASK (0x7FF << LTDC_LIPCR_LIPOS_SHIFT)
# define LTDC_LIPCR_LIPOS(n) ((uint32_t)(n) << LTDC_LIPCR_LIPOS_SHIFT)
/* LTDC Current Position Status Register */
#define LTDC_CPSR_CYPOS_SHIFT (0) /* Bits 0-15: Current Y Position */
#define LTDC_CPSR_CYPOS_MASK (0xFFFF << LTDC_CPSR_CYPOS_SHIFT)
# define LTDC_CPSR_CYPOS(n) ((uint32_t)(n) << LTDC_CPSR_CYPOS_SHIFT)
#define LTDC_CPSR_CXPOS_SHIFT (16) /* Bits 15-31: Current X Position */
#define LTDC_CPSR_CXPOS_MASK (0xFFFF << LTDC_CPSR_CXPOS_SHIFT)
# define LTDC_CPSR_CXPOS(n) ((uint32_t)(n) << LTDC_CPSR_CXPOS_SHIFT)
/* LTDC Current Display Status Register */
#define LTDC_CDSR_VDES (1 << 0) /* Bit 0: Vertical Data Enable display Status */
#define LTDC_CDSR_HDES (1 << 1) /* Bit 1: Horizontal Data Enable display Status */
#define LTDC_CDSR_VSYNCS (1 << 2) /* Bit 2: Vertical Sync display Status */
#define LTDC_CDSR_HSYNCS (1 << 3) /* Bit 3: Horizontal Sync display Status */
/* LTDC Layer x Control Register */
#define LTDC_LxCR_LEN (1 << 0) /* Bit 0: Layer Enable */
#define LTDC_LxCR_COLKEN (1 << 1) /* Bit 1: Color Keying Enable */
#define LTDC_LxCR_CLUTEN (1 << 4) /* Bit 4: Color Look-Up Table Enable */
/* LTDC Layer x Window Horizontal Position Configuration Register */
#define LTDC_LxWHPCR_WHSTPOS_SHIFT (0) /* Bits 0-11: Window Horizontal Start Position */
#define LTDC_LxWHPCR_WHSTPOS_MASK (0xFFF << LTDC_LxWHPCR_WHSTPOS_SHIFT)
# define LTDC_LxWHPCR_WHSTPOS(n) ((uint32_t)(n) << LTDC_LxWHPCR_WHSTPOS_SHIFT)
#define LTDC_LxWHPCR_WHSPPOS_SHIFT (16) /* Bits 16-27: Window Horizontal Stop Position */
#define LTDC_LxWHPCR_WHSPPOS_MASK (0xFFF << LTDC_LxWHPCR_WHSPPOS_SHIFT)
# define LTDC_LxWHPCR_WHSPPOS(n) ((uint32_t)(n) << LTDC_LxWHPCR_WHSPPOS_SHIFT)
/* LTDC Layer x Window Vertical Position Configuration Register */
#define LTDC_LxWVPCR_WVSTPOS_SHIFT (0) /* Bits 0-10: Window Vertical Start Position */
#define LTDC_LxWVPCR_WVSTPOS_MASK (0x7FF << LTDC_LxWVPCR_WVSTPOS_SHIFT)
# define LTDC_LxWVPCR_WVSTPOS(n) ((uint32_t)(n) << LTDC_LxWVPCR_WVSTPOS_SHIFT)
#define LTDC_LxWVPCR_WVSPPOS_SHIFT (16) /* Bits 16-26: Window Vertical Stop Position */
#define LTDC_LxWVPCR_WVSPPOS_MASK (0x7FF << LTDC_LxWVPCR_WVSPPOS_SHIFT)
# define LTDC_LxWVPCR_WVSPPOS(n) ((uint32_t)(n) << LTDC_LxWVPCR_WVSPPOS_SHIFT)
/* LTDC Layer x Color Keying Configuration Register */
#define LTDC_LxCKCR_CKBLUE_SHIFT (0) /* Bits 0-7: Color Key Blue Value */
#define LTDC_LxCKCR_CKBLUE_MASK (0xFF << LTDC_LxCKCR_CKBLUE_SHIFT)
# define LTDC_LxCKCR_CKBLUE(n) ((uint32_t)(n) << LTDC_LxCKCR_CKBLUE_SHIFT)
#define LTDC_LxCKCR_CKGREEN_SHIFT (8) /* Bits 8-15: Color Key Green Value */
#define LTDC_LxCKCR_CKGREEN_MASK (0xFF << LTDC_LxCKCR_CKGREEN_SHIFT)
# define LTDC_LxCKCR_CKGREEN(n) ((uint32_t)(n) << LTDC_LxCKCR_CKGREEN_SHIFT)
#define LTDC_LxCKCR_CKRED_SHIFT (16) /* Bits 16-23: Color Key Red Value */
#define LTDC_LxCKCR_CKRED_MASK (0xFF << LTDC_LxCKCR_CKRED_SHIFT)
# define LTDC_LxCKCR_CKRED(n) ((uint32_t)(n) << LTDC_LxCKCR_CKRED_SHIFT)
/* LTDC Layer x Pixel Format Configuration Register */
#define LTDC_LxPFCR_PF_SHIFT (0) /* Bits 0-2: Pixel Format */
#define LTDC_LxPFCR_PF_MASK (0x7 << LTDC_LxPFCR_PF_SHIFT)
# define LTDC_LxPFCR_PF(n) ((uint32_t)(n) << LTDC_LxPFCR_PF_SHIFT)
#define LTDC_PF_ARGB8888 0
#define LTDC_PF_RGB888 1
#define LTDC_PF_RGB565 2
#define LTDC_PF_ARGB1555 3
#define LTDC_PF_ARGB4444 4
#define LTDC_PF_L8 5 /* 8-bit Luninance (CLUT lookup) */
#define LTDC_PF_AL44 6 /* 4-bit Alpha, 4-bit Luminance */
#define LTDC_PF_AL88 7 /* 8-bit Alpha, 8-bit Luminance */
/* LTDC Layer x Constant Alpha Configuration Register */
#define LTDC_LxCACR_CONSTA_SHIFT (0) /* Bits 0-7: Constant Alpha */
#define LTDC_LxCACR_CONSTA_MASK (0x7 << LTDC_LxCACR_CONSTA_SHIFT)
# define LTDC_LxCACR_CONSTA(n) ((uint32_t)(n) << LTDC_LxCACR_CONSTA_SHIFT)
/* LTDC Layer x Default Color Configuration Register */
#define LTDC_LxDCCR_DCBLUE_SHIFT (0) /* Bits 0-7: Default Color Blue Value */
#define LTDC_LxDCCR_DCBLUE_MASK (0xFF << LTDC_LxDCCR_DCBLUE_SHIFT)
# define LTDC_LxDCCR_DCBLUE(n) ((uint32_t)(n) << LTDC_LxDCCR_DCBLUE_SHIFT)
#define LTDC_LxDCCR_DCGREEN_SHIFT (8) /* Bits 8-15: Default Color Green Value */
#define LTDC_LxDCCR_DCGREEN_MASK (0xFF << LTDC_LxDCCR_DCGREEN_SHIFT)
# define LTDC_LxDCCR_DCGREEN(n) ((uint32_t)(n) << LTDC_LxDCCR_DCGREEN_SHIFT)
#define LTDC_LxDCCR_DCRED_SHIFT (16) /* Bits 16-23: Default Color Red Value */
#define LTDC_LxDCCR_DCRED_MASK (0xFF << LTDC_LxDCCR_DCRED_SHIFT)
# define LTDC_LxDCCR_DCRED(n) ((uint32_t)(n) << LTDC_LxDCCR_DCRED_SHIFT)
#define LTDC_LxDCCR_DCALPHA_SHIFT (24) /* Bits 24-31: Default Color Alpha Value */
#define LTDC_LxDCCR_DCALPHA_MASK (0xFF << LTDC_LxDCCR_DCALPHA_SHIFT)
# define LTDC_LxDCCR_DCALPHA(n) ((uint32_t)(n) << LTDC_LxDCCR_DCALPHA_SHIFT)
/* LTDC Layer x Blending Factors Configuration Register */
#define LTDC_LxBFCR_BF2_SHIFT (0) /* Bits 0-2: Blending Factor 2 */
#define LTDC_LxBFCR_BF2_MASK (0x7 << LTDC_LxBFCR_BF2_SHIFT)
# define LTDC_LxBFCR_BF2(n) ((uint32_t)(n) << LTDC_LxBFCR_BF2_SHIFT)
#define LTDC_LxBFCR_BF1_SHIFT (8) /* Bits 8-10: Blending Factor 1 */
#define LTDC_LxBFCR_BF1_MASK (0x7 << LTDC_LxBFCR_BF1_SHIFT)
# define LTDC_LxBFCR_BF1(n) ((uint32_t)(n) << LTDC_LxBFCR_BF1_SHIFT)
#define LTDC_BF1_CONST_ALPHA 0x04 /* Constant Alpha */
#define LTDC_BF1_PIXEL_ALPHA 0x06 /* Pixel Alpha x Constant Alpha */
#define LTDC_BF2_CONST_ALPHA 0x05 /* Constant Alpha */
#define LTDC_BF2_PIXEL_ALPHA 0x07 /* Pixel Alpha x Constant Alpha */
/* LTDC Layer x Color Frame Buffer Length Configuration Register */
#define LTDC_LxCFBLR_CFBLL_SHIFT (0) /* Bits 0-12: Color Frame Buffer Line Length */
#define LTDC_LxCFBLR_CFBLL_MASK (0x1FFF << LTDC_LxCFBLR_CFBLL_SHIFT)
# define LTDC_LxCFBLR_CFBLL(n) ((uint32_t)(n) << LTDC_LxCFBLR_CFBLL_SHIFT)
#define LTDC_LxCFBLR_CFBP_SHIFT (16) /* Bits 16-28: Color Frame Buffer Pitch */
#define LTDC_LxCFBLR_CFBP_MASK (0x1FFF << LTDC_LxCFBLR_CFBP_SHIFT)
# define LTDC_LxCFBLR_CFBP(n) ((uint32_t)(n) << LTDC_LxCFBLR_CFBP_SHIFT)
/* LTDC Layer x Color Frame Buffer Line Number Register */
#define LTDC_LxCFBLNR_LN_SHIFT (0) /* Bits 0-10: Color Frame Buffer Line Number */
#define LTDC_LxCFBLNR_LN_MASK (0x7FF << LTDC_LxCFBLNR_LN_SHIFT)
# define LTDC_LxCFBLNR_LN(n) ((uint32_t)(n) << LTDC_LxCFBLNR_LN_SHIFT)
/* LTDC Layer x CLUT Write Register */
#define LTDC_LxCLUTWR_BLUE_SHIFT (0) /* Bits 0-7: Default Color Blue Value */
#define LTDC_LxCLUTWR_BLUE_MASK (0xFF << LTDC_LxCLUTWR_BLUE_SHIFT)
# define LTDC_LxCLUTWR_BLUE(n) ((uint32_t)(n) << LTDC_LxCLUTWR_BLUE_SHIFT)
#define LTDC_LxCLUTWR_GREEN_SHIFT (8) /* Bits 8-15: Default Color Green Value */
#define LTDC_LxCLUTWR_GREEN_MASK (0xFF << LTDC_LxCLUTWR_GREEN_SHIFT)
# define LTDC_LxCLUTWR_GREEN(n) ((uint32_t)(n) << LTDC_LxCLUTWR_GREEN_SHIFT)
#define LTDC_LxCLUTWR_RED_SHIFT (16) /* Bits 16-23: Default Color Red Value */
#define LTDC_LxCLUTWR_RED_MASK (0xFF << LTDC_LxCLUTWR_RED_SHIFT)
# define LTDC_LxCLUTWR_RED(n) ((uint32_t)(n) << LTDC_LxCLUTWR_RED_SHIFT)
#define LTDC_LxCLUTWR_CLUTADD_SHIFT (24) /* Bits 24-31: CLUT Address */
#define LTDC_LxCLUTWR_CLUTADD_MASK (0xFF << LTDC_LxCLUTWR_CLUTADD_SHIFT)
# define LTDC_LxCLUTWR_CLUTADD(n) ((uint32_t)(n) << LTDC_LxCLUTWR_CLUTADD_SHIFT)
/************************************************************************************
* Public Types
************************************************************************************/
#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_LTDC_H */

2
arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h Normal file → Executable file

@ -160,7 +160,7 @@
#define STM32_SPI6_BASE 0x40015400 /* 0x40015400-0x400157ff: SPI6 */
#define STM32_SAI1_BASE 0x40015800 /* 0x40015800-0x40015bff: SAI1 */
#define STM32_SAI2_BASE 0x40015c00 /* 0x40015c00-0x40015fff: SAI2 */
#define STM32_LCDTFT_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */
#define STM32_LTDC_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */
/* AHB1 Base Addresses **************************************************************/

2
arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h Normal file → Executable file

@ -162,7 +162,7 @@
#define STM32_SPI6_BASE 0x40015400 /* 0x40015400-0x400157ff: SPI6 */
#define STM32_SAI1_BASE 0x40015800 /* 0x40015800-0x40015bff: SAI1 */
#define STM32_SAI2_BASE 0x40015c00 /* 0x40015c00-0x40015fff: SAI2 */
#define STM32_LCDTFT_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */
#define STM32_LTDC_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */
#define STM32_DSIHOST_BASE 0x40016c00 /* 0x40016c00-0x400173ff: DSI Host */
#define STM32_DFSDM1_BASE 0x40017400 /* 0x40017400-0x400174ff: DFSDM1 */
#define STM32_MDIOS_BASE 0x40017800 /* 0x40017800-0x40017bff: MDIOS */

1
arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h

@ -631,6 +631,7 @@
#define GPIO_I2C4_SDA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTF|GPIO_PIN15)
#define GPIO_I2C4_SDA_3 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN12)
#define GPIO_I2C4_SDA_4 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C4_SDA_5 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN7)
#define GPIO_I2C4_SMBA_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN11)
#define GPIO_I2C4_SMBA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN13)
#define GPIO_I2C4_SMBA_3 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10)

6
arch/arm/src/stm32f7/chip/stm32f76xx77xx_rcc.h

@ -729,9 +729,9 @@
# define RCC_DCKCFGR2_SDMMC2SEL_48MHZ (0 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT) /* 48 MHz clock is selected as SDMMC 2 clock */
# define RCC_DCKCFGR2_SDMMC2SEL_SYSCLK (1 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT) /* System clock is selected as SDMMC 2 clock */
#define RCC_DCKCFGR2_DSISEL_SHIFT (30) /* Bit 30: DSI clock source selection */
#define RCC_DCKCFGR2_DSISELL_MASK (1 << RCC_DCKCFGR2_DSISEL_SHIFT)
# define RCC_DCKCFGR2_DSISEL_48MHZ (0 << RCC_DCKCFGR2_DSISEL_SHIFT) /* 48 MHz clock is selected as DSI clock */
# define RCC_DCKCFGR2_DSISEL_SYSCLK (1 << RCC_DCKCFGR2_DSISEL_SHIFT) /* System clock is selected as DSI clock */
#define RCC_DCKCFGR2_DSISEL_MASK (1 << RCC_DCKCFGR2_DSISEL_SHIFT)
# define RCC_DCKCFGR2_DSISEL_PHY (0 << RCC_DCKCFGR2_DSISEL_SHIFT) /* DSI PHY sources DSI clock */
# define RCC_DCKCFGR2_DSISEL_SYSCLK (1 << RCC_DCKCFGR2_DSISEL_SHIFT) /* System clock is selected as DSI clock */
#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */
#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_RCC_H */

2302
arch/arm/src/stm32f7/stm32_dma2d.c Normal file

File diff suppressed because it is too large Load Diff

81
arch/arm/src/stm32f7/stm32_dma2d.h Normal file

@ -0,0 +1,81 @@
/****************************************************************************
* arch/arm/src/stm32/stm32_dma2d.h
*
* Copyright (C) 2014-2015 Marco Krahl. All rights reserved.
* Author: Marco Krahl <ocram.lhark@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F7_STM32_DMA2D_H
#define __ARCH_ARM_SRC_STM32F7_STM32_DMA2D_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/video/fb.h>
#include <arch/chip/ltdc.h>
#ifdef CONFIG_STM32F7_DMA2D
/****************************************************************************
* Public Functions
****************************************************************************/
# ifdef CONFIG_STM32F7_LTDC_INTERFACE
/****************************************************************************
* Name: stm32_dma2dinitltdc
*
* Description:
* Get a reference to the dma2d layer coupled with the ltdc layer.
* It not intends to use this function by user space applications.
* It resolves the following requirements:
* 1. Share the color lookup table
* 2. Share the planeinfo information
* 3. Share the videoinfo information
*
* Parameter:
* layer - a valid reference to the low level ltdc layer structure
*
* Return:
* On success - A valid dma2d layer reference
* On error - NULL and errno is set to
* -EINVAL if one of the parameter is invalid
*
****************************************************************************/
struct stm32_ltdc_s; // fwd decl
FAR struct dma2d_layer_s *stm32_dma2dinitltdc(FAR struct stm32_ltdc_s *layer);
# endif /* CONFIG_STM32F7_LTDC_INTERFACE */
#endif /* CONFIG_STM32F7_DMA2D */
#endif /* __ARCH_ARM_SRC_STM32F7_STM32_DMA2D_H */

3627
arch/arm/src/stm32f7/stm32_ltdc.c Normal file

File diff suppressed because it is too large Load Diff

157
arch/arm/src/stm32f7/stm32_ltdc.h Executable file

@ -0,0 +1,157 @@
/************************************************************************************
* arch/arm/src/stm32/stm32_ltdc.h
*
* Copyright (C) 2013-2014 Ken Pettit. All rights reserved.
* Authors: Ken Pettit <pettitd@gmail.com>
* Marco Krahl <ocram.lhark@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_STM32F7_STM32_LTDC_H
#define __ARCH_ARM_SRC_STM32F7_STM32_LTDC_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <semaphore.h>
#include <nuttx/video/fb.h>
#include <nuttx/nx/nxglib.h>
#include <arch/chip/ltdc.h>
#ifdef CONFIG_STM32F7_LTDC
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Public Types
************************************************************************************/
/* Common layer state structure for the LTDC and DMA2D controller */
struct stm32_ltdc_s
{
/* Fixed settings */
int lid; /* Layer identifier */
struct fb_videoinfo_s vinfo; /* Layer videoinfo */
struct fb_planeinfo_s pinfo; /* Layer planeinfo */
/* Positioning */
struct ltdc_area_s area; /* Active layer area */
fb_coord_t xpos; /* Reference x position */
fb_coord_t ypos; /* Reference y position */
/* Coloring */
uint32_t color; /* Layer color definition */
#ifdef CONFIG_FB_CMAP
uint32_t *clut; /* 32-bit aligned clut color table */
#endif
/* Blending */
uint8_t alpha; /* Layer constant alpha value */
uint32_t colorkey; /* Layer colorkey */
uint32_t blendmode; /* Layer blend factor */
/* Operation */
sem_t *lock; /* Ensure mutually exclusive access */
};
/************************************************************************************
* Public Data
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/* The STM32 LTDC driver uses the common framebuffer interfaces declared in
* include/nuttx/video/fb.h.
*/
int stm32_ltdcinitialize(void);
FAR struct fb_vtable_s *stm32_ltdcgetvplane(int vplane);
void stm32_ltdcuninitialize(void);
/************************************************************************************
* Name: stm32_ltdcgetlayer
*
* Description:
* Get the ltdc layer structure to perform hardware layer operation
*
* Parameter:
* lid - Layer identifier
*
* Return:
* Reference to the layer control structure on success or Null if parameter
* invalid.
*
************************************************************************************/
FAR struct ltdc_layer_s *stm32_ltdcgetlayer(int lid);
/************************************************************************************
* Name: stm32_lcdclear
*
* Description:
* This is a non-standard LCD interface just for the STM32 LTDC. Clearing the
* display in the normal way by writing a sequences of runs that covers the
* entire display can be slow. Here the display is cleared by simply setting
* all video memory to the specified color.
*
************************************************************************************/
void stm32_lcdclear(nxgl_mxpixel_t color);
/************************************************************************************
* Name: stm32_lcd_backlight
*
* Description:
* If CONFIG_STM32F7_LCD_BACKLIGHT is defined, then the board-specific logic must
* provide this interface to turn the backlight on and off.
*
************************************************************************************/
#ifdef CONFIG_STM32F7_LCD_BACKLIGHT
void stm32_backlight(bool blon);
#endif
#endif /* CONFIG_STM32F7_LTDC */
#endif /* __ARCH_ARM_SRC_STM32F7_STM32_LTDC_H */

2
arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c

@ -909,7 +909,7 @@ static void stm32_stdclockconfig(void)
| RCC_DCKCFGR2_CK48MSEL_MASK
| RCC_DCKCFGR2_SDMMCSEL_MASK
| RCC_DCKCFGR2_SDMMC2SEL_MASK
| RCC_DCKCFGR2_DSISELL_MASK);
| RCC_DCKCFGR2_DSISEL_MASK);
regval |= ( STM32_RCC_DCKCFGR2_USART1SRC
| STM32_RCC_DCKCFGR2_USART2SRC

15
configs/Kconfig Normal file → Executable file

@ -1160,6 +1160,17 @@ config ARCH_BOARD_STM32F746G_DISCO
MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash
memory and 320Kb SRAM.
config ARCH_BOARD_STM32F769I_DISCO
bool "STMicro STM32F769I-Discovery board"
depends on ARCH_CHIP_STM32F769NI
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro STM32F769I-DISCO development board featuring the STM32F769NIH6
MCU. The STM32F769NIH6 is a 216MHz Cortex-M7 with 1024Kb Flash
memory and 320Kb SRAM.
config ARCH_BOARD_STM32F746_WS
bool "Waveshare STM32F746 board"
depends on ARCH_CHIP_STM32F746IG
@ -1621,6 +1632,7 @@ config ARCH_BOARD
default "stm32f411e-disco" if ARCH_BOARD_STM32F411E_DISCO
default "stm32f429i-disco" if ARCH_BOARD_STM32F429I_DISCO
default "stm32f746g-disco" if ARCH_BOARD_STM32F746G_DISCO
default "stm32f769i-disco" if ARCH_BOARD_STM32F769I_DISCO
default "stm32f746-ws" if ARCH_BOARD_STM32F746_WS
default "b-l475e-iot01a" if ARCH_BOARD_B_L475E_IOT01A
default "stm32l476vg-disco" if ARCH_BOARD_STM32L476VG_DISCO
@ -2014,6 +2026,9 @@ endif
if ARCH_BOARD_STM32F746G_DISCO
source "configs/stm32f746g-disco/Kconfig"
endif
if ARCH_BOARD_STM32F769I_DISCO
source "configs/stm32f769i-disco/Kconfig"
endif
if ARCH_BOARD_B_L475E_IOT01A
source "configs/b-l475e-iot01a/Kconfig"
endif

5
configs/README.txt

@ -685,6 +685,11 @@ configs/stm32l476-mdk
The STM32L476ME is a Cortex-M4 optimised for low-power operation
at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
configs/stm32f769i-disco
NuttX configurations for the STMicro STM32F769I-DISCO development board
featuring the STM32F769NIH6 MCU. The STM32F769NIH6 is a 216MHz Cortex-M7
operating with 2048K Flash memory and 512Kb SRAM.
configs/stm32l476vg-disco
STMicro STM32L476VG_DISCO development board featuring the STM32L476VG
MCU. The STM32L476VG is a Cortex-M4 optimised for low-power operation

1
configs/nucleo-144/include/board.h

@ -170,7 +170,6 @@
#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLL
#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ
#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ
#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_48MHZ
/* Several prescalers allow the configuration of the two AHB buses, the

1
configs/stm32f746-ws/include/board.h

@ -167,7 +167,6 @@
#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLLSAI
#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ
#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ
#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_48MHZ
/* Several prescalers allow the configuration of the two AHB buses, the
* high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum

4
configs/stm32f746g-disco/README.txt

@ -340,11 +340,11 @@ STM32F746G-DISCO-specific Configuration Options
CONFIG_STM32F7_DMA2 DMA2
CONFIG_STM32F7_ETHMAC Ethernet MAC
CONFIG_STM32F7_DMA2D Chrom-ART (DMA2D)
CONFIG_STM32F7_USBOTGHS USB OTG HS
CONFIG_STM32F7_OTGHS USB OTG HS
AHB2
----
CONFIG_STM32F7_USBOTGFS USB OTG FS
CONFIG_STM32F7_OTGFS USB OTG FS
CONFIG_STM32F7_DCMI DCMI
CONFIG_STM32F7_CRYP CRYP
CONFIG_STM32F7_HASH HASH

3
configs/stm32f746g-disco/include/board.h

@ -103,7 +103,7 @@
* 2 <= PLLQ <= 15
*/
#if defined(CONFIG_STM32F7_USBOTHFS)
#if defined(CONFIG_STM32F7_OTGFS)
/* Highest SYSCLK with USB OTG FS clock = 48 MHz
*
* PLL_VCO = (25,000,000 / 25) * 384 = 384 MHz
@ -199,7 +199,6 @@
#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLLSAI
#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ
#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ
#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_48MHZ
/* Several prescalers allow the configuration of the two AHB buses, the
* high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum

8
configs/stm32f769i-disco/Kconfig Normal file

@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_STM32F769I_DISCO
endif # ARCH_BOARD_STM32F769I_DISCO

127
configs/stm32f769i-disco/README.txt Normal file

@ -0,0 +1,127 @@
README
======
This README discusses issues unique to NuttX configurations for the
STMicro STM32F769I-DISCO development board featuring the STM32F769NIH6
MCU. The STM32F769NIH6 is a 216MHz Cortex-M7 operating with 2048K Flash
memory and 512Kb SRAM. The board features:
- On-board ST-LINK/V2 for programming and debugging,
- Mbed-enabled (mbed.org)
- 4-inch 800x472 color LCD-TFT with capacitive touch screen
- SAI audio codec
- Audio line in and line out jack
- Two ST MEMS microphones
- SPDIF RCA input connector
- Two pushbuttons (user and reset)
- 512-Mbit Quad-SPI Flash memory
- 128-Mbit SDRAM
- Connector for microSD card
- RF-EEPROM daughterboard connector
- USB OTG HS with Micro-AB connectors
- Ethernet connector compliant with IEEE-802.3-2002 and PoE
Refer to the http://www.st.com website for further information about this
board (search keyword: stm32f769i-disco)
Contents
========
- STATUS
- Development Environment
- LEDs and Buttons
- Serial Console
- Configurations
STATUS
======
2017-07: The basic NSH configuration is functional using a serial
console on USART1, which is connected to the "virtual com port"
of the ST/LINK USB adapter.
2017-07: STM32 F7 Ethernet appears to be functional, but has had
only light testing.
Work in progress: Use LCD over DSI interface, rest of board.
Development Environment
=======================
The Development environments for the STM32F769I-DISCO board are identical
to the environments for other STM32F boards. For full details on the
environment options and setup, see the README.txt file in the
config/stm32f769i-disco directory.
LEDs and Buttons
================
LEDs
----
The STM32F769I-DISCO board has numerous LEDs but only one, LD3 located
near the reset button, that can be controlled by software.
LD3 is controlled by PI1 which is also the SPI2_SCK at the Arduino
interface. One end of LD3 is grounded so a high output on PI1 will
illuminate the LED.
This LED is not used by the board port unless CONFIG_ARCH_LEDS is defined.
In that case, the usage by the board port is defined in include/board.h
and src/stm32_leds.c. The LEDs are used to encode OS-related events as
follows:
SYMBOL Meaning LD3
------------------- ----------------------- ------
LED_STARTED NuttX has been started OFF
LED_HEAPALLOCATE Heap has been allocated OFF
LED_IRQSENABLED Interrupts enabled OFF
LED_STACKCREATED Idle stack created ON
LED_INIRQ In an interrupt N/C
LED_SIGNAL In a signal handler N/C
LED_ASSERTION An assertion failed N/C
LED_PANIC The system has crashed FLASH
Thus is LD3 is statically on, NuttX has successfully booted and is,
apparently, running normally. If LD3 is flashing at approximately
2Hz, then a fatal error has been detected and the system has halted.
Buttons
-------
Pushbutton B1, labelled "User", is connected to GPIO PI11. A high
value will be sensed when the button is depressed.
Serial Console
==============
Use the serial interface the ST/LINK provides to the USB host.
Configurations
==============
Common Configuration Information
--------------------------------
Each STM32F769I-DISCO configuration is maintained in a sub-directory and
can be selected as follow:
cd tools
./configure.sh stm32f769i-disco/<subdir>
cd -
Where <subdir> is one of the sub-directories listed below.
Configuration Directories
-------------------------
nsh:
---
Configures the NuttShell (NSH) located at apps/examples/nsh. The
Configuration enables the serial interfaces on UART1.
Otherwise nothing is enabled, so that config is a starting point
for initial testing.
Support for builtin applications is enabled, but in the base
configuration no builtin applications are selected.
nsh-ehternet:
---
Same as above but a lot more hardware peripherals enabled,
in particular ethernet, as well as networking stuff.

519
configs/stm32f769i-disco/include/board.h Normal file

@ -0,0 +1,519 @@
/************************************************************************************
* configs/stm32f769i-disco/include/board.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIG_STM32F769I_DISCO_INCLUDE_BOARD_H
#define __CONFIG_STM32F769I_DISCO_INCLUDE_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include "stm32_rcc.h"
#if defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_SDMMC2)
# include "stm32_sdmmc.h"
#endif
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* The STM32F7 Discovery board provides the following clock sources:
*
* X2: 25 MHz oscillator for STM32F769NIH6 microcontroller and Ethernet PHY.
* X1: 32.768 KHz crystal for STM32F769NIH6 embedded RTC
*
* So we have these clock source available within the STM32
*
* HSI: 16 MHz RC factory-trimmed
* LSI: 32 KHz RC
* HSE: On-board crystal frequency is 25MHz
* LSE: 32.768 kHz
*/
#define STM32_BOARD_XTAL 25000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* Main PLL Configuration.
*
* PLL source is HSE = 25,000,000
*
* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
* Subject to:
*
* 2 <= PLLM <= 63
* 192 <= PLLN <= 432
* 192 MHz <= PLL_VCO <= 432MHz
*
* SYSCLK = PLL_VCO / PLLP
* Subject to
*
* PLLP = {2, 4, 6, 8}
* SYSCLK <= 216 MHz
*
* USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ
* Subject to
* The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC
* and the random number generator need a frequency lower than or equal
* to 48 MHz to work correctly.
*
* 2 <= PLLQ <= 15
*/
#if defined(CONFIG_STM32F7_OTGFS)
/* USB OTG FS clock (= SDMMCCLK = RNGCLK) must be 48 MHz
*
* PLL_VCO = (25,000,000 / 25) * 384 = 384 MHz
* SYSCLK = 384 MHz / 2 = 192 MHz
* USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz
* DSI CLK = PLL_VCO / PLLR = 384 / 7 = 54,86 MHz
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(384)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(8)
#define STM32_PLLCFG_PLLR RCC_PLLCFG_PLLR(7)
#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 384)
#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2)
#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 8)
#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_SDMMC2) || defined(CONFIG_STM32F7_RNG)
/* SDMMCCLK (= USB OTG FS clock = RNGCLK) should be <= 48MHz
*
* PLL_VCO = (25,000,000 / 25) * 432 = 432 MHz
* SYSCLK = 432 MHz / 2 = 216 MHz
* USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz
* DSI CLK = PLL_VCO / PLLR = 432 / 8 = 54 MHz
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10)
#define STM32_PLLCFG_PLLR RCC_PLLCFG_PLLR(8)
#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 432)
#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2)
#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10)
#else
/* No restrictions by OTGFS
*
* PLL_VCO = (25,000,000 / 25) * 432 = 432 MHz
* SYSCLK = 432 MHz / 2 = 216 MHz
* USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz
* DSI CLK = PLL_VCO / PLLR = 432 / 8 = 54 MHz
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10)
#define STM32_PLLCFG_PLLR RCC_PLLCFG_PLLR(8)
#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 25) * 432)
#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2)
#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10)
#endif
/* Configure factors for PLLSAI clock */
#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(192)
#define STM32_RCC_PLLSAICFGR_PLLSAIP RCC_PLLSAICFGR_PLLSAIP(2)
#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(2)
#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(2)
/* Configure Dedicated Clock Configuration Register */
#define STM32_RCC_DCKCFGR1_PLLI2SDIVQ RCC_DCKCFGR1_PLLI2SDIVQ(1)
#define STM32_RCC_DCKCFGR1_PLLSAIDIVQ RCC_DCKCFGR1_PLLSAIDIVQ(1)
#define STM32_RCC_DCKCFGR1_PLLSAIDIVR RCC_DCKCFGR1_PLLSAIDIVR(0)
#define STM32_RCC_DCKCFGR1_SAI1SRC RCC_DCKCFGR1_SAI1SEL(0)
#define STM32_RCC_DCKCFGR1_SAI2SRC RCC_DCKCFGR1_SAI2SEL(0)
#define STM32_RCC_DCKCFGR1_TIMPRESRC 0
#define STM32_RCC_DCKCFGR1_DFSDM1SRC 0
#define STM32_RCC_DCKCFGR1_ADFSDM1SRC 0
/* Configure factors for PLLI2S clock */
#define STM32_RCC_PLLI2SCFGR_PLLI2SN RCC_PLLI2SCFGR_PLLI2SN(192)
#define STM32_RCC_PLLI2SCFGR_PLLI2SP RCC_PLLI2SCFGR_PLLI2SP(2)
#define STM32_RCC_PLLI2SCFGR_PLLI2SQ RCC_PLLI2SCFGR_PLLI2SQ(2)
#define STM32_RCC_PLLI2SCFGR_PLLI2SR RCC_PLLI2SCFGR_PLLI2SR(2)
/* Configure Dedicated Clock Configuration Register 2 */
#define STM32_RCC_DCKCFGR2_USART1SRC RCC_DCKCFGR2_USART1SEL_APB
#define STM32_RCC_DCKCFGR2_USART2SRC RCC_DCKCFGR2_USART2SEL_APB
#define STM32_RCC_DCKCFGR2_UART4SRC RCC_DCKCFGR2_UART4SEL_APB
#define STM32_RCC_DCKCFGR2_UART5SRC RCC_DCKCFGR2_UART5SEL_APB
#define STM32_RCC_DCKCFGR2_USART6SRC RCC_DCKCFGR2_USART6SEL_APB
#define STM32_RCC_DCKCFGR2_UART7SRC RCC_DCKCFGR2_UART7SEL_APB
#define STM32_RCC_DCKCFGR2_UART8SRC RCC_DCKCFGR2_UART8SEL_APB
#define STM32_RCC_DCKCFGR2_I2C1SRC RCC_DCKCFGR2_I2C1SEL_HSI
#define STM32_RCC_DCKCFGR2_I2C2SRC RCC_DCKCFGR2_I2C2SEL_HSI
#define STM32_RCC_DCKCFGR2_I2C3SRC RCC_DCKCFGR2_I2C3SEL_HSI
#define STM32_RCC_DCKCFGR2_I2C4SRC RCC_DCKCFGR2_I2C4SEL_HSI
#define STM32_RCC_DCKCFGR2_LPTIM1SRC RCC_DCKCFGR2_LPTIM1SEL_APB
#define STM32_RCC_DCKCFGR2_CECSRC RCC_DCKCFGR2_CECSEL_HSI
#define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLLSAI
#define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ
#define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ
#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_PHY
/* Several prescalers allow the configuration of the two AHB buses, the
* high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum
* frequency of the two AHB buses is 216 MHz while the maximum frequency of
* the high-speed APB domains is 108 MHz. The maximum allowed frequency of
* the low-speed APB domain is 54 MHz.
*/
/* AHB clock (HCLK) is SYSCLK (216 MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* Timers driven from APB1 will be twice PCLK1 */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB2 will be twice PCLK2 */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* FLASH wait states
*
* --------- ---------- -----------
* VDD MAX SYSCLK WAIT STATES
* --------- ---------- -----------
* 1.7-2.1 V 180 MHz 8
* 2.1-2.4 V 216 MHz 9
* 2.4-2.7 V 216 MHz 8
* 2.7-3.6 V 216 MHz 7
* --------- ---------- -----------
*/
#define BOARD_FLASH_WAITSTATES 7
/* LED definitions ******************************************************************/
/* The STM32F769I-DISCO board has numerous LEDs but only one, LD1 located near the
* reset button, that can be controlled by software (LD2 is a power indicator, LD3-6
* indicate USB status, LD7 is controlled by the ST-Link).
*
* LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface.
* One end of LD1 is grounded so a high output on PI1 will illuminate the LED.
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
* The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_NLEDS 1
#define BOARD_LD1 BOARD_LED1
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
* include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
* events as follows:
*
* SYMBOL Meaning LD1
* ------------------- ----------------------- ------
* LED_STARTED NuttX has been started OFF
* LED_HEAPALLOCATE Heap has been allocated OFF
* LED_IRQSENABLED Interrupts enabled OFF
* LED_STACKCREATED Idle stack created ON
* LED_INIRQ In an interrupt N/C
* LED_SIGNAL In a signal handler N/C
* LED_ASSERTION An assertion failed N/C
* LED_PANIC The system has crashed FLASH
*
* Thus is LD1 is statically on, NuttX has successfully booted and is,
* apparently, running normally. If LD1 is flashing at approximately
* 2Hz, then a fatal error has been detected and the system has halted.
*/
#define LED_STARTED 0 /* LD1=OFF */
#define LED_HEAPALLOCATE 0 /* LD1=OFF */
#define LED_IRQSENABLED 0 /* LD1=OFF */
#define LED_STACKCREATED 1 /* LD1=ON */
#define LED_INIRQ 2 /* LD1=no change */
#define LED_SIGNAL 2 /* LD1=no change */
#define LED_ASSERTION 2 /* LD1=no change */
#define LED_PANIC 3 /* LD1=flashing */
/* Button definitions ***************************************************************/
/* The STM32F7 Discovery supports one button: Pushbutton B1, labelled "User", is
* connected to GPIO PA0. A high value will be sensed when the button is depressed.
*/
#define BUTTON_USER 0
#define NUM_BUTTONS 1
#define BUTTON_USER_BIT (1 << BUTTON_USER)
/* Alternate function pin selections ************************************************/
/* USART6:
*
* These configurations assume that you are using a standard Arduio RS-232 shield
* with the serial interface with RX on pin D0 and TX on pin D1:
*
* -------- ---------------
* STM32F7
* ARDUINO FUNCTION GPIO
* -- ----- --------- -----
* DO RX USART6_RX PC7
* D1 TX USART6_TX PC6
* -- ----- --------- -----
*/
#define GPIO_USART6_RX GPIO_USART6_RX_1
#define GPIO_USART6_TX GPIO_USART6_TX_1
/* USART1:
* USART1 is connected to the "Virtual Com Port" lines
* of the ST-LINK controller.
*
* -------- ---------------
* STM32F7
* SIGNAME FUNCTION GPIO
* -- ----- --------- -----
* VCP_RX USART1_RX PA10
* VCP_TX USART1_TX PA9
* -- ----- --------- -----
*/
#define GPIO_USART1_RX GPIO_USART1_RX_1
#define GPIO_USART1_TX GPIO_USART1_TX_1
/* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins:
*
* STM32 F7 BOARD LAN8742A
* GPIO SIGNAL PIN NAME
* -------- ------------ -------------
* PG11 RMII_TX_EN TXEN
* PG13 RMII_TXD0 TXD0
* PG14 RMII_TXD1 TXD1
* PC4 RMII_RXD0 RXD0/MODE0
* PC5 RMII_RXD1 RXD1/MODE1
* PD5 RMII_RXER RXER/PHYAD0
* PA7 RMII_CRS_DV CRS_DV/MODE2
* PC1 RMII_MDC MDC
* PA2 RMII_MDIO MDIO
* N/A NRST nRST
* PA1 RMII_REF_CLK nINT/REFCLK0
* N/A OSC_25M XTAL1/CLKIN
*
* The PHY address is 0, since RMII_RXER/PHYAD0 features a pull down.
* After reset, RMII_RXER/PHYAD0 switches to the RXER function,
* receive errors can be detected using GPIO pin PD5
*/
#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2
#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_2
/* I2C Mapping
* I2C #4 is connected to the LCD daughter board
* and the WM8994 audio codec.
*
* I2C4_SCL - PD12
* I2C4_SDA - PB7
*/
#define GPIO_I2C4_SCL GPIO_I2C4_SCL_1
#define GPIO_I2C4_SDA GPIO_I2C4_SDA_5
/* SDMMC */
/* Stream selections are arbitrary for now but might become important in the future
* if we set aside more DMA channels/streams.
*
* SDIO DMA
* DMAMAP_SDMMC1_1 = Channel 4, Stream 3
* DMAMAP_SDMMC1_2 = Channel 4, Stream 6
*
* DMAMAP_SDMMC2_1 = Channel 11, Stream 0
* DMAMAP_SDMMC2_2 = Channel 11, Stream 5
*/
// #define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1
#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1
/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
*
* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
*/
#define STM32_SDMMC_INIT_CLKDIV (118 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define STM32_SDMMC_MMCXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_MMCXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define STM32_SDMMC_SDXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
/* SDMMC2 Pin mapping
*
* D0 - PG9
* D1 - PG10
* D2 - PB3
* D3 - PB4
*/
#define GPIO_SDMMC2_D0 GPIO_SDMMC2_D0_2
#define GPIO_SDMMC2_D1 GPIO_SDMMC2_D1_2
#define GPIO_SDMMC2_D2 GPIO_SDMMC2_D2_1
#define GPIO_SDMMC2_D3 GPIO_SDMMC2_D3_1
/* LCD DISPLAY
* (work in progress as of 2017 07 19)
*/
#define BOARD_LTDC_WIDTH 800
#define BOARD_LTDC_HEIGHT 472
#define BOARD_LTDC_HSYNC 10
#define BOARD_LTDC_HFP 10
#define BOARD_LTDC_HBP 20
#define BOARD_LTDC_VSYNC 2
#define BOARD_LTDC_VFP 4
#define BOARD_LTDC_VBP 2
#define BOARD_LTDC_GCR_PCPOL 0
#define BOARD_LTDC_GCR_DEPOL 0
#define BOARD_LTDC_GCR_VSPOL 0
#define BOARD_LTDC_GCR_HSPOL 0
// #define BOARD_LTDC_OUTPUT_BPP 16
//#define BOARD_LTDC_GCR_DEN
//#define BOARD_LTDC_GCR_DBW
//#define BOARD_LTDC_GCR_DGW
//#define BOARD_LTDC_GCR_DRW
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32_boardinitialize(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIG_STM32F769I_DISCO_INCLUDE_BOARD_H */

2
configs/stm32f769i-disco/kernel/.gitignore vendored Normal file

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/nuttx_user.elf

122
configs/stm32f769i-disco/kernel/Makefile Normal file

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############################################################################
# configs/stm32f769i-disco/kernel/Makefile
#
# Copyright (C) 2015 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
# This is the directory for the board-specific header files
BOARD_INCLUDE = $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)include
# The entry point name (if none is provided in the .config file)
CONFIG_USER_ENTRYPOINT ?= user_start
ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT))
# Get the paths to the libraries and the links script path in format that
# is appropriate for the host OS
ifeq ($(WINTOOL),y)
# Windows-native toolchains
USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
USER_LDSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld}"
USER_LDSCRIPT += -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld}"
USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
else
# Linux/Cygwin-native toolchain
USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
USER_LDSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)memory.ld
USER_LDSCRIPT += -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)user-space.ld
USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
endif
USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
# Source files
CSRCS = stm32_userspace.c
COBJS = $(CSRCS:.c=$(OBJEXT))
OBJS = $(COBJS)
# Targets:
all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map
.PHONY: nuttx_user.elf depend clean distclean
$(COBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
# Create the nuttx_user.elf file containing all of the user-mode code
nuttx_user.elf: $(OBJS)
$(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC)
$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
@echo "LD: nuttx_user.elf"
$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
ifeq ($(CONFIG_INTELHEX_BINARY),y)
@echo "CP: nuttx_user.hex"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
endif
ifeq ($(CONFIG_MOTOROLA_SREC),y)
@echo "CP: nuttx_user.srec"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
endif
ifeq ($(CONFIG_RAW_BINARY),y)
@echo "CP: nuttx_user.bin"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
endif
$(TOPDIR)$(DELIM)User.map: nuttx_user.elf
@echo "MK: User.map"
$(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map
$(Q) $(CROSSDEV)size nuttx_user.elf
.depend:
depend: .depend
clean:
$(call DELFILE, nuttx_user.elf)
$(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*")
$(call DELFILE, "$(TOPDIR)$(DELIM)User.map")
$(call CLEAN)
distclean: clean

133
configs/stm32f769i-disco/kernel/stm32_userspace.c Normal file

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/****************************************************************************
* configs/stm32f769i-disco/kernel/stm32_userspace.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdlib.h>
#include <nuttx/arch.h>
#include <nuttx/mm/mm.h>
#include <nuttx/wqueue.h>
#include <nuttx/userspace.h>
#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_NUTTX_USERSPACE
# error "CONFIG_NUTTX_USERSPACE not defined"
#endif
#if CONFIG_NUTTX_USERSPACE != 0x08020000
# error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld"
#endif
/****************************************************************************
* Public Data
****************************************************************************/
/* These 'addresses' of these values are setup by the linker script. They are
* not actual uint32_t storage locations! They are only used meaningfully in the
* following way:
*
* - The linker script defines, for example, the symbol_sdata.
* - The declaration extern uint32_t _sdata; makes C happy. C will believe
* that the value _sdata is the address of a uint32_t variable _data (it is
* not!).
* - We can recover the linker value then by simply taking the address of
* of _data. like: uint32_t *pdata = &_sdata;
*/
extern uint32_t _stext; /* Start of .text */
extern uint32_t _etext; /* End_1 of .text + .rodata */
extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */
extern uint32_t _sdata; /* Start of .data */
extern uint32_t _edata; /* End+1 of .data */
extern uint32_t _sbss; /* Start of .bss */
extern uint32_t _ebss; /* End+1 of .bss */
/* This is the user space entry point */
int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]);
const struct userspace_s userspace __attribute__ ((section (".userspace"))) =
{
/* General memory map */
.us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT,
.us_textstart = (uintptr_t)&_stext,
.us_textend = (uintptr_t)&_etext,
.us_datasource = (uintptr_t)&_eronly,
.us_datastart = (uintptr_t)&_sdata,
.us_dataend = (uintptr_t)&_edata,
.us_bssstart = (uintptr_t)&_sbss,
.us_bssend = (uintptr_t)&_ebss,
/* Memory manager heap structure */
.us_heap = &g_mmheap,
/* Task/thread startup routines */
.task_startup = task_startup,
#ifndef CONFIG_DISABLE_PTHREAD
.pthread_startup = pthread_startup,
#endif
/* Signal handler trampoline */
#ifndef CONFIG_DISABLE_SIGNALS
.signal_handler = up_signal_handler,
#endif
/* User-space work queue support (declared in include/nuttx/wqueue.h) */
#ifdef CONFIG_LIB_USRWORK
.work_usrstart = work_usrstart,
#endif
};
/****************************************************************************
* Public Functions
****************************************************************************/
#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */

91
configs/stm32f769i-disco/nsh-ethernet/defconfig Normal file

@ -0,0 +1,91 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f769i-disco"
CONFIG_ARCH_BOARD_STM32F769I_DISCO=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP_STM32F769NI=y
CONFIG_ARCH_CHIP_STM32F7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_LAZYFPU=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_DISABLE_POLL=y
CONFIG_ETH0_PHY_LAN8742A=y
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
CONFIG_EXAMPLES_NSH=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HAVE_CXX=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MMCSD=y
CONFIG_MM_REGIONS=3
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NET_ETH_MTU=1500
CONFIG_NET_HOSTNAME="stntest"
CONFIG_NET_ICMP_PING=y
CONFIG_NET_ICMP=y
CONFIG_NET_RXAVAIL=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_SOLINGER=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NET_UDP=y
CONFIG_NET=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_MOTD=y
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=4
CONFIG_RAM_SIZE=376832
CONFIG_RAM_START=0x20020000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
# CONFIG_SPI_CALLBACK is not set
CONFIG_SPI=y
CONFIG_START_DAY=14
CONFIG_STM32F7_BKPSRAM=y
CONFIG_STM32F7_CEC=y
CONFIG_STM32F7_DMA1=y
CONFIG_STM32F7_DMA2=y
CONFIG_STM32F7_ETHMAC=y
CONFIG_STM32F7_I2C4=y
CONFIG_STM32F7_OTGHS=y
CONFIG_STM32F7_PHYADDR=0
CONFIG_STM32F7_PHYSR_100FD=0x18
CONFIG_STM32F7_PHYSR_100HD=0x8
CONFIG_STM32F7_PHYSR_10FD=0x14
CONFIG_STM32F7_PHYSR_10HD=0x4
CONFIG_STM32F7_PHYSR=31
CONFIG_STM32F7_PHYSR_ALTCONFIG=y
CONFIG_STM32F7_PHYSR_ALTMODE=0x1C
CONFIG_STM32F7_QUADSPI=y
CONFIG_STM32F7_RNG=y
CONFIG_STM32F7_SDMMC2=y
CONFIG_STM32F7_SDMMC_DMA=y
CONFIG_STM32F7_USART1=y
CONFIG_STM32F7_USART6=y
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WDOG_INTRESERVE=0

47
configs/stm32f769i-disco/nsh/defconfig Normal file

@ -0,0 +1,47 @@
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32f769i-disco"
CONFIG_ARCH_BOARD_STM32F769I_DISCO=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP_STM32F769NI=y
CONFIG_ARCH_CHIP_STM32F7=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DTCM=y
CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_LAZYFPU=y
CONFIG_BOARD_LOOPSPERMSEC=43103
CONFIG_BUILTIN=y
CONFIG_DISABLE_POLL=y
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
CONFIG_EXAMPLES_NSH=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HAVE_CXX=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=3
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_BUILTIN_APPS=y
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=4
CONFIG_RAM_SIZE=245760
CONFIG_RAM_START=0x20010000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SPI=y
CONFIG_START_DAY=14
CONFIG_STM32F7_USART1=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WDOG_INTRESERVE=0

113
configs/stm32f769i-disco/scripts/Make.defs Normal file

@ -0,0 +1,113 @@
############################################################################
# configs/stm32f769i-disco/scripts/Make.defs
#
# Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = flash.ld
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(ARCROSSDEV)ar rcs
NM = $(ARCROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

147
configs/stm32f769i-disco/scripts/flash.ld Normal file

@ -0,0 +1,147 @@
/****************************************************************************
* configs/stm32f769i-disco/scripts/flash.ld
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Modified 11/4/2013 for STM32F429 support
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F769NIH6 has 2048Kb of main FLASH memory. This FLASH memory can
* be accessed from either the AXIM interface at address 0x0800:0000 or from
* the ITCM interface at address 0x0020:0000.
*
* Additional information, including the option bytes, is available at at
* FLASH at address 0x1ff0:0000.
*
* In the STM32F769NIH6, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash on ITCM at 0x0020:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000
*
* NuttX does not modify these option bytes. On the unmodified STM32F769I
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH.
*
* The STM32F769NIH6 also has 512Kb of data SRAM (in addition to ITCM SRAM).
* SRAM is split up into three blocks:
*
* 1) 128Kb of DTCM SRM beginning at address 0x2000:0000
* 2) 368Kb of SRAM1 beginning at address 0x2002:0000
* 3) 16Kb of SRAM2 beginning at address 0x2007:c000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*/
MEMORY
{
itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K
flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
sram1 (rwx) : ORIGIN = 0x20020000, LENGTH = 368K
sram2 (rwx) : ORIGIN = 0x2007c000, LENGTH = 16K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram1 AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram1
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

109
configs/stm32f769i-disco/scripts/kernel-space.ld Normal file

@ -0,0 +1,109 @@
/****************************************************************************
* configs/stm32f769i-disco/scripts/kernel-space.ld
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > kflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > kflash
.ARM.extab : {
*(.ARM.extab*)
} > kflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > kflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > ksram AT > kflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > ksram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

129
configs/stm32f769i-disco/scripts/memory.ld Normal file

@ -0,0 +1,129 @@
/****************************************************************************
* configs/stm32f769i-disco/scripts/memory.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32F769NIH6 has 2048Kb of main FLASH memory. This FLASH memory can
* be accessed from either the AXIM interface at address 0x0800:0000 or from
* the ITCM interface at address 0x0020:0000.
*
* Additional information, including the option bytes, is available at at
* FLASH at address 0x1ff0:0000.
*
* In the STM32F769NIH6, two different boot spaces can be selected through
* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
* BOOT_ADD1 option bytes:
*
* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
* ST programmed value: Flash on ITCM at 0x0020:0000
* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
* ST programmed value: System bootloader at 0x0010:0000
*
* NuttX does not modify these option bytes. On the unmodified STM32F769I
* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
* to address 0x0020:0000 in ITCM FLASH.
*
* The STM32F769NIH6 also has 512Kb of data SRAM (in addition to ITCM SRAM).
* SRAM is split up into three blocks:
*
* 1) 128Kb of DTCM SRM beginning at address 0x2000:0000
* 2) 368Kb of SRAM1 beginning at address 0x2002:0000
* 3) 16Kb of SRAM2 beginning at address 0x2007:c000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
* FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
* should fit into 64KB and, of course, can be optimized as needed (See
* also configs/stm32f769i-disco/scripts/kernel-space.ld). Allowing the
* additional does permit addition debug instrumentation to be added to the
* kernel space without overflowing the partition.
*
* Alignment of the user space FLASH partition is also a critical factor:
* The user space FLASH partition will be spanned with a single region of
* size 2**n bytes. The alignment of the user-space region must be the same.
* As a consequence, as the user-space increases in size, the alignment
* requirement also increases.
*
* This alignment requirement means that the largest user space FLASH region
* you can have will be 512KB at it would have to be positioned at
* 0x08800000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c.
*
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range or perhaps with some
* clever use of subregions.
*
* A detailed memory map for the 112KB SRAM region is as follows:
*
* 0x20001 0000: Kernel .data region. Typical size: 0.1KB
* ------- ---- Kernel .bss region. Typical size: 1.8KB
* 0x20001 0800: Kernel IDLE thread stack (approximate). Size is
* determined by CONFIG_IDLETHREAD_STACKSIZE and
* adjustments for alignment. Typical is 1KB.
* ------- ---- Padded to 4KB
* 0x20001 1000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable.
* 0x20001 2000: Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE.
* ------- ---- Beginning of user heap. Can vary with other settings.
* 0x20004 c000: End+1 of SRAM1
*/
MEMORY
{
/* ITCM boot address */
itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K
/* 2048KB FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 1792K
/* 368KB of contiguous SRAM1 */
ksram (rwx) : ORIGIN = 0x20010000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x20011000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x20012000, LENGTH = 368K - 8K
/* DTCM SRAM */
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
sram2 (rwx) : ORIGIN = 0x2007c000, LENGTH = 16K
}

111
configs/stm32f769i-disco/scripts/user-space.ld Normal file

@ -0,0 +1,111 @@
/****************************************************************************
* configs/stm32f769i-disco/scripts/user-space.ld
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace : {
*(.userspace)
} > uflash
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab : {
*(.ARM.extab*)
} > uflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

2
configs/stm32f769i-disco/src/.gitignore vendored Normal file

@ -0,0 +1,2 @@
/.depend
/Make.dep

63
configs/stm32f769i-disco/src/Makefile Normal file

@ -0,0 +1,63 @@
############################################################################
# configs/stm32f769i-disco/src/Makefile
#
# Copyright (C) 2015 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = stm32_boot.c stm32_spi.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinitialize.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CSRCS += stm32_ostest.c
endif
ifeq ($(CONFIG_SPORADIC_INSTRUMENTATION),y)
CSRCS += stm32_sporadic.c
endif
include $(TOPDIR)/configs/Board.mk

98
configs/stm32f769i-disco/src/stm32_appinitialize.c Normal file

@ -0,0 +1,98 @@
/****************************************************************************
* config/stm32f769i-disco/src/stm32_appinitialize.c
*
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "stm32_ccm.h"
#include "stm32f769i-disco.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initalization logic and the
* matching application logic. The value cold be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_FS_PROCFS
int ret;
#ifdef CONFIG_STM32_CCM_PROCFS
/* Register the CCM procfs entry. This must be done before the procfs is
* mounted.
*/
(void)ccm_procfs_register();
#endif
/* Mount the procfs file system */
ret = mount(NULL, SAMV71_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
SYSLOG("ERROR: Failed to mount procfs at %s: %d\n",
SAMV71_PROCFS_MOUNTPOINT, ret);
}
#endif
return OK;
}

128
configs/stm32f769i-disco/src/stm32_autoleds.c Normal file

@ -0,0 +1,128 @@
/****************************************************************************
* configs/stm32f769i-disco/src/stm32_autoleds.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include "stm32_gpio.h"
#include "stm32f769i-disco.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure the LD1 GPIO for output. Initial state is OFF */
stm32_configgpio(GPIO_LD3);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
bool ledstate = false;
switch (led)
{
case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */
/* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
/* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */
break; /* Leave ledstate == true to turn OFF */
default:
case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */
/* LED_SIGNAL: In a signal handler STATUS LED=N/C */
/* LED_ASSERTION: An assertion failed STATUS LED=N/C */
return; /* Return to leave STATUS LED unchanged */
case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */
ledstate = true; /* Set ledstate == false to turn ON */
break;
}
stm32_gpiowrite(GPIO_LD3, ledstate);
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
/* These should not happen and are ignored */
default:
case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */
/* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
/* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */
case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */
/* These result in no-change */
case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */
/* LED_SIGNAL: In a signal handler STATUS LED=N/C */
/* LED_ASSERTION: An assertion failed STATUS LED=N/C */
return; /* Return to leave STATUS LED unchanged */
/* Turn STATUS LED off set driving the output high */
case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */
stm32_gpiowrite(GPIO_LD3, false);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */

127
configs/stm32f769i-disco/src/stm32_boot.c Normal file

@ -0,0 +1,127 @@
/************************************************************************************
* configs/stm32f769i-disco/src/stm32_boot.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "stm32f769i-disco.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
defined(CONFIG_STM32F7_SPI5)
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spidev_initialize() has been brought into the link.
*/
if (stm32_spidev_initialize)
{
stm32_spidev_initialize();
}
#endif
#ifdef CONFIG_SPORADIC_INSTRUMENTATION
/* This configuration has been used for evaluating the NuttX sporadic scheduler.
* The following caqll initializes the sporadic scheduler monitor.
*/
arch_sporadic_initialize();
#endif
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
/************************************************************************************
* Name: board_initialize
*
* Description:
* If CONFIG_BOARD_INITIALIZE is selected, then an additional initialization call
* will be performed in the boot-up sequence to a function called
* board_initialize(). board_initialize() will be called immediately after
* up_initialize() is called and just before the initial application is started.
* This additional initialization phase may be used, for example, to initialize
* board-specific device drivers.
*
************************************************************************************/
#ifdef CONFIG_BOARD_INITIALIZE
void board_initialize(void)
{
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
/* Perform NSH initialization here instead of from the NSH. This
* alternative NSH initialization is necessary when NSH is ran in user-space
* but the initialization function must run in kernel space.
*/
(void)board_app_initialize(0);
#endif
}
#endif

110
configs/stm32f769i-disco/src/stm32_buttons.c Normal file

@ -0,0 +1,110 @@
/****************************************************************************
* configs/stm32f769i-disco/src/stm32_buttons.c
*
* Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/board.h>
#include "stm32_gpio.h"
#include "stm32f769i-disco.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
void board_button_initialize(void)
{
stm32_configgpio(GPIO_BTN_USER);
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
return stm32_gpioread(GPIO_BTN_USER) ? 1 : 0;
}
/************************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources. After
* that, board_buttons() may be called to collect the current state of all
* buttons or board_button_irq() may be called to register button interrupt
* handlers.
*
* After board_button_initialize() has been called, board_buttons() may be called to
* collect the state of all buttons. board_buttons() returns an 32-bit bit set
* with each bit associated with a button. See the BUTTON_*_BIT
* definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See the
* BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
************************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
#warning Missing logic
return -ENOSYS;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */

114
configs/stm32f769i-disco/src/stm32_ostest.c Normal file

@ -0,0 +1,114 @@
/************************************************************************************
* configs/stm32f769i-disco/src/stm32_ostest.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "stm32f769i-disco.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
#undef HAVE_FPU
#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \
defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \
!defined(CONFIG_DISABLE_SIGNALS)
# define HAVE_FPU 1
#endif
#ifdef HAVE_FPU
#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS)
# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size"
#endif
/************************************************************************************
* Private Data
************************************************************************************/
static uint32_t g_saveregs[XCPTCONTEXT_REGS];
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Public Functions
************************************************************************************/
/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return
* the current FPU registers.
*/
void arch_getfpu(FAR uint32_t *fpusave)
{
irqstate_t flags;
/* Take a snapshot of the thread context right now */
flags = enter_critical_section();
up_saveusercontext(g_saveregs);
/* Return only the floating register values */
memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS));
leave_critical_section(flags);
}
/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function
* will compare them and return true if they are identical.
*/
bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
{
return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0;
}
#endif /* HAVE_FPU */

221
configs/stm32f769i-disco/src/stm32_spi.c Normal file

@ -0,0 +1,221 @@
/************************************************************************************
* configs/stm32f769i-disco/src/stm32_spi.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "chip.h"
#include "stm32_spi.h"
#include "stm32f769i-disco.h"
#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
defined(CONFIG_STM32F7_SPI5)
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the stm32f769i-disco board.
*
************************************************************************************/
void weak_function stm32_spidev_initialize(void)
{
}
/****************************************************************************
* Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32F7_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI4
void stm32_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32F7_SPI5
void stm32_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
/****************************************************************************
* Name: stm32_spi1cmddata
*
* Description:
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
* or command (false). This function must be provided by platform-specific
* logic. This is an implementation of the cmddata method of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
*
* Input Parameters:
*
* spi - SPI device that controls the bus the device that requires the CMD/
* DATA selection.
* devid - If there are multiple devices on the bus, this selects which one
* to select cmd or data. NOTE: This design restricts, for example,
* one one SPI display per SPI bus.
* cmd - true: select command; false: select data
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32F7_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI4
int stm32_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32F7_SPI5
int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#endif /* CONFIG_SPI_CMDDATA */
#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */

93
configs/stm32f769i-disco/src/stm32_sporadic.c Normal file

@ -0,0 +1,93 @@
/****************************************************************************
* configs/stm32f769i-disco/src/stm32_sporadic.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <nuttx/sched.h>
#include "stm32_gpio.h"
#include "stm32f769i-disco.h"
#ifdef CONFIG_SPORADIC_INSTRUMENTATION
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arch_sporadic_*
*
* Description:
* This configuration has been used for evaluating the NuttX sporadic
* scheduler. This only makes sense when uses with the sporadic test
* which is a part of apps/examples/ostest. If would make generate
* meaningful output in its current state if there were multiple sporadic
* threads
*
****************************************************************************/
void arch_sporadic_initialize(void)
{
stm32_configgpio(GPIO_SCHED_HIGHPRI);
stm32_configgpio(GPIO_SCHED_RUNNING);
}
void arch_sporadic_start(FAR struct tcb_s *tcb)
{
stm32_gpiowrite(GPIO_SCHED_HIGHPRI, true);
}
void arch_sporadic_lowpriority(FAR struct tcb_s *tcb)
{
stm32_gpiowrite(GPIO_SCHED_HIGHPRI, false);
}
void arch_sporadic_suspend(FAR struct tcb_s *tcb)
{
stm32_gpiowrite(GPIO_SCHED_RUNNING, false);
}
void arch_sporadic_resume(FAR struct tcb_s *tcb)
{
stm32_gpiowrite(GPIO_SCHED_RUNNING, true);
}
#endif /* CONFIG_SPORADIC_INSTRUMENTATION */

104
configs/stm32f769i-disco/src/stm32_userleds.c Normal file

@ -0,0 +1,104 @@
/****************************************************************************
* configs/stm32f769i-disco/src/stm32_userleds.c
*
* Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <debug.h>
#include "stm32_gpio.h"
#include "stm32f769i-disco.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the
* board_userled_initialize() is available to initialize the LED from user
* application logic.
*
****************************************************************************/
void board_userled_initialize(void)
{
stm32_configgpio(GPIO_LD3);
}
/****************************************************************************
* Name: board_userled
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is
* available to control the LED from user application logic.
*
****************************************************************************/
void board_userled(int led, bool ledon)
{
if (led == BOARD_STATUS_LED)
{
stm32_gpiowrite(GPIO_LD3, !ledon);
}
}
/****************************************************************************
* Name: board_userled_all
*
* Description:
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is
* available to control the LED from user application logic. NOTE: since
* there is only a single LED on-board, this is function is not very useful.
*
****************************************************************************/
void board_userled_all(uint8_t ledset)
{
stm32_gpiowrite(GPIO_LD3, (ledset & BOARD_STATUS_LED_BIT) != 0);
}
#endif /* !CONFIG_ARCH_LEDS */

125
configs/stm32f769i-disco/src/stm32f769i-disco.h Normal file

@ -0,0 +1,125 @@
/****************************************************************************************************
* configs/stm32f769i-disco/src/stm32f769i-disco.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************************/
#ifndef __CONFIGS_STM32F769I_DISCO_SRC_STM32F769I_DISCO__H
#define __CONFIGS_STM32F769I_DISCO_SRC_STM32F769I_DISCO__H
/****************************************************************************************************
* Included Files
****************************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************************************
* Pre-processor Definitions
****************************************************************************************************/
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define STM32_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/* STM32F769 Discovery GPIOs ***********************************************************************/
/* The STM32F769I-DISCO has one user controllable LED: LD3.
*
* LD3 is controlled by PA12 which is also the SPI2_SCK at the Arduino interface.
* LD3 is on when PA12 is high.
*/
#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTA | GPIO_PIN12)
/* Pushbutton B1, labelled "User", is connected to GPIO PA0. A high value will be sensed when the
* button is depressed. Note that the EXTI interrupt is configured.
*/
#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTA | GPIO_PIN0)
/* Sporadic scheduler instrumentation. This configuration has been used for evaluating the NuttX
* sporadic scheduler. In this evaluation, two GPIO outputs are used. One indicating the priority
* (high or low) of the sporadic thread and one indicating where the thread is running or not.
*
* There is nothing special about the pin selections:
*
* Arduino D2 PJ1 - Indicates priority1
* Arduino D4 PJ0 - Indicates that the thread is running
*/
#define GPIO_SCHED_HIGHPRI (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTJ | GPIO_PIN1)
#define GPIO_SCHED_RUNNING (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
GPIO_PORTJ | GPIO_PIN0)
/****************************************************************************************************
* Public data
****************************************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************************************
* Public Functions
****************************************************************************************************/
/****************************************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the stm32f769i-disco board.
*
****************************************************************************************************/
void weak_function stm32_spidev_initialize(void);
/****************************************************************************************************
* Name: arch_sporadic_initialize
*
* Description:
* This configuration has been used for evaluating the NuttX sporadic scheduler.
*
****************************************************************************************************/
#ifdef CONFIG_SPORADIC_INSTRUMENTATION
void arch_sporadic_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_STM32F769I_DISCO_SRC_STM32F769I_DISCO_H */

17
drivers/usbdev/cdcacm.c

@ -1358,10 +1358,10 @@ static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
case USB_DESC_TYPE_CONFIG:
{
#ifdef CONFIG_USBDEV_DUALSPEED
ret = cdcacm_mkcfgdesc(ctrlreq->buf, dev->speed,
ctrl->req);
ret = cdcacm_mkcfgdesc(ctrlreq->buf, &priv->devdesc,
dev->speed, ctrl->req);
#else
ret = cdcacm_mkcfgdesc(ctrlreq->buf, 0);
ret = cdcacm_mkcfgdesc(ctrlreq->buf, &priv->devdesc);
#endif
}
break;
@ -2377,6 +2377,9 @@ int cdcacm_classobject(int minor, FAR struct usbdev_description_s *devdesc,
sq_init(&priv->reqlist);
priv->minor = minor;
/* Save the caller provided device description (composite only) */
memcpy(&priv->devdesc, devdesc,
sizeof(struct usbdev_description_s));
@ -2487,10 +2490,16 @@ int cdcacm_initialize(int minor, FAR void **handle)
/* Endpoints.
*
* Endpoint numbers must be provided by board-specific logic.
* Endpoint numbers must be provided by board-specific logic when
* CDC/ACM is used in a composite device.
*/
devdesc.nendpoints = CDCACM_NUM_EPS;
#ifndef CONFIG_CDCACM_COMPOSITE
devdesc.epno[CDCACM_EP_INTIN_IDX] = CONFIG_CDCACM_EPINTIN;
devdesc.epno[CDCACM_EP_BULKIN_IDX] = CONFIG_CDCACM_EPBULKIN;
devdesc.epno[CDCACM_EP_BULKOUT_IDX] = CONFIG_CDCACM_EPBULKOUT;
#endif
/* Get an instance of the serial driver class object */

130
drivers/usbdev/cdcacm_desc.c

@ -95,7 +95,6 @@ static const struct usb_devdesc_s g_devdesc =
};
#endif
#if !defined(CONFIG_CDCACM_COMPOSITE) && defined(CONFIG_USBDEV_DUALSPEED)
static const struct usb_qualdesc_s g_qualdesc =
{
@ -114,10 +113,6 @@ static const struct usb_qualdesc_s g_qualdesc =
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@ -249,89 +244,89 @@ int cdcacm_copy_epdesc(enum cdcacm_epdesc_e epid,
{
case CDCACM_EPINTIN: /* Interrupt IN endpoint */
{
epdesc->len = USB_SIZEOF_EPDESC; /* Descriptor length */
epdesc->type = USB_DESC_TYPE_ENDPOINT; /* Descriptor type */
epdesc->addr = CDCACM_MKEPINTIN(devdesc); /* Endpoint address */
epdesc->attr = CDCACM_EPINTIN_ATTR; /* Endpoint attributes */
epdesc->len = USB_SIZEOF_EPDESC; /* Descriptor length */
epdesc->type = USB_DESC_TYPE_ENDPOINT; /* Descriptor type */
epdesc->addr = CDCACM_MKEPINTIN(devdesc); /* Endpoint address */
epdesc->attr = CDCACM_EPINTIN_ATTR; /* Endpoint attributes */
#ifdef CONFIG_USBDEV_DUALSPEED
if (hispeed)
{
/* Maximum packet size (high speed) */
if (hispeed)
{
/* Maximum packet size (high speed) */
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPINTIN_HSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPINTIN_HSSIZE);
}
else
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPINTIN_HSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPINTIN_HSSIZE);
}
else
#endif
{
/* Maximum packet size (full speed) */
{
/* Maximum packet size (full speed) */
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPINTIN_FSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPINTIN_FSSIZE);
}
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPINTIN_FSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPINTIN_FSSIZE);
}
epdesc->interval = 10; /* Interval */
}
break;
epdesc->interval = 10; /* Interval */
}
break;
case CDCACM_EPBULKOUT: /* Bulk OUT endpoint */
{
epdesc->len = USB_SIZEOF_EPDESC; /* Descriptor length */
epdesc->type = USB_DESC_TYPE_ENDPOINT; /* Descriptor type */
epdesc->addr = CDCACM_MKEPBULKOUT(devdesc); /* Endpoint address */
epdesc->attr = CDCACM_EPOUTBULK_ATTR; /* Endpoint attributes */
{
epdesc->len = USB_SIZEOF_EPDESC; /* Descriptor length */
epdesc->type = USB_DESC_TYPE_ENDPOINT; /* Descriptor type */
epdesc->addr = CDCACM_MKEPBULKOUT(devdesc); /* Endpoint address */
epdesc->attr = CDCACM_EPOUTBULK_ATTR; /* Endpoint attributes */
#ifdef CONFIG_USBDEV_DUALSPEED
if (hispeed)
{
/* Maximum packet size (high speed) */
if (hispeed)
{
/* Maximum packet size (high speed) */
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPBULKOUT_HSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPBULKOUT_HSSIZE);
}
else
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPBULKOUT_HSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPBULKOUT_HSSIZE);
}
else
#endif
{
/* Maximum packet size (full speed) */
{
/* Maximum packet size (full speed) */
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPBULKOUT_FSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPBULKOUT_FSSIZE);
}
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPBULKOUT_FSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPBULKOUT_FSSIZE);
}
epdesc->interval = 1; /* Interval */
}
break;
epdesc->interval = 1; /* Interval */
}
break;
case CDCACM_EPBULKIN: /* Bulk IN endpoint */
{
epdesc->len = USB_SIZEOF_EPDESC; /* Descriptor length */
epdesc->type = USB_DESC_TYPE_ENDPOINT; /* Descriptor type */
epdesc->addr = CDCACM_MKEPBULKIN(devdesc); /* Endpoint address */
epdesc->attr = CDCACM_EPINBULK_ATTR; /* Endpoint attributes */
{
epdesc->len = USB_SIZEOF_EPDESC; /* Descriptor length */
epdesc->type = USB_DESC_TYPE_ENDPOINT; /* Descriptor type */
epdesc->addr = CDCACM_MKEPBULKIN(devdesc); /* Endpoint address */
epdesc->attr = CDCACM_EPINBULK_ATTR; /* Endpoint attributes */
#ifdef CONFIG_USBDEV_DUALSPEED
if (hispeed)
{
/* Maximum packet size (high speed) */
if (hispeed)
{
/* Maximum packet size (high speed) */
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPBULKIN_HSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPBULKIN_HSSIZE);
}
else
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPBULKIN_HSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPBULKIN_HSSIZE);
}
else
#endif
{
/* Maximum packet size (full speed) */
{
/* Maximum packet size (full speed) */
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPBULKIN_FSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPBULKIN_FSSIZE);
}
epdesc->mxpacketsize[0] = LSBYTE(CONFIG_CDCACM_EPBULKIN_FSSIZE);
epdesc->mxpacketsize[1] = MSBYTE(CONFIG_CDCACM_EPBULKIN_FSSIZE);
}
epdesc->interval = 1; /* Interval */
}
break;
epdesc->interval = 1; /* Interval */
}
break;
default:
return 0;
return 0;
}
return sizeof(struct usb_epdesc_s);
@ -368,7 +363,7 @@ int16_t cdcacm_mkcfgdesc(FAR uint8_t *buf,
}
#endif
/* fill in all descriptors directly to the buf */
/* Fill in all descriptors directly to the buf */
/* Configuration Descriptor. If the serial device is used in as part
* or a composite device, then the configuration descriptor is
@ -479,7 +474,6 @@ int16_t cdcacm_mkcfgdesc(FAR uint8_t *buf,
length += sizeof(struct cdc_hdr_funcdesc_s);
/* ACM functional descriptor */
if (buf != NULL)
@ -604,5 +598,3 @@ FAR const struct usb_qualdesc_s *cdcacm_getqualdesc(void)
return &g_qualdesc;
}
#endif

12
drivers/usbdev/composite_desc.c

@ -53,18 +53,6 @@
#ifdef CONFIG_USBDEV_COMPOSITE
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/

4
libc/math/lib_ceil.c

@ -41,8 +41,10 @@
#ifdef CONFIG_HAVE_DOUBLE
double ceil(double x)
{
double x1 = x;
modf(x, &x);
if (x > 0.0)
if (x1 > 0.0 && fabs(x1 - x) > 0.0)
{
x += 1.0;
}

4
libc/math/lib_ceilf.c

@ -37,8 +37,10 @@
float ceilf(float x)
{
float x1 = x;
modff(x, &x);
if (x > 0.0F)
if (x1 > 0.0F && fabsf(x1 - x) > 0.0F)
{
x += 1.0F;
}

4
libc/math/lib_ceill.c

@ -41,8 +41,10 @@
#ifdef CONFIG_HAVE_LONG_DOUBLE
long double ceill(long double x)
{
long double x1 = x;
modfl(x, &x);
if (x > 0.0)
if (x1 > 0.0 && fabsl(x1 - x) > 0.0)
{
x += 1.0;
}

2
libc/math/lib_modf.c

@ -46,7 +46,7 @@ double modf(double x, double *iptr)
}
else if (fabs(x) < 1.0)
{
*iptr = 0.0;
*iptr = (x * 0.0);
return x;
}
else

2
libc/math/lib_modff.c

@ -44,7 +44,7 @@ float modff(float x, float *iptr)
}
else if (fabsf(x) < 1.0F)
{
*iptr = 0.0F;
*iptr = (x * 0.0F);
return x;
}
else

2
libc/math/lib_modfl.c

@ -49,7 +49,7 @@ long double modfl(long double x, long double *iptr)
}
else if (fabs(x) < 1.0)
{
*iptr = 0.0;
*iptr = (x * 0.0);
return x;
}
else

4
net/socket/net_poll.c

@ -100,9 +100,6 @@ int psock_poll(FAR struct socket *psock, FAR struct pollfd *fds, bool setup)
int net_poll(int sockfd, struct pollfd *fds, bool setup)
{
#ifndef HAVE_NET_POLL
return -ENOSYS;
#else
FAR struct socket *psock;
DEBUGASSERT(fds != NULL);
@ -120,7 +117,6 @@ int net_poll(int sockfd, struct pollfd *fds, bool setup)
/* Then let psock_poll() do the heavy lifting */
return psock_poll(psock, fds, setup);
#endif /* HAVE_NET_POLL */
}
#endif /* CONFIG_NET && !CONFIG_DISABLE_POLL */

2
wireless/ieee802154/Kconfig

@ -128,7 +128,7 @@ config IEEE802154_IND_IRQRESERVE
dynamically allocate the meta data structure with an additional cost
in performance.
NOTE: Currently marked as experimental and with a default 0 zero
NOTE: Currently marked as experimental and with a default of zero
because there are no interrupt level allocations performed by the
current IEEE 802.15.4 MAC code.