Fix xmc4_spi.c DX select.

Added option to have different DX for each USIC channel.
This commit is contained in:
adriendesp 2024-09-04 09:54:57 +02:00 committed by Xiang Xiao
parent dde7411679
commit 42f471ba4d

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@ -200,6 +200,8 @@ struct xmc4_spidev_s
uint8_t txintf; /* TX hardware interface number */ uint8_t txintf; /* TX hardware interface number */
#endif #endif
uint8_t dx0; /* Input signal selection for MISO */
/* Debug stuff */ /* Debug stuff */
#ifdef CONFIG_XMC4_SPI_REGDEBUG #ifdef CONFIG_XMC4_SPI_REGDEBUG
@ -326,6 +328,11 @@ static struct xmc4_spidev_s g_spi0dev =
.base = XMC4_USIC0_CH0_BASE, .base = XMC4_USIC0_CH0_BASE,
.spilock = NXMUTEX_INITIALIZER, .spilock = NXMUTEX_INITIALIZER,
.select = xmc4_spi0select, .select = xmc4_spi0select,
#ifdef BOARD_SPI0_DX
.dx0 = BOARD_SPI0_DX,
#else
.dx0 = BOARD_SPI_DX,
#endif
#ifdef CONFIG_XMC4_SPI_DMA #ifdef CONFIG_XMC4_SPI_DMA
.rxintf = DMACHAN_INTF_SPI0RX, .rxintf = DMACHAN_INTF_SPI0RX,
.txintf = DMACHAN_INTF_SPI0TX, .txintf = DMACHAN_INTF_SPI0TX,
@ -364,6 +371,11 @@ static struct xmc4_spidev_s g_spi1dev =
.base = XMC4_USIC0_CH1_BASE, .base = XMC4_USIC0_CH1_BASE,
.spilock = NXMUTEX_INITIALIZER, .spilock = NXMUTEX_INITIALIZER,
.select = xmc4_spi1select, .select = xmc4_spi1select,
#ifdef BOARD_SPI1_DX
.dx0 = BOARD_SPI1_DX,
#else
.dx0 = BOARD_SPI_DX,
#endif
#ifdef CONFIG_XMC4_SPI_DMA #ifdef CONFIG_XMC4_SPI_DMA
.rxintf = DMACHAN_INTF_SPI1RX, .rxintf = DMACHAN_INTF_SPI1RX,
.txintf = DMACHAN_INTF_SPI1TX, .txintf = DMACHAN_INTF_SPI1TX,
@ -402,6 +414,11 @@ static struct xmc4_spidev_s g_spi2dev =
.base = XMC4_USIC1_CH0_BASE, .base = XMC4_USIC1_CH0_BASE,
.spilock = NXMUTEX_INITIALIZER, .spilock = NXMUTEX_INITIALIZER,
.select = xmc4_spi2select, .select = xmc4_spi2select,
#ifdef BOARD_SPI2_DX
.dx0 = BOARD_SPI2_DX,
#else
.dx0 = BOARD_SPI_DX,
#endif
#ifdef CONFIG_XMC4_SPI_DMA #ifdef CONFIG_XMC4_SPI_DMA
.rxintf = DMACHAN_INTF_SPI2RX, .rxintf = DMACHAN_INTF_SPI2RX,
.txintf = DMACHAN_INTF_SPI2TX, .txintf = DMACHAN_INTF_SPI2TX,
@ -440,6 +457,11 @@ static struct xmc4_spidev_s g_spi3dev =
.base = XMC4_USIC1_CH1_BASE, .base = XMC4_USIC1_CH1_BASE,
.spilock = NXMUTEX_INITIALIZER, .spilock = NXMUTEX_INITIALIZER,
.select = xmc4_spi3select, .select = xmc4_spi3select,
#ifdef BOARD_SPI3_DX
.dx0 = BOARD_SPI3_DX,
#else
.dx0 = BOARD_SPI_DX,
#endif
#ifdef CONFIG_XMC4_SPI_DMA #ifdef CONFIG_XMC4_SPI_DMA
.rxintf = DMACHAN_INTF_SPI3RX, .rxintf = DMACHAN_INTF_SPI3RX,
.txintf = DMACHAN_INTF_SPI3TX, .txintf = DMACHAN_INTF_SPI3TX,
@ -478,6 +500,11 @@ static struct xmc4_spidev_s g_spi4dev =
.base = XMC4_USIC2_CH0_BASE, .base = XMC4_USIC2_CH0_BASE,
.spilock = NXMUTEX_INITIALIZER, .spilock = NXMUTEX_INITIALIZER,
.select = xmc4_spi4select, .select = xmc4_spi4select,
#ifdef BOARD_SPI4_DX
.dx0 = BOARD_SPI4_DX,
#else
.dx0 = BOARD_SPI_DX,
#endif
#ifdef CONFIG_XMC4_SPI_DMA #ifdef CONFIG_XMC4_SPI_DMA
.rxintf = DMACHAN_INTF_SPI4RX, .rxintf = DMACHAN_INTF_SPI4RX,
.txintf = DMACHAN_INTF_SPI4TX, .txintf = DMACHAN_INTF_SPI4TX,
@ -517,6 +544,11 @@ static struct xmc4_spidev_s g_spi5dev =
.base = XMC4_USIC2_CH1_BASE, .base = XMC4_USIC2_CH1_BASE,
.spilock = NXMUTEX_INITIALIZER, .spilock = NXMUTEX_INITIALIZER,
.select = xmc4_spi5select, .select = xmc4_spi5select,
#ifdef BOARD_SPI5_DX
.dx0 = BOARD_SPI5_DX,
#else
.dx0 = BOARD_SPI_DX,
#endif
#ifdef CONFIG_XMC4_SPI_DMA #ifdef CONFIG_XMC4_SPI_DMA
.rxintf = DMACHAN_INTF_SPI5RX, .rxintf = DMACHAN_INTF_SPI5RX,
.txintf = DMACHAN_INTF_SPI5TX, .txintf = DMACHAN_INTF_SPI5TX,
@ -2017,9 +2049,15 @@ struct spi_dev_s *xmc4_spibus_initialize(int channel)
/* Set DX0CR input source path and input switch */ /* Set DX0CR input source path and input switch */
if (spi->dx0 > 7)
{
spierr("ERROR: DX invalid: %d\n", spi->dx0);
goto errchannel;
}
regval = getreg32(spi->base + XMC4_USIC_DX0CR_OFFSET); regval = getreg32(spi->base + XMC4_USIC_DX0CR_OFFSET);
regval &= ~USIC_DXCR_DSEL_MASK; regval &= ~USIC_DXCR_DSEL_MASK;
regval |= USIC_DXCR_DSEL_DX(BOARD_SPI_DX); regval |= USIC_DXCR_DSEL_DX(spi->dx0);
regval |= USIC_DXCR_INSW; regval |= USIC_DXCR_INSW;
putreg32(regval, spi->base + XMC4_USIC_DX0CR_OFFSET); putreg32(regval, spi->base + XMC4_USIC_DX0CR_OFFSET);