Add some comments.
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@ -788,5 +788,6 @@ bool stm32_gpioread(uint32_t pinset)
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pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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return ((getreg32(base + STM32_GPIO_IDR_OFFSET) & (1 << pin)) != 0);
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}
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return 0;
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}
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@ -1139,6 +1139,8 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
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pwm_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
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}
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/* REVISIT: CNT and ARR may be 32-bits wide */
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pwminfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
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pwm_getreg(priv, STM32_GTIM_CCER_OFFSET),
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pwm_getreg(priv, STM32_GTIM_CNT_OFFSET),
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@ -1152,6 +1154,8 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
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pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET));
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}
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/* REVISIT: CCR1-CCR4 may be 32-bits wide */
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if (priv->timid == 16 || priv->timid == 17)
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{
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pwminfo(" CCR1: %04x\n",
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