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Fix errors in handling interrupt bits on context restore

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1541 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-02-28 21:58:27 +00:00
parent 6c0b393697
commit 434c6c27ca
1 changed files with 25 additions and 9 deletions
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34
arch/z80/src/ez80/ez80_vectors.asm
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@ -37,7 +37,16 @@
; Constants ; Constants
;************************************************************************** ;**************************************************************************
NVECTORS EQU 64 ; max possible interrupt vectors NVECTORS EQU 64 ; max possible interrupt vectors
;* Bits in the Z80 FLAGS register *****************************************
EZ80_C_FLAG EQU 01h ; Bit 0: Carry flag
EZ80_N_FLAG EQU 02h ; Bit 1: Add/Subtract flag
EZ80_PV_FLAG EQU 04h ; Bit 2: Parity/Overflow flag
EZ80_H_FLAG EQU 10h ; Bit 4: Half carry flag
EZ80_Z_FLAG EQU 40h ; Bit 5: Zero flag
EZ80_S_FLAG EQU 80h ; Bit 7: Sign flag
;************************************************************************** ;**************************************************************************
; Global Symbols Imported ; Global Symbols Imported
@ -202,31 +211,36 @@ _ez80_rstcommon:
; IRQ number is in A ; IRQ number is in A
push hl ; Offset 6: HL push hl ; Offset 6: HL
ld hl, #(3*2) ; HL is the value of the stack pointer before ld hl, #(3*3) ; HL is the value of the stack pointer before
add hl, sp ; the interrupt occurred add hl, sp ; the interrupt occurred (3 for PC, AF, HL)
push hl ; Offset 5: Stack pointer push hl ; Offset 5: Stack pointer
push iy ; Offset 4: IY push iy ; Offset 4: IY
push ix ; Offset 3: IX push ix ; Offset 3: IX
push de ; Offset 2: DE push de ; Offset 2: DE
push bc ; Offset 1: BC push bc ; Offset 1: BC
ld c, a ; Save the reset number in C ; At this point, we know that interrupts were enabled (or we wouldn't be here
ld a, i ; Carry bit holds interrupt state ; so we can save a fake indicationn that will cause interrupts to restored when
push af ; Offset 0: I with interrupt state in carry ; this context is restored
di
ld bc, #EZ80_PV_FLAG ; Parity bit. 1=parity odd, IEF2=1
push bc ; Offset 0: I with interrupt state in carry
di ; (not necessary)
; Call the interrupt decode logic. SP points to the beggining of the reg structure ; Call the interrupt decode logic. SP points to the beggining of the reg structure
ld hl, #0 ; Argument #2 is the beginning of the reg structure ld hl, #0 ; Argument #2 is the beginning of the reg structure
add hl, sp ; add hl, sp ;
push hl ; Place argument #2 at the top of stack push hl ; Place argument #2 at the top of stack
ld bc, #0 ; BC = reset number
ld c, a ; Save the reset number in C
push bc ; Argument #1 is the Reset number push bc ; Argument #1 is the Reset number
call _up_doirq ; Decode the IRQ call _up_doirq ; Decode the IRQ
; On return, HL points to the beginning of the reg structure to restore ; On return, HL points to the beginning of the reg structure to restore
; Note that (1) the arguments pushed on the stack are not popped, and (2) the ; Note that (1) the arguments pushed on the stack are not popped, and (2) the
; original stack pointer is lost. In the normal case (no context switch), ; original stack pointer is lost. In the normal case (no context switch),
; HL will contain the value of the SP before the arguments wer pushed. ; HL will contain the value of the SP before the arguments were pushed.
ld sp, hl ; Use the new stack pointer ld sp, hl ; Use the new stack pointer
@ -248,13 +262,15 @@ _ez80_rstcommon:
; Restore the stack pointer ; Restore the stack pointer
exx ; Use alternate BC/DE/HL exx ; Use alternate BC/DE/HL
pop de ; Offset 8: Return address
ld sp, hl ; Set SP = saved stack pointer value before return ld sp, hl ; Set SP = saved stack pointer value before return
push de ; Set up for reti
exx ; Restore original BC/DE/HL exx ; Restore original BC/DE/HL
; Restore interrupt state ; Restore interrupt state
ex af, af' ; Recover interrupt state ex af, af' ; Recover interrupt state
jr nc, nointenable ; No carry, IFF2=0, means disabled jp po, nointenable ; Odd parity, IFF2=0, means disabled
ex af, af' ; Restore AF (before enabling interrupts) ex af, af' ; Restore AF (before enabling interrupts)
ei ; yes ei ; yes
reti reti