From 435528e7a0bcb2ab63a80554c217d6eecbde72a0 Mon Sep 17 00:00:00 2001 From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> Date: Thu, 10 Jan 2008 01:41:58 +0000 Subject: [PATCH] Add control reg defs git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@541 42af7a65-404d-4744-a932-0658087f49c3 --- arch/z16/src/z16f/chip.h | 59 +++++++++++++++++++++++++++++----------- 1 file changed, 43 insertions(+), 16 deletions(-) diff --git a/arch/z16/src/z16f/chip.h b/arch/z16/src/z16f/chip.h index d8d5a41774..13e54e7e34 100644 --- a/arch/z16/src/z16f/chip.h +++ b/arch/z16/src/z16f/chip.h @@ -45,8 +45,8 @@ * Definitions ************************************************************************************/ -/* Z16F Chip Variants */ - +/* Z16F Chip Variants ***************************************************************/ + #if defined(CONFIG_ARCH_CHIP_Z16F2810) # define Z16F_INVMEM_SIZE (128*1024) # define Z16F_IRAM_SIZE (4*1024) @@ -67,25 +67,25 @@ # error "Z16F chip variant not specified" #endif -/* Memory areas +/* Memory areas********************************************************************** * * Internal non-volatile memory starts at address zero. The size * of the internal non-volatile memory is chip-dependent. */ -#define Z16F_INVMEM_BASE 0x000000 +#define Z16F_INVMEM_BASE 0x000000 /* Most chip variants support external memory */ #ifdef Z16F_HAVE_EXTMEM -# define Z16F_EXTMEMCS0_BASE 0x020000 /* External memory at CS0 */ -# define Z16F_EXTMEMCS0_SIZE 0x7e0000 /* (actual depends on board) */ -# define Z16F_EXTMEMCS1_BASE 0x800000 /* External memory at CS1 */ -# define Z16F_EXTMEMCS1_SIZE 0x700000 /* (actual depends on board) */ -# define Z16F_EXTMEMCS2A_BASE 0xf00000 /* External memory at CS2 */ -# define Z16F_EXTMEMCS2A_SIZE 0x0f8000 /* (actual depends on board) */ -# define Z16F_EXTMEMCS2B_BASE 0xffc000 /* External memory at CS2 */ -# define Z16F_EXTMEMCS2B_SIZE 0x000800 /* (actual depends on board) */ +# define Z16F_EXTMEMCS0_BASE 0x020000 /* External memory at CS0 */ +# define Z16F_EXTMEMCS0_SIZE 0x7e0000 /* (actual depends on board) */ +# define Z16F_EXTMEMCS1_BASE 0x800000 /* External memory at CS1 */ +# define Z16F_EXTMEMCS1_SIZE 0x700000 /* (actual depends on board) */ +# define Z16F_EXTMEMCS2A_BASE 0xf00000 /* External memory at CS2 */ +# define Z16F_EXTMEMCS2A_SIZE 0x0f8000 /* (actual depends on board) */ +# define Z16F_EXTMEMCS2B_BASE 0xffc000 /* External memory at CS2 */ +# define Z16F_EXTMEMCS2B_SIZE 0x000800 /* (actual depends on board) */ #endif /* Internal RAM always ends at 0xffbfff. The IRAM base address depends @@ -96,10 +96,37 @@ /* External memory mapped peripherals, internal I/O memory and SFRS */ -#define Z16F_EXTIO_BASE 0xffc800 /* External peripherals CS3-5 */ -#define Z16F_EXTIO_SIZE 0x001800 -#define Z16F_IIO_BASE 0xffe000 /* Internal I/O memory and SFRs */ -#define Z16F_IIO_SIZE 0x001fff +#define Z16F_EXTIO_BASE 0xffc800 /* External peripherals CS3-5 */ +#define Z16F_EXTIO_SIZE 0x001800 +#define Z16F_IIO_BASE 0xffe000 /* Internal I/O memory and SFRs */ +#define Z16F_IIO_SIZE 0x001fff + +/* Control Registers ***************************************************************/ + +#define Z16F_CNTRL_PCOV 0xffe04 /* 32-bits: Program counter overflow */ +#define Z16F_CNTRL_SPOV 0xffe0c /* 32-bits: Stack pointer overflow */ +#define Z16F_CNTRL_FLAGS 0xffe10 /* 8-bits: flags */ +#define Z16F_CNTRL_CPUCTL 0xffe12 /* 8-bits: CPU control */ + +/* Flag register bits **************************\*************************************/ + +#define Z16F_CNTRL_FLAGS_C 0x80 /* Bit 7: Carry flag */ +#define Z16F_CNTRL_FLAGS_Z 0x40 /* Bit 6: Zero flag */ +#define Z16F_CNTRL_FLAGS_S 0x20 /* Bit 5: Sign flag */ +#define Z16F_CNTRL_FLAGS_V 0x10 /* Bit 4: Overflow flag */ +#define Z16F_CNTRL_FLAGS_B 0x08 /* Bit 3: Blank flag */ +#define Z16F_CNTRL_FLAGS_F1 0x04 /* Bit 2: User flag 1 */ +#define Z16F_CNTRL_FLAGS_CIRQE 0x02 /* Bit 1: Chained interrupt enable */ +#define Z16F_CNTRL_FLAGS_IRQE 0x01 /* Bit 0: Master interrupt enable */ + +/* CPU control register bits ********************************************************/ + + /* Bits 7-2: Reserved, must be zero */ + /* Bits 1-0: DMA bandwidth control */ +#define Z16F_CNTRL_CPUCTL_BWALL 0x00 /* DMA can consume 100% bandwidth */ +#define Z16F_CNTRL_CPUCTL_BW11 0x01 /* DMA can do 1 transaction per 1 cycle */ +#define Z16F_CNTRL_CPUCTL_BW12 0x01 /* DMA can do 1 transaction per 2 cycles */ +#define Z16F_CNTRL_CPUCTL_BW13 0x01 /* DMA can do 1 transaction per 3 cycles */ /************************************************************************************ * Public Function Prototypes