arch/arm64: Change the ARM configuration to ARM64.Add ARM64_NEON configuration
Summary: 1. Change the ARM to ARM64 2. Add CONFIG_ARM64_NEON Signed-off-by: wangming9 <wangming9@xiaomi.com>
This commit is contained in:
parent
d295752a26
commit
4422c26c78
@ -197,7 +197,7 @@ config ARCH_CORTEX_A53
|
||||
select ARCH_HAVE_MMU
|
||||
select ARCH_HAVE_FPU
|
||||
select ARCH_HAVE_TESTSET
|
||||
select ARM_HAVE_NEON
|
||||
select ARM64_HAVE_NEON
|
||||
|
||||
config ARCH_CORTEX_A55
|
||||
bool
|
||||
@ -209,7 +209,7 @@ config ARCH_CORTEX_A55
|
||||
select ARCH_HAVE_MMU
|
||||
select ARCH_HAVE_FPU
|
||||
select ARCH_HAVE_TESTSET
|
||||
select ARM_HAVE_NEON
|
||||
select ARM64_HAVE_NEON
|
||||
|
||||
config ARCH_CORTEX_A57
|
||||
bool
|
||||
@ -221,7 +221,7 @@ config ARCH_CORTEX_A57
|
||||
select ARCH_HAVE_MMU
|
||||
select ARCH_HAVE_FPU
|
||||
select ARCH_HAVE_TESTSET
|
||||
select ARM_HAVE_NEON
|
||||
select ARM64_HAVE_NEON
|
||||
|
||||
config ARCH_CORTEX_A72
|
||||
bool
|
||||
@ -233,7 +233,7 @@ config ARCH_CORTEX_A72
|
||||
select ARCH_HAVE_MMU
|
||||
select ARCH_HAVE_FPU
|
||||
select ARCH_HAVE_TESTSET
|
||||
select ARM_HAVE_NEON
|
||||
select ARM64_HAVE_NEON
|
||||
|
||||
config ARCH_CORTEX_R82
|
||||
bool
|
||||
@ -244,7 +244,7 @@ config ARCH_CORTEX_R82
|
||||
select ARCH_HAVE_MPU
|
||||
select ARCH_HAVE_FPU
|
||||
select ARCH_HAVE_TESTSET
|
||||
select ARM_HAVE_NEON
|
||||
select ARM64_HAVE_NEON
|
||||
|
||||
config ARCH_FAMILY
|
||||
string
|
||||
@ -261,12 +261,17 @@ config ARCH_CHIP
|
||||
default "imx8" if ARCH_CHIP_IMX8
|
||||
default "imx9" if ARCH_CHIP_IMX9
|
||||
|
||||
config ARM_HAVE_NEON
|
||||
config ARM64_HAVE_NEON
|
||||
bool
|
||||
default n
|
||||
---help---
|
||||
Decide whether support NEON instruction
|
||||
|
||||
config ARM64_NEON
|
||||
bool "Advanced SIMD (NEON) Extension"
|
||||
default y
|
||||
depends on ARM64_HAVE_NEON
|
||||
|
||||
config ARM64_DECODEFIQ
|
||||
bool "FIQ Handler"
|
||||
default n
|
||||
@ -275,7 +280,7 @@ config ARM64_DECODEFIQ
|
||||
arm_decodefiq(). This is used primarily to support secure TrustZone
|
||||
interrupts received on the FIQ vector.
|
||||
|
||||
config ARM_GIC_VERSION
|
||||
config ARM64_GIC_VERSION
|
||||
int "GIC version"
|
||||
default 2 if ARCH_CHIP_A64
|
||||
default 3
|
||||
@ -284,9 +289,9 @@ config ARM_GIC_VERSION
|
||||
Version of Generic Interrupt Controller (GIC) supported by the
|
||||
architecture
|
||||
|
||||
if ARM_GIC_VERSION = 2
|
||||
if ARM64_GIC_VERSION = 2
|
||||
|
||||
config ARM_GIC_EOIMODE
|
||||
config ARM64_GIC_EOIMODE
|
||||
bool
|
||||
default n
|
||||
---help---
|
||||
|
@ -39,12 +39,12 @@
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_FVP_ARMV8R)
|
||||
|
||||
#if CONFIG_ARM_GIC_VERSION == 2
|
||||
#if CONFIG_ARM64_GIC_VERSION == 2
|
||||
|
||||
#define CONFIG_GICD_BASE 0xAF000000
|
||||
#define CONFIG_GICR_BASE 0xAF100000
|
||||
|
||||
#elif CONFIG_ARM_GIC_VERSION == 3 || CONFIG_ARM_GIC_VERSION == 4
|
||||
#elif CONFIG_ARM64_GIC_VERSION == 3 || CONFIG_ARM64_GIC_VERSION == 4
|
||||
|
||||
#define CONFIG_GICD_BASE 0xAF000000
|
||||
#define CONFIG_GICR_BASE 0xAF100000
|
||||
@ -52,9 +52,9 @@
|
||||
|
||||
#else
|
||||
|
||||
#error CONFIG_ARM_GIC_VERSION should be 2, 3 or 4
|
||||
#error CONFIG_ARM64_GIC_VERSION should be 2, 3 or 4
|
||||
|
||||
#endif /* CONFIG_ARM_GIC_VERSION */
|
||||
#endif /* CONFIG_ARM64_GIC_VERSION */
|
||||
|
||||
#define CONFIG_RAMBANK_ADDR 0x00000000
|
||||
#define CONFIG_RAMBANK_SIZE MB(128)
|
||||
|
@ -54,12 +54,12 @@
|
||||
* it's useless for NuttX
|
||||
*/
|
||||
|
||||
#if CONFIG_ARM_GIC_VERSION == 2
|
||||
#if CONFIG_ARM64_GIC_VERSION == 2
|
||||
|
||||
#define CONFIG_GICD_BASE 0x8000000
|
||||
#define CONFIG_GICR_BASE 0x8010000
|
||||
|
||||
#endif /* CONFIG_ARM_GIC_VERSION */
|
||||
#endif /* CONFIG_ARM64_GIC_VERSION */
|
||||
|
||||
#define CONFIG_FLASH_BASEADDR 0x7000000
|
||||
#define CONFIG_FLASH_SIZE MB(128)
|
||||
|
@ -39,7 +39,7 @@
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_IMX8_QUADMAX)
|
||||
|
||||
#if CONFIG_ARM_GIC_VERSION == 3 || CONFIG_ARM_GIC_VERSION == 4
|
||||
#if CONFIG_ARM64_GIC_VERSION == 3 || CONFIG_ARM64_GIC_VERSION == 4
|
||||
|
||||
#define CONFIG_GICD_BASE 0x51a00000
|
||||
#define CONFIG_GICR_BASE 0x51b00000
|
||||
@ -47,9 +47,9 @@
|
||||
|
||||
#else
|
||||
|
||||
#error CONFIG_ARM_GIC_VERSION should be 2, 3 or 4
|
||||
#error CONFIG_ARM64_GIC_VERSION should be 2, 3 or 4
|
||||
|
||||
#endif /* CONFIG_ARM_GIC_VERSION */
|
||||
#endif /* CONFIG_ARM64_GIC_VERSION */
|
||||
|
||||
#define CONFIG_RAMBANK1_ADDR 0x80000000
|
||||
#define CONFIG_RAMBANK1_SIZE MB(128)
|
||||
|
@ -44,7 +44,7 @@
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_IMX93)
|
||||
|
||||
#if CONFIG_ARM_GIC_VERSION == 3 || CONFIG_ARM_GIC_VERSION == 4
|
||||
#if CONFIG_ARM64_GIC_VERSION == 3 || CONFIG_ARM64_GIC_VERSION == 4
|
||||
|
||||
#define CONFIG_GICD_BASE 0x48000000
|
||||
#define CONFIG_GICR_BASE 0x48040000
|
||||
@ -52,9 +52,9 @@
|
||||
|
||||
#else
|
||||
|
||||
#error CONFIG_ARM_GIC_VERSION should be 2, 3 or 4
|
||||
#error CONFIG_ARM64_GIC_VERSION should be 3 or 4
|
||||
|
||||
#endif /* CONFIG_ARM_GIC_VERSION */
|
||||
#endif /* CONFIG_ARM64_GIC_VERSION */
|
||||
|
||||
#define CONFIG_RAMBANK1_ADDR 0x80000000
|
||||
#define CONFIG_RAMBANK1_SIZE MB(128)
|
||||
|
@ -39,21 +39,21 @@
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_QEMU)
|
||||
|
||||
#if CONFIG_ARM_GIC_VERSION == 2
|
||||
#if CONFIG_ARM64_GIC_VERSION == 2
|
||||
|
||||
#define CONFIG_GICD_BASE 0x8000000
|
||||
#define CONFIG_GICR_BASE 0x8010000
|
||||
|
||||
#elif CONFIG_ARM_GIC_VERSION == 3 || CONFIG_ARM_GIC_VERSION == 4
|
||||
#elif CONFIG_ARM64_GIC_VERSION == 3 || CONFIG_ARM64_GIC_VERSION == 4
|
||||
|
||||
#define CONFIG_GICD_BASE 0x8000000
|
||||
#define CONFIG_GICR_BASE 0x80a0000
|
||||
#define CONFIG_GICR_OFFSET 0x20000
|
||||
#else
|
||||
|
||||
#error CONFIG_ARM_GIC_VERSION should be 2, 3 or 4
|
||||
#error CONFIG_ARM64_GIC_VERSION should be 2, 3 or 4
|
||||
|
||||
#endif /* CONFIG_ARM_GIC_VERSION */
|
||||
#endif /* CONFIG_ARM64_GIC_VERSION */
|
||||
|
||||
#define CONFIG_RAMBANK1_ADDR 0x40000000
|
||||
#define CONFIG_RAMBANK1_SIZE MB(128)
|
||||
|
@ -47,11 +47,11 @@ list(APPEND SRCS arm64_syscall.c)
|
||||
# Use common heap allocation for now (may need to be customized later)
|
||||
list(APPEND SRCS arm64_allocateheap.c)
|
||||
|
||||
if(CONFIG_ARM_GIC_VERSION EQUAL 3)
|
||||
if(CONFIG_ARM64_GIC_VERSION EQUAL 3)
|
||||
list(APPEND SRCS arm64_gicv3.c)
|
||||
endif()
|
||||
|
||||
if(CONFIG_ARM_GIC_VERSION EQUAL 2)
|
||||
if(CONFIG_ARM64_GIC_VERSION EQUAL 2)
|
||||
list(APPEND SRCS arm64_gicv2.c)
|
||||
endif()
|
||||
|
||||
|
@ -59,11 +59,11 @@ CMN_CSRCS += arm64_modifyreg8.c arm64_modifyreg16.c arm64_modifyreg32.c
|
||||
# Use common heap allocation for now (may need to be customized later)
|
||||
CMN_CSRCS += arm64_allocateheap.c
|
||||
|
||||
ifeq ($(CONFIG_ARM_GIC_VERSION),3)
|
||||
ifeq ($(CONFIG_ARM64_GIC_VERSION),3)
|
||||
CMN_CSRCS += arm64_gicv3.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_ARM_GIC_VERSION),2)
|
||||
ifeq ($(CONFIG_ARM64_GIC_VERSION),2)
|
||||
CMN_CSRCS += arm64_gicv2.c
|
||||
endif
|
||||
|
||||
|
@ -44,7 +44,7 @@
|
||||
#include "arm64_internal.h"
|
||||
#include "arm64_gic.h"
|
||||
|
||||
#if CONFIG_ARM_GIC_VERSION == 2
|
||||
#if CONFIG_ARM64_GIC_VERSION == 2
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
@ -1463,4 +1463,4 @@ int arm64_gic_raise_sgi(unsigned int sgi, uint16_t cpuset)
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
#endif /* CONFIG_ARM_GIC_VERSION == 2 */
|
||||
#endif /* CONFIG_ARM64_GIC_VERSION == 2 */
|
||||
|
@ -15,7 +15,7 @@ CONFIG_ARCH_CHIP_QEMU=y
|
||||
CONFIG_ARCH_CHIP_QEMU_A53=y
|
||||
CONFIG_ARCH_CHIP_QEMU_WITH_HV=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=4096
|
||||
CONFIG_ARM_GIC_VERSION=2
|
||||
CONFIG_ARM64_GIC_VERSION=2
|
||||
CONFIG_AUDIO=y
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_CODECS_HASH_MD5=y
|
||||
|
@ -15,7 +15,7 @@ CONFIG_ARCH_CHIP_QEMU=y
|
||||
CONFIG_ARCH_CHIP_QEMU_A53=y
|
||||
CONFIG_ARCH_CHIP_QEMU_WITH_HV=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=4096
|
||||
CONFIG_ARM_GIC_VERSION=2
|
||||
CONFIG_ARM64_GIC_VERSION=2
|
||||
CONFIG_AUDIO=y
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_CODECS_HASH_MD5=y
|
||||
|
@ -13,7 +13,7 @@ CONFIG_ARCH_CHIP="qemu"
|
||||
CONFIG_ARCH_CHIP_QEMU=y
|
||||
CONFIG_ARCH_CHIP_QEMU_A53=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=4096
|
||||
CONFIG_ARM_GIC_VERSION=2
|
||||
CONFIG_ARM64_GIC_VERSION=2
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_ASSERTIONS=y
|
||||
CONFIG_DEBUG_FEATURES=y
|
||||
|
Loading…
Reference in New Issue
Block a user